li-mt9m021/kernel/nvidia-spiri/drivers/media/i2c/mt9m021_mode_tbls.h

/*
 * mt9m021_mode_tbls.h - MT9M021 sensor mode tables
 *
 * Copyright (c) 2019, RidgeRun.  All rights reserved.
 *
 * Author: Enrique Ramírez (enrique.ramirez@ridgerun.com)
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms and conditions of the GNU General Public License,
 * version 2, as published by the Free Software Foundation.
 *
 * This program is distributed in the hope it will be useful, but WITHOUT
 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 * more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 */

#ifndef __MT9M021_I2C_TABLES__
#define __MT9M021_I2C_TABLES__

#include "media/camera_common.h"

#define MT9M021_TABLE_WAIT_MS    0
#define MT9M021_TABLE_END        1
#define MT9M021_MAX_RETRIES      6
#define MT9M021_WAIT_MS          10

#define mt9m021_reg struct reg_16

static const mt9m021_reg mt9m021_start[] = {
	{0x301A, 0x00DC}, /* Enable Streaming */
	{MT9M021_TABLE_END, 0x00}
};

static const mt9m021_reg mt9m021_stop[] = {
	{0x301A, 0x00D8}, /* Disable Streaming */
	{MT9M021_TABLE_END, 0x00}
};

static uint16_t mt9m021_seq_data[] = {
	0x3227, 0x0101, 0x0F25, 0x0808, 0x0227, 0x0101, 0x0837, 0x2700,
	0x0138, 0x2701, 0x013A, 0x2700, 0x0125, 0x0020, 0x3C25, 0x0040,
	0x3427, 0x003F, 0x2500, 0x2037, 0x2540, 0x4036, 0x2500, 0x4031,
	0x2540, 0x403D, 0x6425, 0x2020, 0x3D64, 0x2510, 0x1037, 0x2520,
	0x2010, 0x2510, 0x100F, 0x2708, 0x0802, 0x2540, 0x402D, 0x2608,
	0x280D, 0x1709, 0x2600, 0x2805, 0x26A7, 0x2807, 0x2580, 0x8029,
	0x1705, 0x2500, 0x4027, 0x2222, 0x1616, 0x2726, 0x2617, 0x3626,
	0xA617, 0x0326, 0xA417, 0x1F28, 0x0526, 0x2028, 0x0425, 0x2020,
	0x2700, 0x2625, 0x0000, 0x171E, 0x2500, 0x0425, 0x0020, 0x2117,
	0x121B, 0x1703, 0x2726, 0x2617, 0x2828, 0x0517, 0x1A26, 0x6017,
	0xAE25, 0x0080, 0x2700, 0x2626, 0x1828, 0x002E, 0x2A28, 0x081E,
	0x4127, 0x1010, 0x0214, 0x6060, 0x0A14, 0x6060, 0x0B14, 0x6060,
	0x0C14, 0x6060, 0x0D14, 0x6060, 0x0217, 0x3C14, 0x0060, 0x0A14,
	0x0060, 0x0B14, 0x0060, 0x0C14, 0x0060, 0x0D14, 0x0060, 0x0811,
	0x2500, 0x1027, 0x0010, 0x2F6F, 0x0F3E, 0x2500, 0x0827, 0x0008,
	0x3066, 0x3225, 0x0008, 0x2700, 0x0830, 0x6631, 0x3D64, 0x2508,
	0x083D, 0xFF3D, 0x2A27, 0x083F, 0x2C00
};

static const mt9m021_reg mt9m021_pll_setup[] = {
	{0x302C, 0x0001},	/* VT_PIX_CLK_DIV */
	{0x302A, 0x0008},	/* VT_SYS_CLK_DIV */
	{0x302E, 0x0004},	/* PRE_PLL_CLK_DIV */
	{0x3030, 0x0063},	/* PLL_MULTIPLIER */
	{0x30B0, 0x0000},	/* DIGITAL_TEST */
	{MT9M021_TABLE_END, 0x00}
};

static const mt9m021_reg mt9m021_mode_1280x720_60fps[] = {
	/* Rev2 Settings */
	{0x307A, 0x0000},
	{0x30EA, 0x0C00},
	{0x3044, 0x0404},
	{0x301E, 0x012C},
	{0x3180, 0x8000},
	{0x3014, 0x0000},

	/* Analog Settings */
	{0x3ED6, 0x00FD},
	{0x3ED8, 0x0FFF},
	{0x3EDA, 0x0003},
	{0x3EDC, 0xF87A},
	{0x3EDE, 0xE075},
	{0x3EE0, 0x077C},
	{0x3EE2, 0xA4EB},
	{0x3EE4, 0xD208},

	/* Size Settings */
	{0x3064, 0x1802},	/* EMBEDDED_DATA_CTRL */
	{0x3032, 0x0020},	/* DIGITAL_BINNING */
	{0x3002, 0x0078},	/* Y ADDR START */
	{0x3004, 0x0001},	/* X ADDR START */
	{0x3006, 0x0347},	/* Y ADDR END */
	{0x3008, 0x0500},	/* X ADDR END */
	{0x300A, 0x02EE},	/* FRAME_LENGTH_LINES */
	{0x300C, 0x0672},	/* LINE_LENGTH_PCK */
	{0x30A2, 0x0001},	/* X_ODD_INC */
	{0x30A6, 0x0001},	/* Y_ODD_INC */
	{MT9M021_TABLE_END, 0x00}
};

static const mt9m021_reg mt9m021_mode_1280x960_45fps[] = {
  /* Rev2 Settings */
  {0x307A, 0x0000},
  {0x30EA, 0x0C00},
  {0x3044, 0x0404},
  {0x301E, 0x012C},
  {0x3180, 0x8000},
  {0x3014, 0x0000},

  /* Analog Settings */
  {0x3ED6, 0x00FD},
  {0x3ED8, 0x0FFF},
  {0x3EDA, 0x0003},
  {0x3EDC, 0xF87A},
  {0x3EDE, 0xE075},
  {0x3EE0, 0x077C},
  {0x3EE2, 0xA4EB},
  {0x3EE4, 0xD208},

  /* Size Settings */
  {0x3064, 0x1802},	/* EMBEDDED_DATA_CTRL */
  {0x3032, 0x0020},	/* DIGITAL_BINNING */
  {0x3002, 0x0004},	/* Y ADDR START */
  {0x3004, 0x0001},	/* X ADDR START */
  {0x3006, 0x03C3},	/* Y ADDR END */
  {0x3008, 0x0500},	/* X ADDR END */
  {0x300A, 0x03DE},	/* FRAME_LENGTH_LINES */
  {0x300C, 0x0672},	/* LINE_LENGTH_PCK */
  {0x30A2, 0x0001},	/* X_ODD_INC */
  {0x30A6, 0x0001},	/* Y_ODD_INC */
  {MT9M021_TABLE_END, 0x00}
};

enum {
	MT9M021_MODE_1280x720_60FPS,
  MT9M021_MODE_1280x960_45FPS,

	MT9M021_MODE_PLL_SETUP,

	MT9M021_MODE_START_STREAM,
	MT9M021_MODE_STOP_STREAM,
};

static const mt9m021_reg *mode_table[] = {
	[MT9M021_MODE_1280x720_60FPS] 		= mt9m021_mode_1280x720_60fps,
  [MT9M021_MODE_1280x960_45FPS] 		= mt9m021_mode_1280x960_45fps,

	[MT9M021_MODE_PLL_SETUP]		= mt9m021_pll_setup,

	[MT9M021_MODE_START_STREAM]		= mt9m021_start,
	[MT9M021_MODE_STOP_STREAM]		= mt9m021_stop,
};

static const int mt9m021_framerates_1280x720[] = {
	10,
	20,
	30,
       40,
	50,
	60,
};

static const int mt9m021_framerates_1280x960[] = {
  10,
  20,
  30,
  40,
  45,
};

static const struct camera_common_frmfmt mt9m021_frmfmt[] = {
  {{1280, 720},	mt9m021_framerates_1280x720, 1, 0, MT9M021_MODE_1280x720_60FPS},
  {{1280, 960},	mt9m021_framerates_1280x960, 1, 0, MT9M021_MODE_1280x960_45FPS},
};

#endif /* __MT9M021_I2C_TABLES__ */