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Fix low framerate #7

Merged
dchvs merged 1 commits from jetpack-4.4.1 into master 2021-03-08 18:59:42 -04:00
Conversation 0 Commits 1 Files Changed 2 +27 -22
2 changed files with 27 additions and 22 deletions
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8
hardware/nvidia-spiri/platform/t18x/common/kernel-dts/t18x-common-platforms/tegra186-tx2-spiri-camera.dtsi
View File

@ -102,7 +102,7 @@ i2c8 = "/i2c@31e0000";
framerate_factor = "1000000";
exposure_factor = "1000000";
min_gain_val = "100000";
max_gain_val = "797000";
max_gain_val = "796000";
step_gain_val = "1";
default_gain = "100000";
min_hdr_ratio = "1";
@ -116,7 +116,7 @@ i2c8 = "/i2c@31e0000";
min_exp_time = "500"; // us
max_exp_time = "16000"; // us
step_exp_time = "1";
default_exp_time = "8000"; // us
default_exp_time = "12000"; // us
};
ports {
#address-cells = <0x1>;
@ -189,7 +189,7 @@ i2c8 = "/i2c@31e0000";
framerate_factor = "1000000";
exposure_factor = "1000000";
min_gain_val = "100000";
max_gain_val = "797000";
max_gain_val = "796000";
step_gain_val = "1";
default_gain = "100000";
min_hdr_ratio = "1";
@ -203,7 +203,7 @@ i2c8 = "/i2c@31e0000";
min_exp_time = "500"; // us
max_exp_time = "16000"; // us
step_exp_time = "1";
default_exp_time = "8000"; // us
default_exp_time = "12000"; // us
};
ports {
#address-cells = <0x1>;

29
kernel/nvidia-spiri/drivers/media/i2c/mt9m021.c
View File

@ -135,8 +135,8 @@
#define MT9M021_ANALOG_GAIN_SHIFT 4
#define MT9M021_ANALOG_GAIN_MASK 0x0030
#define MT9M021_GLOBAL_GAIN_MIN 100
#define MT9M021_GLOBAL_GAIN_MAX 797
#define MT9M021_GLOBAL_GAIN_MIN 100000
#define MT9M021_GLOBAL_GAIN_MAX 796000
#define MT9M021_GLOBAL_GAIN_DEF 100
#define MT9M021_COARSE_INT_TIME_MIN 0x0001
@ -424,7 +424,9 @@ static int mt9m021_set_gain(struct tegracam_device *tc_dev, s64 val)
*
* min_gain_val = 100.000
* max_gain_val = 797.000
* step_gain_val = 3125
* gain_factor = 3125
*
* gain maps to range 32 - 255
*/
gain = val / 3125;
@ -437,14 +439,14 @@ static int mt9m021_set_gain(struct tegracam_device *tc_dev, s64 val)
((gain_mul << MT9M021_ANALOG_GAIN_SHIFT) &
MT9M021_ANALOG_GAIN_MASK);
err = mt9m021_write_reg16(s_data, MT9M021_DIGITAL_TEST, reg16);
msleep(10);
// msleep(10);
if (err)
goto exit;
/* Update global gain */
err =
mt9m021_write_reg16(s_data, MT9M021_GLOBAL_GAIN, gain);
msleep(10);
// msleep(10);
if (err)
goto exit;
err =
@ -518,7 +520,7 @@ static int mt9m021_set_coarse_time(struct mt9m021 *priv, s64 val)
err = mt9m021_write_reg16(s_data, MT9M021_COARSE_INT_TIME_CB, val);
if (err)
return err;
msleep(30);
// msleep(30);
return 0;
}
@ -569,7 +571,7 @@ static int mt9m021_set_analog_gain(struct tegracam_device *tc_dev, s64 val)
((val << MT9M021_ANALOG_GAIN_SHIFT) &
MT9M021_ANALOG_GAIN_MASK);
err = mt9m021_write_reg16(s_data, MT9M021_DIGITAL_TEST, reg16);
msleep(30);
// msleep(30);
if (err)
goto exit;
@ -625,7 +627,7 @@ static int mt9m021_set_digital_gain(struct tegracam_device *tc_dev, s64 val,
err = mt9m021_write_reg16(s_data, gain_cb_reg, val);
if (err)
goto exit;
msleep(30);
// msleep(30);
return 0;
@ -648,7 +650,7 @@ static int mt9m021_set_test_pattern(struct tegracam_device *tc_dev, s32 val)
else
err = mt9m021_write_reg16(s_data, MT9M021_TEST_PATTERN,
val);
msleep(30);
// msleep(30);
if (err)
goto exit;
@ -961,13 +963,15 @@ static int mt9m021_col_correction(struct mt9m021 *priv)
if (ret < 0)
return ret;
msleep(200);
// msleep(200);
// usleep(200);
/* Enable Streaming */
ret = mt9m021_write_table(priv, mode_table[MT9M021_MODE_START_STREAM]);
if (ret < 0)
return ret;
msleep(200);
// msleep(200);
// usleep(200);
/* Disable Streaming */
ret = mt9m021_write_table(priv, mode_table[MT9M021_MODE_STOP_STREAM]);
@ -978,7 +982,8 @@ static int mt9m021_col_correction(struct mt9m021 *priv)
ret = mt9m021_write_reg16(s_data, MT9M021_COLUMN_CORRECTION, 0xE007);
if (ret < 0)
return ret;
msleep(200);
// msleep(200);
// usleep(200);
return ret;
}