dchvs/li-mt9m021
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compare: dchvs:e00ce6abcc010a623fbddddd537a7dbca468d9ea
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dchvs:master
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dchvs:jetpack-4.4.1
dchvs:hotfix/fix-low-framerate
dchvs:jetpack-4.2.2
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2 Commits
809d88dd93 ... e00ce6abcc

Author SHA1 Message Date
dchvs
e00ce6abcc Clean up comments in the code 2021-03-15 22:27:57 -06:00
dchvs
d4df26e9f9 documentation: Fix gain equation on Driver 2021-03-15 22:22:34 -06:00
2 changed files with 5 additions and 20 deletions
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2
hardware/nvidia-spiri/platform/t18x/common/kernel-dts/t18x-common-platforms/tegra186-tx2-spiri-camera.dtsi
View File

@ -189,7 +189,7 @@ i2c8 = "/i2c@31e0000";
framerate_factor = "1000000"; framerate_factor = "1000000";
exposure_factor = "1000000"; exposure_factor = "1000000";
min_gain_val = "102"; min_gain_val = "102";
max_gain_val = "160" ; //"762"; max_gain_val = "160" ;
step_gain_val = "1"; step_gain_val = "1";
default_gain = "102"; default_gain = "102";
min_hdr_ratio = "1"; min_hdr_ratio = "1";

23
kernel/nvidia-spiri/drivers/media/i2c/mt9m021.c
View File

@ -417,16 +417,15 @@ static int mt9m021_set_gain(struct tegracam_device *tc_dev, s64 val)
* Digital gain equation: * Digital gain equation:
* *
* RANGE: 1x, 7.97x * RANGE: 1x, 7.97x
* GAIN: VAL / STEPS;
* STEPS: 1/32 * STEPS: 1/32
* *
* SCALE FACTOR = 32 * SCALE FACTOR = 3
* *
* min_gain_val = 100 * min_gain_val = 102
* max_gain_val = 762 * max_gain_val = 160
* gain_factor = 3 * gain_factor = 3
* *
* gain maps to range 32 - 255 * gain accepts mapping to range 32 - 53
*/ */
gain = val / 3; gain = val / 3;
@ -445,7 +444,6 @@ static int mt9m021_set_gain(struct tegracam_device *tc_dev, s64 val)
/* Update global gain */ /* Update global gain */
err = err =
mt9m021_write_reg16(s_data, MT9M021_GLOBAL_GAIN, gain); mt9m021_write_reg16(s_data, MT9M021_GLOBAL_GAIN, gain);
// msleep(10);
if (err) if (err)
goto exit; goto exit;
err = err =
@ -453,8 +451,6 @@ static int mt9m021_set_gain(struct tegracam_device *tc_dev, s64 val)
if (err) if (err)
goto exit; goto exit;
// usleep_range(1000, 1500);
return 0; return 0;
exit: exit:
@ -521,7 +517,6 @@ static int mt9m021_set_coarse_time(struct mt9m021 *priv, s64 val)
err = mt9m021_write_reg16(s_data, MT9M021_COARSE_INT_TIME_CB, val); err = mt9m021_write_reg16(s_data, MT9M021_COARSE_INT_TIME_CB, val);
if (err) if (err)
return err; return err;
//msleep(30);
return 0; return 0;
} }
@ -572,7 +567,6 @@ static int mt9m021_set_analog_gain(struct tegracam_device *tc_dev, s64 val)
((val << MT9M021_ANALOG_GAIN_SHIFT) & ((val << MT9M021_ANALOG_GAIN_SHIFT) &
MT9M021_ANALOG_GAIN_MASK); MT9M021_ANALOG_GAIN_MASK);
err = mt9m021_write_reg16(s_data, MT9M021_DIGITAL_TEST, reg16); err = mt9m021_write_reg16(s_data, MT9M021_DIGITAL_TEST, reg16);
// msleep(30);
if (err) if (err)
goto exit; goto exit;
@ -628,7 +622,6 @@ static int mt9m021_set_digital_gain(struct tegracam_device *tc_dev, s64 val,
err = mt9m021_write_reg16(s_data, gain_cb_reg, val); err = mt9m021_write_reg16(s_data, gain_cb_reg, val);
if (err) if (err)
goto exit; goto exit;
// msleep(30);
return 0; return 0;
@ -651,7 +644,6 @@ static int mt9m021_set_test_pattern(struct tegracam_device *tc_dev, s32 val)
else else
err = mt9m021_write_reg16(s_data, MT9M021_TEST_PATTERN, err = mt9m021_write_reg16(s_data, MT9M021_TEST_PATTERN,
val); val);
// msleep(30);
if (err) if (err)
goto exit; goto exit;
@ -964,15 +956,10 @@ static int mt9m021_col_correction(struct mt9m021 *priv)
if (ret < 0) if (ret < 0)
return ret; return ret;
// msleep(200);
// usleep(200);
/* Enable Streaming */ /* Enable Streaming */
ret = mt9m021_write_table(priv, mode_table[MT9M021_MODE_START_STREAM]); ret = mt9m021_write_table(priv, mode_table[MT9M021_MODE_START_STREAM]);
if (ret < 0) if (ret < 0)
return ret; return ret;
// msleep(200);
// usleep(200);
/* Disable Streaming */ /* Disable Streaming */
ret = mt9m021_write_table(priv, mode_table[MT9M021_MODE_STOP_STREAM]); ret = mt9m021_write_table(priv, mode_table[MT9M021_MODE_STOP_STREAM]);
@ -983,8 +970,6 @@ static int mt9m021_col_correction(struct mt9m021 *priv)
ret = mt9m021_write_reg16(s_data, MT9M021_COLUMN_CORRECTION, 0xE007); ret = mt9m021_write_reg16(s_data, MT9M021_COLUMN_CORRECTION, 0xE007);
if (ret < 0) if (ret < 0)
return ret; return ret;
// msleep(200);
// usleep(200);
return ret; return ret;
} }