From 8faeddf611a4263f1b76cf20101006ef9f5e68a0 Mon Sep 17 00:00:00 2001
From: dchvs <daniel.chaves@ridgerun.com>
Date: Fri, 19 Mar 2021 18:23:49 -0600
Subject: [PATCH] Add mode1 table with resolution 1280x960 to Driver

---
 .../drivers/media/i2c/mt9m021_mode_tbls.h     | 50 +++++++++++++++++--
 1 file changed, 47 insertions(+), 3 deletions(-)

diff --git a/kernel/nvidia-spiri/drivers/media/i2c/mt9m021_mode_tbls.h b/kernel/nvidia-spiri/drivers/media/i2c/mt9m021_mode_tbls.h
index 6bd8277..88e2a97 100644
--- a/kernel/nvidia-spiri/drivers/media/i2c/mt9m021_mode_tbls.h
+++ b/kernel/nvidia-spiri/drivers/media/i2c/mt9m021_mode_tbls.h
@@ -102,8 +102,42 @@ static const mt9m021_reg mt9m021_mode_1280x720_60fps[] = {
 	{MT9M021_TABLE_END, 0x00}
 };
 
+static const mt9m021_reg mt9m021_mode_1280x960_45fps[] = {
+  /* Rev2 Settings */
+  {0x307A, 0x0000},
+  {0x30EA, 0x0C00},
+  {0x3044, 0x0404},
+  {0x301E, 0x012C},
+  {0x3180, 0x8000},
+  {0x3014, 0x0000},
+
+  /* Analog Settings */
+  {0x3ED6, 0x00FD},
+  {0x3ED8, 0x0FFF},
+  {0x3EDA, 0x0003},
+  {0x3EDC, 0xF87A},
+  {0x3EDE, 0xE075},
+  {0x3EE0, 0x077C},
+  {0x3EE2, 0xA4EB},
+  {0x3EE4, 0xD208},
+
+  /* Size Settings */
+  {0x3064, 0x1802},	/* EMBEDDED_DATA_CTRL */
+  {0x3032, 0x0020},	/* DIGITAL_BINNING */
+  {0x3002, 0x0004},	/* Y ADDR START */
+  {0x3004, 0x0001},	/* X ADDR START */
+  {0x3006, 0x03C3},	/* Y ADDR END */
+  {0x3008, 0x0500},	/* X ADDR END */
+  {0x300A, 0x03DE},	/* FRAME_LENGTH_LINES */
+  {0x300C, 0x0672},	/* LINE_LENGTH_PCK */
+  {0x30A2, 0x0001},	/* X_ODD_INC */
+  {0x30A6, 0x0001},	/* Y_ODD_INC */
+  {MT9M021_TABLE_END, 0x00}
+};
+
 enum {
 	MT9M021_MODE_1280x720_60FPS,
+  MT9M021_MODE_1280x960_45FPS,
 
 	MT9M021_MODE_PLL_SETUP,
 
@@ -113,6 +147,7 @@ enum {
 
 static const mt9m021_reg *mode_table[] = {
 	[MT9M021_MODE_1280x720_60FPS] 		= mt9m021_mode_1280x720_60fps,
+  [MT9M021_MODE_1280x960_45FPS] 		= mt9m021_mode_1280x960_45fps,
 
 	[MT9M021_MODE_PLL_SETUP]		= mt9m021_pll_setup,
 
@@ -120,17 +155,26 @@ static const mt9m021_reg *mode_table[] = {
 	[MT9M021_MODE_STOP_STREAM]		= mt9m021_stop,
 };
 
-static const int mt9m021_framerates[] = {
+static const int mt9m021_framerates_1280x720[] = {
 	10,
 	20,
 	30,
-	40,
+       40,
 	50,
 	60,
 };
 
+static const int mt9m021_framerates_1280x960[] = {
+  10,
+  20,
+  30,
+  40,
+  45,
+};
+
 static const struct camera_common_frmfmt mt9m021_frmfmt[] = {
-	{{1280, 720},	mt9m021_framerates, 1, 0, MT9M021_MODE_1280x720_60FPS},
+  {{1280, 720},	mt9m021_framerates_1280x720, 1, 0, MT9M021_MODE_1280x720_60FPS},
+  {{1280, 960},	mt9m021_framerates_1280x960, 1, 0, MT9M021_MODE_1280x960_45FPS},
 };
 
 #endif /* __MT9M021_I2C_TABLES__ */