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Merge pull request 'jetpack-4.4.1' (#8) from jetpack-4.4.1 into master 

Reviewed-on: #8
This commit is contained in:
dchvs 2021-03-16 04:29:32 +00:00
parent 3f911eb3f3 e00ce6abcc
commit 0c8e4c04c7
3 changed files with 48 additions and 61 deletions
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23
README.md
View File

@ -105,23 +105,24 @@ As the AE has interdependency with the digital gain. This gain it's and operatio
* Digital gain equation:
*
* RANGE: 1x, 7.97x
* GAIN: VAL / STEPS;
* STEPS: 1/32
*
* SCALE FACTOR = 100.000
* SCALE FACTOR = 3
*
* min_gain_val = 100.000
* max_gain_val = 797.000
* step_gain_val = 3125
* min_gain_val = 102
* max_gain_val = 160
* gain_factor = 3
*
* gain accepts mapping to range 32 - 53
*/
MT9M021 sensor datasheet:
* <a href="https://files.niemo.de/aptina_pdfs/MT9M021-M031_Developer_Guide.pdf">MT9M021 Developer Guide</a>
```
MT9M021 sensor datasheet:
Where, the min_gain_val, max_gain_val, step_gain_val are part of the cameras' DTSI (tegra186-tx2-spiri-camera.dtsi) fixed parameters
as per the datasheet. The step_gain_val consists of the steps (1/32 for the register) scaled to a value that makes this fraction become an significant
in integer.
* <a href="https://files.niemo.de/aptina_pdfs/MT9M021-M031_Developer_Guide.pdf">MT9M021 Developer Guide</a>
Where, the `min_gain_val, max_gain_val, step_gain_val` are part of the cameras' DTSI (tegra186-tx2-spiri-camera.dtsi) fixed parameters
as per the datasheet. The `gain` consists on the steps (1x + n * 1/32 for the register) scaled to a value that represents this fraction in an integer value for the gain register.
#### Kernel Changes

28
hardware/nvidia-spiri/platform/t18x/common/kernel-dts/t18x-common-platforms/tegra186-tx2-spiri-camera.dtsi
View File

@ -98,13 +98,13 @@ i2c8 = "/i2c@31e0000";
inherent_gain = "1";
pix_clk_hz = "74250000";
gain_factor = "3125";
gain_factor = "3";
framerate_factor = "1000000";
exposure_factor = "1000000";
min_gain_val = "100000";
max_gain_val = "796000";
min_gain_val = "102";
max_gain_val = "160";
step_gain_val = "1";
default_gain = "100000";
default_gain = "102";
min_hdr_ratio = "1";
max_hdr_ratio = "1";
@ -113,10 +113,10 @@ i2c8 = "/i2c@31e0000";
step_framerate = "1";
default_framerate = "60000000"; // 60.0 fps
min_exp_time = "500"; // us
max_exp_time = "16000"; // us
min_exp_time = "24000"; // us
max_exp_time = "74000"; // us
step_exp_time = "1";
default_exp_time = "12000"; // us
default_exp_time = "50000"; // us
};
ports {
#address-cells = <0x1>;
@ -185,13 +185,13 @@ i2c8 = "/i2c@31e0000";
inherent_gain = "1";
pix_clk_hz = "74250000";
gain_factor = "3125";
gain_factor = "3";
framerate_factor = "1000000";
exposure_factor = "1000000";
min_gain_val = "100000";
max_gain_val = "796000";
min_gain_val = "102";
max_gain_val = "160" ;
step_gain_val = "1";
default_gain = "100000";
default_gain = "102";
min_hdr_ratio = "1";
max_hdr_ratio = "1";
@ -200,10 +200,10 @@ i2c8 = "/i2c@31e0000";
step_framerate = "1";
default_framerate = "60000000"; // 60.0 fps
min_exp_time = "500"; // us
max_exp_time = "16000"; // us
min_exp_time = "24000"; // us
max_exp_time = "74000"; // us
step_exp_time = "1";
default_exp_time = "12000"; // us
default_exp_time = "50000"; // us
};
ports {
#address-cells = <0x1>;

30
kernel/nvidia-spiri/drivers/media/i2c/mt9m021.c
View File

@ -135,8 +135,8 @@
#define MT9M021_ANALOG_GAIN_SHIFT 4
#define MT9M021_ANALOG_GAIN_MASK 0x0030
#define MT9M021_GLOBAL_GAIN_MIN 100000
#define MT9M021_GLOBAL_GAIN_MAX 796000
#define MT9M021_GLOBAL_GAIN_MIN 100
#define MT9M021_GLOBAL_GAIN_MAX 762
#define MT9M021_GLOBAL_GAIN_DEF 100
#define MT9M021_COARSE_INT_TIME_MIN 0x0001
@ -417,18 +417,17 @@ static int mt9m021_set_gain(struct tegracam_device *tc_dev, s64 val)
* Digital gain equation:
*
* RANGE: 1x, 7.97x
* GAIN: VAL / STEPS;
* STEPS: 1/32
*
* SCALE FACTOR = 100.000
* SCALE FACTOR = 3
*
* min_gain_val = 100.000
* max_gain_val = 797.000
* gain_factor = 3125
* min_gain_val = 102
* max_gain_val = 160
* gain_factor = 3
*
* gain maps to range 32 - 255
* gain accepts mapping to range 32 - 53
*/
gain = val / 3125;
gain = val / 3;
/* Update analog gain multiplier */
err = mt9m021_read_reg16(s_data, MT9M021_DIGITAL_TEST, &reg16);
@ -439,14 +438,12 @@ static int mt9m021_set_gain(struct tegracam_device *tc_dev, s64 val)
((gain_mul << MT9M021_ANALOG_GAIN_SHIFT) &
MT9M021_ANALOG_GAIN_MASK);
err = mt9m021_write_reg16(s_data, MT9M021_DIGITAL_TEST, reg16);
// msleep(10);
if (err)
goto exit;
/* Update global gain */
err =
mt9m021_write_reg16(s_data, MT9M021_GLOBAL_GAIN, gain);
// msleep(10);
if (err)
goto exit;
err =
@ -520,7 +517,6 @@ static int mt9m021_set_coarse_time(struct mt9m021 *priv, s64 val)
err = mt9m021_write_reg16(s_data, MT9M021_COARSE_INT_TIME_CB, val);
if (err)
return err;
// msleep(30);
return 0;
}
@ -571,7 +567,6 @@ static int mt9m021_set_analog_gain(struct tegracam_device *tc_dev, s64 val)
((val << MT9M021_ANALOG_GAIN_SHIFT) &
MT9M021_ANALOG_GAIN_MASK);
err = mt9m021_write_reg16(s_data, MT9M021_DIGITAL_TEST, reg16);
// msleep(30);
if (err)
goto exit;
@ -627,7 +622,6 @@ static int mt9m021_set_digital_gain(struct tegracam_device *tc_dev, s64 val,
err = mt9m021_write_reg16(s_data, gain_cb_reg, val);
if (err)
goto exit;
// msleep(30);
return 0;
@ -650,7 +644,6 @@ static int mt9m021_set_test_pattern(struct tegracam_device *tc_dev, s32 val)
else
err = mt9m021_write_reg16(s_data, MT9M021_TEST_PATTERN,
val);
// msleep(30);
if (err)
goto exit;
@ -963,15 +956,10 @@ static int mt9m021_col_correction(struct mt9m021 *priv)
if (ret < 0)
return ret;
// msleep(200);
// usleep(200);
/* Enable Streaming */
ret = mt9m021_write_table(priv, mode_table[MT9M021_MODE_START_STREAM]);
if (ret < 0)
return ret;
// msleep(200);
// usleep(200);
/* Disable Streaming */
ret = mt9m021_write_table(priv, mode_table[MT9M021_MODE_STOP_STREAM]);
@ -982,8 +970,6 @@ static int mt9m021_col_correction(struct mt9m021 *priv)
ret = mt9m021_write_reg16(s_data, MT9M021_COLUMN_CORRECTION, 0xE007);
if (ret < 0)
return ret;
// msleep(200);
// usleep(200);
return ret;
}