forked from rrcarlosr/Jetpack
45 lines
1.7 KiB
Plaintext
45 lines
1.7 KiB
Plaintext
/*
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* Copyright (c) 2015-2017, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <dt-bindings/pinctrl/pinctrl-tegra.h>
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#include <dt-bindings/reset/tegra194-reset.h>
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#include <dt-bindings/soc/tegra194-powergate.h>
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/ {
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tegra_sata: ahci-sata@3507000 {
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compatible = "nvidia,tegra194-ahci-sata";
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reg = <0x0 0x03507000 0x0 0x00002000>, /* SATA AHCI */
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<0x0 0x03501000 0x0 0x00006000>, /* SATA Config */
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<0x0 0x03500000 0x0 0x00001000>, /* SATA IPFS */
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<0x0 0x03A90000 0x0 0x00010000>; /* SATA AUX */
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reg-names = "sata-ahci", "sata-config", "sata-ipfs", "sata-aux";
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interrupts = <0 197 0x04>;
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dma-coherent;
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iommus = <&smmu TEGRA_SID_SATA2>;
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power-domains = <&bpmp TEGRA194_POWER_DOMAIN_SAX>;
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clocks = <&bpmp_clks TEGRA194_CLK_SATA>,
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<&bpmp_clks TEGRA194_CLK_SATA_OOB>,
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<&bpmp_clks TEGRA194_CLK_PLLP_OUT0>;
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clock-names = "sata", "sata-oob", "pllp";
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resets = <&bpmp_resets TEGRA194_RESET_SATA>,
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<&bpmp_resets TEGRA194_RESET_SATACOLD>;
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reset-names = "sata", "sata-cold";
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nvidia,disable-features = "devslp", "dipm";
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nvidia,link-flags = "max_power";
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status = "disabled";
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};
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};
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