forked from rrcarlosr/Jetpack
151 lines
3.9 KiB
C
151 lines
3.9 KiB
C
/*
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* (C) Copyright 2007-2013
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* Stelian Pop <stelian.pop@leadtechdesign.com>
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* Lead Tech Design <www.leadtechdesign.com>
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* Thomas Petazzoni, Free Electrons, <thomas.petazzoni@free-electrons.com>
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* Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
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*
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* Settings for Calao USB-A9263 board
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*
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* U-Boot image has to be less than 200704 bytes, otherwise at91bootstrap
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* installed on board will not be able to load it properly.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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#include <asm/hardware.h>
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/* ARM asynchronous clock */
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#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */
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#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
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#define CONFIG_MACH_TYPE MACH_TYPE_USB_A9263
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#define CONFIG_ARCH_CPU_INIT
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#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
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#define CONFIG_SETUP_MEMORY_TAGS
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#define CONFIG_INITRD_TAG
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#define CONFIG_SKIP_LOWLEVEL_INIT
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#define CONFIG_DISPLAY_CPUINFO
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#define CONFIG_SYS_TEXT_BASE 0x23f00000
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/*
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* Hardware drivers
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*/
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#define CONFIG_AT91_GPIO
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/* serial console */
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#define CONFIG_ATMEL_USART
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#define CONFIG_USART_BASE ATMEL_BASE_DBGU
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#define CONFIG_USART_ID ATMEL_ID_SYS
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#define CONFIG_BAUDRATE 115200
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/*
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* BOOTP options
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*/
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#define CONFIG_BOOTP_BOOTFILESIZE
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#define CONFIG_BOOTP_BOOTPATH
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#define CONFIG_BOOTP_GATEWAY
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#define CONFIG_BOOTP_HOSTNAME
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/*
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* Command line configuration.
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*/
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#define CONFIG_CMD_NAND
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/* SDRAM */
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#define CONFIG_NR_DRAM_BANKS 1
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#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1
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#define CONFIG_SYS_SDRAM_SIZE 0x04000000
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#define CONFIG_SYS_INIT_SP_ADDR \
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(ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE)
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/* DataFlash */
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#define CONFIG_ATMEL_DATAFLASH_SPI
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#define CONFIG_HAS_DATAFLASH
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#define CONFIG_SYS_MAX_DATAFLASH_BANKS 1
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#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000
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#define AT91_SPI_CLK 8000000
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#define DATAFLASH_TCSS (0x1a << 16)
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#define DATAFLASH_TCHS (0x1 << 24)
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/* no NOR flash */
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#define CONFIG_SYS_NO_FLASH
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/* NAND flash */
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#ifdef CONFIG_CMD_NAND
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#define CONFIG_NAND_ATMEL
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
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/* our ALE is AD21 */
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#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
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/* our CLE is AD22 */
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#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
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#define CONFIG_SYS_NAND_ENABLE_PIN GPIO_PIN_PD(15)
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#define CONFIG_SYS_NAND_READY_PIN GPIO_PIN_PA(22)
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#endif
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#define MTDPARTS_DEFAULT \
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"mtdparts=atmel_nand:16m(kernel)ro,120m(root1),-(root2)"
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/* Ethernet */
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#define CONFIG_MACB
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#define CONFIG_RMII
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#define CONFIG_NET_RETRY_COUNT 20
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#define CONFIG_AT91_WANTS_COMMON_PHY
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/* USB */
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#ifdef CONFIG_CMD_USB
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#define CONFIG_USB_ATMEL
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#define CONFIG_USB_OHCI_NEW
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#define CONFIG_DOS_PARTITION
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#define CONFIG_SYS_USB_OHCI_CPU_INIT
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#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00a00000
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#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9263"
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#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
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#define CONFIG_USB_STORAGE
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#endif
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#define CONFIG_SYS_LOAD_ADDR 0x22000000
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#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
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#define CONFIG_SYS_MEMTEST_END 0x23e00000
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/* bootstrap + u-boot + env in dataflash on CS0 */
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#define CONFIG_ENV_IS_IN_DATAFLASH
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#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x4000)
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#define CONFIG_ENV_OFFSET 0x2000
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#define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \
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CONFIG_ENV_OFFSET)
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#define CONFIG_ENV_SIZE 0x2000
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#define CONFIG_BOOTCOMMAND "nboot 21000000 0"
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#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
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"root=/dev/mtdblock1 " \
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"mtdparts=" MTDPARTS_DEFAULT " " \
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"rw rootfstype=jffs2"
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"mtdparts=" MTDPARTS_DEFAULT "\0" \
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#define CONFIG_SYS_CBSIZE 256
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#define CONFIG_SYS_MAXARGS 16
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
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sizeof(CONFIG_SYS_PROMPT) + 16)
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#define CONFIG_CMDLINE_EDITING
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#define CONFIG_AUTO_COMPLETE
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#define CONFIG_SYS_LONGHELP
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/*
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* Size of malloc() pool
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*/
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#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
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#endif
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