Jetpack/hardware/nvidia/platform/t19x/jakku/kernel-dts/common/tegra194-xavier-nx-cti-NGX006-IMX390-mux.dtsi
dchvs 31faf4d851 cti_kernel: Add CTI sources
Elroy L4T r32.4.4 – JetPack 4.4.1
2021-03-15 20:15:11 -06:00

155 lines
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/*
* Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include "tegra194-xavier-nx-cti-NGX006-IMX390.dtsi"
#define CAM_I2C_MUX TEGRA194_AON_GPIO(CC, 3)
#define CAMERA_I2C_MUX_BUS(x) (0x1E + x)
/* camera control gpio definitions */
/ {
i2c@31e0000 {
gpio@74{ //Camera GPIO
status = "okay";
vcc-supply = <&battery_reg>;
camera-rst{
gpio-hog;
output-low;
gpios = <0 0 2 0 >;
label = "des_a_rst", "des_b_rst";
};
};
};
i2c@3180000 {
tca9546@70 {
compatible = "nxp,pca9544";
reg = <0x70>;
#address-cells = <1>;
#size-cells = <0>;
skip_mux_detect = "yes";
vif-supply = <&p3509_vdd_1v8_cvb>;
vcc-supply = <&p3509_vdd_1v8_cvb>;
vcc_lp = "vcc";
i2c@0 {
reg = <0>;
i2c-mux,deselect-on-exit;
#address-cells = <1>;
#size-cells = <0>;
dser: max9296@48 {
compatible = "nvidia,max9296";
reg = <0x48>;
csi-mode = "2x4";
max-src = <2>;
reset-gpios = <&gpio_i2c_8_74 0 GPIO_ACTIVE_HIGH>;
};
ser_prim: max9295_prim@62 {
compatible = "nvidia,max9295";
reg = <0x62>;
is-prim-ser;
};
ser_a: max9295_a@40 {
compatible = "nvidia,max9295";
reg = <0x40>;
nvidia,gmsl-dser-device = <&dser>;
};
ser_b: max9295_b@60 {
compatible = "nvidia,max9295";
reg = <0x60>;
nvidia,gmsl-dser-device = <&dser>;
};
imx390_a@1b {
def-addr = <0x21>;
/* Define any required hw resources needed by driver */
/* ie. clocks, io pins, power sources */
clocks = <&bpmp_clks TEGRA194_CLK_EXTPERIPH1>,
<&bpmp_clks TEGRA194_CLK_EXTPERIPH1>;
clock-names = "extperiph1", "pllp_grtba";
mclk = "extperiph1";
nvidia,gmsl-ser-device = <&ser_a>;
nvidia,gmsl-dser-device = <&dser>;
};
imx390_b@1c {
def-addr = <0x21>;
/* Define any required hw resources needed by driver */
/* ie. clocks, io pins, power sources */
clocks = <&bpmp_clks TEGRA194_CLK_EXTPERIPH1>,
<&bpmp_clks TEGRA194_CLK_EXTPERIPH1>;
clock-names = "extperiph1", "pllp_grtba";
mclk = "extperiph1";
nvidia,gmsl-ser-device = <&ser_b>;
nvidia,gmsl-dser-device = <&dser>;
};
};
i2c@1 {
reg = <1>;
i2c-mux,deselect-on-exit;
#address-cells = <1>;
#size-cells = <0>;
dsera: max9296@48 {
compatible = "nvidia,max9296";
reg = <0x48>;
csi-mode = "2x4";
max-src = <2>;
reset-gpios = <&gpio_i2c_8_74 2 GPIO_ACTIVE_HIGH>;
};
ser_prima: max9295_prim@62 {
compatible = "nvidia,max9295";
reg = <0x62>;
is-prim-ser;
};
ser_c: max9295_a@40 {
compatible = "nvidia,max9295";
reg = <0x40>;
nvidia,gmsl-dser-device = <&dsera>;
};
ser_d: max9295_b@60 {
compatible = "nvidia,max9295";
reg = <0x60>;
nvidia,gmsl-dser-device = <&dsera>;
};
imx390_c@1b {
def-addr = <0x21>;
/* Define any required hw resources needed by driver */
/* ie. clocks, io pins, power sources */
clocks = <&bpmp_clks TEGRA194_CLK_EXTPERIPH1>,
<&bpmp_clks TEGRA194_CLK_EXTPERIPH1>;
clock-names = "extperiph1", "pllp_grtba";
mclk = "extperiph1";
nvidia,gmsl-ser-device = <&ser_c>;
nvidia,gmsl-dser-device = <&dsera>;
};
imx390_d@1c {
def-addr = <0x21>;
/* Define any required hw resources needed by driver */
/* ie. clocks, io pins, power sources */
clocks = <&bpmp_clks TEGRA194_CLK_EXTPERIPH1>,
<&bpmp_clks TEGRA194_CLK_EXTPERIPH1>;
clock-names = "extperiph1", "pllp_grtba";
mclk = "extperiph1";
nvidia,gmsl-ser-device = <&ser_d>;
nvidia,gmsl-dser-device = <&dsera>;
};
};
};
};
};