forked from rrcarlosr/Jetpack
510 lines
11 KiB
Plaintext
510 lines
11 KiB
Plaintext
/*
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* Common include DTS file for CVM:P3668-0001 and CVB:P3449-0000 variants.
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*
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* Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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#include "dt-bindings/extcon-ids.h"
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#include "dt-bindings/gpio/tegra194-gpio.h"
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#include <dt-bindings/pwm/pwm.h>
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#include <tegra194-soc/tegra194-soc-cvm.dtsi>
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#include "tegra194-fixed-regulator-p3668.dtsi"
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#include <t19x-common-platforms/tegra194-comms.dtsi>
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#include <t19x-common-platforms/tegra194-platforms-eqos.dtsi>
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#include "tegra194-powermon-p3668.dtsi"
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#include "tegra194-power-tree-p3668.dtsi"
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#include "tegra194-thermal-p3668.dtsi"
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#include "tegra194-p3668-pcie-plugin-manager.dtsi"
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#include "tegra194-plugin-manager-p3668.dtsi"
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#include <t19x-common-platforms/tegra194-no-pll-aon-clock.dtsi>
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/ {
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nvidia,fastboot-usb-vid = <0x0955>;
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nvidia,fastboot-usb-pid = <0xee1e>;
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model = "NVIDIA Jetson Xavier NX Developer Kit";
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chosen {
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bootargs ="console=ttyTCU0,115200";
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board-has-eeprom;
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nvidia,tegra-joint_xpu_rail;
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};
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cpufreq {
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compatible = "nvidia,tegra194-cpufreq";
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status = "okay";
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cpu_emc_map = <1907200 1600000>,
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<1881600 800000>,
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<1574400 665000>,
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<1267200 408000>;
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};
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pmc@c370000 {
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nvidia,invert-interrupt;
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};
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pmc@c360000 {
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iopad_defaults: iopad-defaults {
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sdmmc-io-pads {
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pins = "sdmmc1-hv", "sdmmc3-hv";
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nvidia,enable-voltage-switching;
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};
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};
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};
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hdr40_i2c0: i2c@c240000 {
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/* This I2C (GEN2) is routed only to 40-pin hdr
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* Not being used in Jakku CVM/CVB/Porg-base-board
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* it seems "ucsi_ccg" for USB-TypeC which is not supported by Jakku */
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bmi160@69 {
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compatible = "bmi,bmi160";
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reg = <0x69>;
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interrupt-parent = <&tegra_aon_gpio>;
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interrupts = <TEGRA194_AON_GPIO(AA, 2) GPIO_ACTIVE_LOW>;
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accelerometer_matrix = [01 00 00 00 01 00 00 00 01];
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gyroscope_matrix = [01 00 00 00 01 00 00 00 01];
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accelerometer_delay_us_min = <1250>;
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gyroscope_delay_us_min = <1250>;
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status = "disabled";
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};
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};
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external-connection {
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vbus_id_extcon: extcon@1 {
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compatible = "extcon-gpio-states";
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reg = <0x1>;
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extcon-gpio,name = "VBUS";
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extcon-gpio,cable-states = <
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0x0 0x1
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0x1 0x0>;
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gpios = <&tegra_main_gpio TEGRA194_MAIN_GPIO(Z, 1) 0>;
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extcon-gpio,out-cable-names = <EXTCON_USB EXTCON_USB_HOST EXTCON_NONE>;
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wakeup-source;
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#extcon-cells = <1>;
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};
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};
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xusb_padctl: xusb_padctl@3520000 {
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status = "okay";
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pads {
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usb2 {
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lanes {
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usb2-0 {
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nvidia,function = "xusb";
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status = "okay";
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};
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usb2-1 {
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nvidia,function = "xusb";
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status = "okay";
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};
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usb2-2 {
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nvidia,function = "xusb";
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status = "okay";
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};
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};
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};
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usb3 {
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lanes {
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usb3-2 {
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nvidia,function = "xusb";
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status = "okay";
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};
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};
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};
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};
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ports {
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usb2-0 {
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mode = "otg";
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status = "okay";
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};
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usb2-1 {
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mode = "host";
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status = "okay";
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};
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usb2-2 {
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mode = "host";
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vbus-supply = <&battery_reg>;
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status = "okay";
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};
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usb3-2 {
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nvidia,usb2-companion = <1>;
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status = "okay";
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};
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};
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};
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tegra_xudc: xudc@3550000 {
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extcon-cables = <&vbus_id_extcon 0>;
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extcon-cable-names = "vbus";
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#extcon-cells = <1>;
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phys = <&{/xusb_padctl@3520000/pads/usb2/lanes/usb2-0}>;
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phy-names = "usb2";
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nvidia,xusb-padctl = <&xusb_padctl>;
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nvidia,boost_cpu_freq = <1200>;
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status = "okay";
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};
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tegra_xhci: xhci@3610000 {
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extcon-cables = <&vbus_id_extcon 1>;
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extcon-cable-names = "id";
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#extcon-cells = <1>;
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phys = <&{/xusb_padctl@3520000/pads/usb2/lanes/usb2-0}>,
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<&{/xusb_padctl@3520000/pads/usb2/lanes/usb2-1}>,
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<&{/xusb_padctl@3520000/pads/usb2/lanes/usb2-2}>,
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<&{/xusb_padctl@3520000/pads/usb3/lanes/usb3-2}>;
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phy-names = "usb2-0", "usb2-1", "usb2-2", "usb3-2";
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nvidia,xusb-padctl = <&xusb_padctl>;
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status = "okay";
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};
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/* Below node can be moved to cvb to make decision about enabling/disabling */
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arm-pmu {
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status = "okay";
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};
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power-domain {
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status = "okay";
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};
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interrupt-controller {
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status = "okay";
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};
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mods-simple-bus {
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status = "okay";
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};
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cpuidle {
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compatible = "nvidia,tegra19x-cpuidle";
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status = "okay";
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};
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thermal-zones {
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status = "okay";
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};
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reserved-memory {
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ramoops_carveout {
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status = "okay";
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};
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};
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mttcan@c310000 {
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status = "okay";
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};
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mttcan@c320000 {
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status = "disabled";
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};
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host1x {
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dpaux@155F0000 {
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status = "okay";
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compatible = "nvidia,tegra194-dpaux3-padctl";
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/delete-property/ power-domains;
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dpaux_default: pinmux@0 {
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dpaux3_pins {
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pins = "dpaux3-3";
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function = "i2c";
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};
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};
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};
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};
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hardwood {
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compatible = "nvidia,denver-hardwood";
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interrupts = <0 24 0x4>;
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};
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pfsd {
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pwm_polarity= <PWM_POLARITY_NORMAL>;
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suspend_state = <0>;
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};
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serial@3100000 {
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compatible = "nvidia,tegra186-hsuart";
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status = "okay";
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};
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serial@3140000 {
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compatible = "nvidia,tegra186-hsuart";
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status = "okay";
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};
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combined-uart {
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console-port;
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combined-uart;
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status = "okay";
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};
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pwm@c340000 {
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status = "okay";
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};
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sdhci_emmc: sdhci@3460000 {
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uhs-mask = <0x0>;
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nvidia,enable-hwcq;
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status = "okay";
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};
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sdhci_sd: sdhci@3400000 {
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mmc-ocr-mask = <0x0>;
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cd-inverted;
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cd-gpios = <&tegra_main_gpio TEGRA194_MAIN_GPIO(G, 7) 0>;
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nvidia,cd-wakeup-capable;
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mmc-ocr-mask = <0>;
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cd-inverted;
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vmmc-supply = <&p3668_vdd_sdmmc1_sw>;
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status = "okay";
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};
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mipical@3990000 {
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status = "okay";
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};
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tegra-hsp@b950000 {
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status = "okay";
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};
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rtcpu@bc00000 {
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status = "okay";
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nvidia,cmd-timeout = <2000>;
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};
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gpio@c2f0000 {
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pex-refclk-sel-low {
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gpio-hog;
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output-low;
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gpios = <TEGRA194_AON_GPIO(AA, 5) 0>;
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label = "pex_refclk_sel_low";
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status = "disabled";
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};
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pex-refclk-sel-high {
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gpio-hog;
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output-high;
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gpios = <TEGRA194_AON_GPIO(AA, 5) 0>;
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label = "pex_refclk_sel_high";
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status = "disabled";
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};
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w-disable1 {
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gpio-hog;
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output-high;
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gpios = <TEGRA194_AON_GPIO(CC, 2) GPIO_ACTIVE_LOW>;
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label = "w-disable1";
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status = "okay";
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};
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w-disable2 {
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gpio-hog;
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output-high;
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gpios = <TEGRA194_AON_GPIO(CC, 0) GPIO_ACTIVE_LOW>;
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label = "w-disable2";
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status = "okay";
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};
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};
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pcie@14160000 {
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status = "okay";
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nvidia,pex-wake = <&tegra_main_gpio TEGRA194_MAIN_GPIO(L, 2)
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GPIO_ACTIVE_HIGH>;
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vddio-pex-ctl-supply = <&p3668_spmic_sd3>;
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nvidia,disable-aspm-states = <0xf>;
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nvidia,enable-power-down;
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nvidia,max-speed = <3>;
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num-lanes = <1>;
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phys = <&p2u_11>;
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phy-names = "pcie-p2u-0";
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};
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pcie@141a0000 {
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status = "okay";
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vddio-pex-ctl-supply = <&p3668_spmic_sd3>;
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nvidia,disable-aspm-states = <0xf>;
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nvidia,enable-power-down;
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nvidia,max-speed = <4>;
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phys = <&p2u_12>,
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<&p2u_13>,
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<&p2u_14>,
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<&p2u_15>,
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<&p2u_16>,
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<&p2u_17>,
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<&p2u_18>,
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<&p2u_19>;
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phy-names = "pcie-p2u-0", "pcie-p2u-1", "pcie-p2u-2", "pcie-p2u-3",
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"pcie-p2u-4", "pcie-p2u-5", "pcie-p2u-6", "pcie-p2u-7";
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};
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pcie_ep@141a0000 {
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status = "disabled";
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nvidia,disable-aspm-states = <0xf>;
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vddio-pex-ctl-supply = <&p3668_spmic_sd3>;
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phys = <&p2u_12>, <&p2u_13>, <&p2u_14>, <&p2u_15>,
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<&p2u_16>, <&p2u_17>, <&p2u_18>, <&p2u_19>;
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phy-names = "pcie-p2u-0", "pcie-p2u-1", "pcie-p2u-2", "pcie-p2u-3",
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"pcie-p2u-4", "pcie-p2u-5", "pcie-p2u-6", "pcie-p2u-7";
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nvidia,pex-rst-gpio = <&tegra_main_gpio TEGRA194_MAIN_GPIO(GG, 1)
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GPIO_ACTIVE_LOW>;
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};
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eeprom-manager {
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data-size = <0x100>;
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bus@0 {
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i2c-bus = <&gen1_i2c>;
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eeprom@0 {
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slave-address = <0x50>;
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label = "cvm";
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};
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};
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};
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hdr40_i2c1: i2c@31e0000 {
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pinctrl-names = "default";
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pinctrl-0 = <&dpaux_default>;
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};
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host1x {
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dpaux@155F0000 {
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status = "okay";
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compatible = "nvidia,tegra194-dpaux3-padctl";
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dpaux_default: pinmux@0 {
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dpaux3_pins {
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pins = "dpaux3-3";
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function = "i2c";
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};
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};
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};
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};
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dpaux3 {
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compatible = "nvidia,tegra194-dpaux3-pinctrl";
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status = "okay";
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};
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spi@3210000{ /* SPI1 in 40 pin conn */
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status = "okay";
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spi@0 { /* chip select 0 */
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compatible = "spidev";
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reg = <0x0>;
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spi-max-frequency = <50000000>;
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controller-data {
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nvidia,enable-hw-based-cs;
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nvidia,rx-clk-tap-delay = <0x10>;
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nvidia,tx-clk-tap-delay = <0x0>;
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};
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};
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spi@1 { /* chip select 1 */
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compatible = "spidev";
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reg = <0x1>;
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spi-max-frequency = <50000000>;
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controller-data {
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nvidia,enable-hw-based-cs;
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nvidia,rx-clk-tap-delay = <0x10>;
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nvidia,tx-clk-tap-delay = <0x0>;
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};
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};
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};
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spi@3230000{ /* SPI3 in 40 pin conn */
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status = "okay";
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spi@0 { /* chip select 0 */
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compatible = "spidev";
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reg = <0x0>;
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spi-max-frequency = <50000000>;
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controller-data {
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nvidia,enable-hw-based-cs;
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nvidia,rx-clk-tap-delay = <0x10>;
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nvidia,tx-clk-tap-delay = <0x0>;
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};
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};
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spi@1 { /* chips select 1 */
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compatible = "spidev";
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reg = <0x1>;
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spi-max-frequency = <50000000>;
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controller-data {
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nvidia,enable-hw-based-cs;
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nvidia,rx-clk-tap-delay = <0x10>;
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nvidia,tx-clk-tap-delay = <0x0>;
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};
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};
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};
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ether_qos@2490000 {
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nvidia,phy-reset-gpio = <&tegra_main_gpio TEGRA194_MAIN_GPIO(R, 1) 0>;
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nvidia,phy-reset-post-delay = <224>;
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nvidia,phy-reset-duration = <10000>;
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mdio {
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compatible = "nvidia,eqos-mdio";
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#address-cells = <1>;
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#size-cells = <0>;
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phy0: ethernet-phy@0 {
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reg = <1>;
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};
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};
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};
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/* QSPI flash S25FS128SAGNFI103 is controlled by qspi0 */
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spi@3270000 {
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spi-max-frequency = <136000000>;
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status = "okay";
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prod-settings {
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#prod-cells = <3>;
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prod {
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prod = <0x04 0x000000ff 0x10>;
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};
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};
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/* QSPI NOR */
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spiflash@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "s25fs256s";
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reg = <0>;
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spi-max-frequency = <136000000>;
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partition@0 {
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label = "Whole_flash0";
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reg = <0x00000000 0x2000000>; /* size of QSPI-NOR 32MB == 256Mb */
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};
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controller-data {
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nvidia,x1-len-limit = <16>;
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nvidia,x1-bus-speed = <136000000>; /* In Mhz */
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nvidia,x1-dymmy-cycle = <8>;
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nvidia,x4-bus-speed = <136000000>;
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nvidia,x4-dymmy-cycle = <8>;
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nvidia,x4-is-ddr=<0>;
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nvidia,ctrl-bus-clk-ratio = <1>;
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};
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};
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};
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clocks-init {
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compatible = "nvidia,clocks-config";
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status = "okay";
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disable {
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clocks = <&aon_clks TEGRA194_CLK_PLLAON>,
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<&bpmp_clks TEGRA194_CLK_CAN1>,
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<&bpmp_clks TEGRA194_CLK_CAN2>;
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};
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};
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};
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#if LINUX_VERSION >= 414
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#include <tegra194-linux-4.14.dtsi>
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#endif
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