forked from rrcarlosr/Jetpack
152 lines
3.4 KiB
C
152 lines
3.4 KiB
C
/*
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* (C) Copyright 2015
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* Kamil Lulko, <kamil.lulko@gmail.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/arch/stm32.h>
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#include "stm32_flash.h"
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flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
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#define STM32_FLASH ((struct stm32_flash_regs *)FLASH_CNTL_BASE)
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void stm32_flash_latency_cfg(int latency)
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{
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/* 5 wait states, Prefetch enabled, D-Cache enabled, I-Cache enabled */
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writel(FLASH_ACR_WS(5) | FLASH_ACR_PRFTEN | FLASH_ACR_ICEN
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| FLASH_ACR_DCEN, &STM32_FLASH->acr);
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}
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static void stm32_flash_lock(u8 lock)
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{
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if (lock) {
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setbits_le32(&STM32_FLASH->cr, STM32_FLASH_CR_LOCK);
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} else {
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writel(STM32_FLASH_KEY1, &STM32_FLASH->key);
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writel(STM32_FLASH_KEY2, &STM32_FLASH->key);
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}
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}
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unsigned long flash_init(void)
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{
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unsigned long total_size = 0;
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u8 i, j;
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for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
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flash_info[i].flash_id = FLASH_STM32;
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flash_info[i].sector_count = CONFIG_SYS_MAX_FLASH_SECT;
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flash_info[i].start[0] = CONFIG_SYS_FLASH_BASE + (i << 20);
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flash_info[i].size = sect_sz_kb[0];
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for (j = 1; j < CONFIG_SYS_MAX_FLASH_SECT; j++) {
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flash_info[i].start[j] = flash_info[i].start[j - 1]
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+ (sect_sz_kb[j - 1]);
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flash_info[i].size += sect_sz_kb[j];
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}
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total_size += flash_info[i].size;
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}
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return total_size;
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}
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void flash_print_info(flash_info_t *info)
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{
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int i;
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if (info->flash_id == FLASH_UNKNOWN) {
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printf("missing or unknown FLASH type\n");
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return;
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} else if (info->flash_id == FLASH_STM32) {
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printf("stm32 Embedded Flash\n");
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}
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printf(" Size: %ld MB in %d Sectors\n",
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info->size >> 20, info->sector_count);
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printf(" Sector Start Addresses:");
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for (i = 0; i < info->sector_count; ++i) {
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if ((i % 5) == 0)
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printf("\n ");
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printf(" %08lX%s",
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info->start[i],
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info->protect[i] ? " (RO)" : " ");
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}
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printf("\n");
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return;
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}
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int flash_erase(flash_info_t *info, int first, int last)
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{
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u8 bank = 0xFF;
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int i;
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for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
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if (info == &flash_info[i]) {
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bank = i;
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break;
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}
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}
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if (bank == 0xFF)
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return -1;
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stm32_flash_lock(0);
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for (i = first; i <= last; i++) {
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while (readl(&STM32_FLASH->sr) & STM32_FLASH_SR_BSY)
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;
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/* clear old sector number before writing a new one */
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clrbits_le32(&STM32_FLASH->cr, STM32_FLASH_CR_SNB_MASK);
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if (bank == 0) {
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setbits_le32(&STM32_FLASH->cr,
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(i << STM32_FLASH_CR_SNB_OFFSET));
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} else if (bank == 1) {
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setbits_le32(&STM32_FLASH->cr,
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((0x10 | i) << STM32_FLASH_CR_SNB_OFFSET));
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} else {
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stm32_flash_lock(1);
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return -1;
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}
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setbits_le32(&STM32_FLASH->cr, STM32_FLASH_CR_SER);
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setbits_le32(&STM32_FLASH->cr, STM32_FLASH_CR_STRT);
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while (readl(&STM32_FLASH->sr) & STM32_FLASH_SR_BSY)
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;
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clrbits_le32(&STM32_FLASH->cr, STM32_FLASH_CR_SER);
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}
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stm32_flash_lock(1);
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return 0;
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}
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int write_buff(flash_info_t *info, uchar *src, ulong addr, ulong cnt)
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{
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ulong i;
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while (readl(&STM32_FLASH->sr) & STM32_FLASH_SR_BSY)
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;
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stm32_flash_lock(0);
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setbits_le32(&STM32_FLASH->cr, STM32_FLASH_CR_PG);
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/* To make things simple use byte writes only */
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for (i = 0; i < cnt; i++) {
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*(uchar *)(addr + i) = src[i];
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/* avoid re-ordering flash data write and busy status
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* check as flash memory space attributes are generally Normal
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*/
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mb();
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while (readl(&STM32_FLASH->sr) & STM32_FLASH_SR_BSY)
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;
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}
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clrbits_le32(&STM32_FLASH->cr, STM32_FLASH_CR_PG);
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stm32_flash_lock(1);
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return 0;
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}
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