forked from rrcarlosr/Jetpack
147 lines
3.6 KiB
C
147 lines
3.6 KiB
C
/*
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* U-Boot - cmd_cache_dump.c
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*
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* Copyright (c) 2007-2008 Analog Devices Inc.
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*
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* Licensed under the GPL-2 or later.
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*/
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#include <config.h>
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#include <common.h>
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#include <command.h>
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#include <console.h>
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#include <asm/blackfin.h>
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#include <asm/mach-common/bits/mpu.h>
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static int check_limit(const char *type, size_t start_limit, size_t end_limit, size_t start, size_t end)
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{
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if (start >= start_limit && start <= end_limit && \
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end <= end_limit && end >= start_limit && \
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start <= end)
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return 0;
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printf("%s limit violation: %zu <= (user:%zu) <= (user:%zu) <= %zu\n",
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type, start_limit, start, end, end_limit);
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return 1;
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}
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int do_icache_dump(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
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{
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int cache_status = icache_status();
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if (cache_status)
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icache_disable();
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uint32_t cmd_base, tag, cache_upper, cache_lower;
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size_t way, way_start = 0, way_end = 3;
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size_t sbnk, sbnk_start = 0, sbnk_end = 3;
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size_t set, set_start = 0, set_end = 31;
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size_t dw;
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if (argc > 1) {
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way_start = way_end = simple_strtoul(argv[1], NULL, 10);
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if (argc > 2) {
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sbnk_start = sbnk_end = simple_strtoul(argv[2], NULL, 10);
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if (argc > 3)
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set_start = set_end = simple_strtoul(argv[3], NULL, 10);
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}
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}
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if (check_limit("way", 0, 3, way_start, way_end) || \
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check_limit("subbank", 0, 3, sbnk_start, sbnk_end) || \
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check_limit("set", 0, 31, set_start, set_end))
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return 1;
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puts("Way:Subbank:Set: [valid-tag lower upper] {invalid-tag lower upper}...\n");
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for (way = way_start; way <= way_end; ++way) {
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for (sbnk = sbnk_start; sbnk <= sbnk_end; ++sbnk) {
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for (set = set_start; set <= set_end; ++set) {
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printf("%zu:%zu:%2zu: ", way, sbnk, set);
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for (dw = 0; dw < 4; ++dw) {
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if (ctrlc())
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return 1;
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cmd_base = \
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(way << 26) | \
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(sbnk << 16) | \
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(set << 5) | \
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(dw << 3);
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/* first read the tag */
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bfin_write_ITEST_COMMAND(cmd_base | 0x0);
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SSYNC();
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tag = bfin_read_ITEST_DATA0();
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printf("%c%08x ", (tag & 0x1 ? ' ' : '{'), tag);
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/* grab the data at this loc */
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bfin_write_ITEST_COMMAND(cmd_base | 0x4);
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SSYNC();
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cache_lower = bfin_read_ITEST_DATA0();
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cache_upper = bfin_read_ITEST_DATA1();
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printf("%08x %08x%c ", cache_lower, cache_upper, (tag & 0x1 ? ' ' : '}'));
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}
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puts("\n");
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}
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}
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}
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if (cache_status)
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icache_enable();
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return 0;
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}
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U_BOOT_CMD(icache_dump, 4, 0, do_icache_dump,
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"icache_dump - dump current instruction cache\n",
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"[way] [subbank] [set]");
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int do_dcache_dump(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
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{
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u32 way, bank, subbank, set;
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u32 status, addr;
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u32 dmem_ctl = bfin_read_DMEM_CONTROL();
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for (bank = 0; bank < 2; ++bank) {
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if (!(dmem_ctl & (1 << (DMC1_P - bank))))
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continue;
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for (way = 0; way < 2; ++way)
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for (subbank = 0; subbank < 4; ++subbank) {
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printf("%i:%i:%i:\t", bank, way, subbank);
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for (set = 0; set < 64; ++set) {
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if (ctrlc())
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return 1;
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/* retrieve a cache tag */
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bfin_write_DTEST_COMMAND(
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way << 26 |
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bank << 23 |
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subbank << 16 |
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set << 5
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);
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CSYNC();
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status = bfin_read_DTEST_DATA0();
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/* construct the address using the tag */
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addr = (status & 0xFFFFC800) | (subbank << 12) | (set << 5);
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/* show it */
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if (set && !(set % 4))
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puts("\n\t");
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printf("%c%08x%c%08x%c ", (status & 0x1 ? '[' : '{'), status, (status & 0x2 ? 'd' : ' '), addr, (status & 0x1 ? ']' : '}'));
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}
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puts("\n");
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}
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}
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return 0;
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}
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U_BOOT_CMD(dcache_dump, 4, 0, do_dcache_dump,
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"dcache_dump - dump current data cache\n",
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"[bank] [way] [subbank] [set]");
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