forked from rrcarlosr/Jetpack
82 lines
2.0 KiB
C
82 lines
2.0 KiB
C
/*
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* Copyright (C) 2004-2006 Atmel Corporation
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/arch/cacheflush.h>
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void dcache_clean_range(volatile void *start, size_t size)
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{
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unsigned long v, begin, end, linesz;
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linesz = CONFIG_SYS_DCACHE_LINESZ;
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/* You asked for it, you got it */
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begin = (unsigned long)start & ~(linesz - 1);
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end = ((unsigned long)start + size + linesz - 1) & ~(linesz - 1);
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for (v = begin; v < end; v += linesz)
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dcache_clean_line((void *)v);
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sync_write_buffer();
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}
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void invalidate_dcache_range(unsigned long start, unsigned long stop)
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{
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unsigned long v, linesz;
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linesz = CONFIG_SYS_DCACHE_LINESZ;
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/* You asked for it, you got it */
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start = start & ~(linesz - 1);
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stop = (stop + linesz - 1) & ~(linesz - 1);
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for (v = start; v < stop; v += linesz)
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dcache_invalidate_line((void *)v);
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}
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void flush_dcache_range(unsigned long start, unsigned long stop)
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{
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unsigned long v, linesz;
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linesz = CONFIG_SYS_DCACHE_LINESZ;
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/* You asked for it, you got it */
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start = start & ~(linesz - 1);
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stop = (stop + linesz - 1) & ~(linesz - 1);
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for (v = start; v < stop; v += linesz)
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dcache_flush_line((void *)v);
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sync_write_buffer();
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}
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void icache_invalidate_range(volatile void *start, size_t size)
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{
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unsigned long v, begin, end, linesz;
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linesz = CONFIG_SYS_ICACHE_LINESZ;
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/* You asked for it, you got it */
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begin = (unsigned long)start & ~(linesz - 1);
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end = ((unsigned long)start + size + linesz - 1) & ~(linesz - 1);
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for (v = begin; v < end; v += linesz)
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icache_invalidate_line((void *)v);
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}
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/*
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* This is called after loading something into memory. We need to
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* make sure that everything that was loaded is actually written to
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* RAM, and that the icache will look for it. Cleaning the dcache and
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* invalidating the icache will do the trick.
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*/
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void flush_cache (unsigned long start_addr, unsigned long size)
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{
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dcache_clean_range((void *)start_addr, size);
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icache_invalidate_range((void *)start_addr, size);
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}
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