forked from rrcarlosr/Jetpack
176 lines
3.9 KiB
C
176 lines
3.9 KiB
C
/*
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* drivers/misc/tegra-profiler/debug.c
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*
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* Copyright (c) 2015-2017, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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*/
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#include <linux/module.h>
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#include <asm/irq_regs.h>
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#include <linux/tegra_profiler.h>
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#include "debug.h"
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#include "hrt.h"
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#include "tegra.h"
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#include "comm.h"
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#ifdef QM_DEBUG_SAMPLES_ENABLE
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static inline void
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init_sample(struct quadd_record_data *record, struct pt_regs *regs)
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{
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unsigned int flags;
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struct quadd_debug_data *s = &record->debug;
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record->magic = QUADD_RECORD_MAGIC;
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record->record_type = QUADD_RECORD_TYPE_DEBUG;
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if (!regs)
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regs = get_irq_regs();
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if (!regs)
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s->user_mode = 0;
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else
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s->user_mode = user_mode(regs) ? 1 : 0;
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s->cpu = quadd_get_processor_id(regs, &flags);
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s->lp_mode = flags & QUADD_CPUMODE_TEGRA_POWER_CLUSTER_LP ? 1 : 0;
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s->thumb_mode = flags & QUADD_CPUMODE_THUMB ? 1 : 0;
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s->reserved = 0;
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s->pid = 0;
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s->time = quadd_get_time();
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s->extra_value[0] = 0;
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s->extra_value[1] = 0;
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s->extra_length = 0;
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}
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void qm_debug_handler_sample(struct pt_regs *regs)
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{
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struct quadd_record_data record;
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struct quadd_debug_data *s = &record.debug;
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init_sample(&record, regs);
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s->type = QM_DEBUG_SAMPLE_TYPE_TIMER_HANDLE;
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quadd_put_sample_this_cpu(&record, NULL, 0);
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}
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void qm_debug_timer_forward(struct pt_regs *regs, u64 period)
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{
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struct quadd_record_data record;
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struct quadd_debug_data *s = &record.debug;
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init_sample(&record, regs);
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s->type = QM_DEBUG_SAMPLE_TYPE_TIMER_FORWARD;
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quadd_put_sample_this_cpu(&record, NULL, 0);
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}
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void qm_debug_timer_start(struct pt_regs *regs, u64 period)
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{
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struct quadd_record_data record;
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struct quadd_debug_data *s = &record.debug;
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init_sample(&record, regs);
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s->type = QM_DEBUG_SAMPLE_TYPE_TIMER_START;
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quadd_put_sample_this_cpu(&record, NULL, 0);
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}
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void qm_debug_timer_cancel(void)
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{
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struct quadd_record_data record;
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struct quadd_debug_data *s = &record.debug;
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init_sample(&record, NULL);
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s->type = QM_DEBUG_SAMPLE_TYPE_TIMER_CANCEL;
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quadd_put_sample_this_cpu(&record, NULL, 0);
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}
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void
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qm_debug_task_sched_in(pid_t prev_pid, pid_t current_pid, int prev_nr_active)
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{
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struct quadd_iovec vec;
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struct quadd_record_data record;
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struct quadd_debug_data *s = &record.debug;
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init_sample(&record, NULL);
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s->type = QM_DEBUG_SAMPLE_TYPE_SCHED_IN;
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s->extra_value[0] = prev_pid;
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s->extra_value[1] = current_pid;
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vec.base = &prev_nr_active;
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vec.len = s->extra_length = sizeof(prev_nr_active);
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quadd_put_sample_this_cpu(&record, &vec, 1);
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}
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void qm_debug_read_counter(struct quadd_event *event, u32 prev_val, u32 val)
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{
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struct quadd_iovec vec;
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struct quadd_record_data record;
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struct quadd_debug_data *s = &record.debug;
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init_sample(&record, NULL);
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s->type = QM_DEBUG_SAMPLE_TYPE_READ_COUNTER;
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s->extra_value[0] = event->id;
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s->extra_value[1] = prev_val;
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vec.base = &val;
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vec.len = s->extra_length = sizeof(val);
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quadd_put_sample_this_cpu(&record, &vec, 1);
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}
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void qm_debug_start_source(int source_type)
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{
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struct quadd_record_data record;
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struct quadd_debug_data *s = &record.debug;
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init_sample(&record, NULL);
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s->type = QM_DEBUG_SAMPLE_TYPE_SOURCE_START;
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s->extra_value[0] = source_type;
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quadd_put_sample_this_cpu(&record, NULL, 0);
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}
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void qm_debug_stop_source(int source_type)
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{
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struct quadd_record_data record;
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struct quadd_debug_data *s = &record.debug;
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init_sample(&record, NULL);
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s->type = QM_DEBUG_SAMPLE_TYPE_SOURCE_STOP;
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s->extra_value[0] = source_type;
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quadd_put_sample_this_cpu(&record, NULL, 0);
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}
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#endif /* QM_DEBUG_SAMPLES_ENABLE */
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