forked from rrcarlosr/Jetpack
122 lines
3.7 KiB
Plaintext
122 lines
3.7 KiB
Plaintext
/*
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* Copyright (c) 2015, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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*
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*/
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/ {
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tegra_pwm1: pwm@3280000 {
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compatible = "nvidia,tegra186-pwm";
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reg = <0x0 0x3280000 0x0 0x10000>;
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clocks = <&tegra_car TEGRA186_CLK_PWM1>,
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<&tegra_car TEGRA186_CLK_PLLP_OUT0>,
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<&tegra_car TEGRA186_CLK_CLK_M>;
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clock-names = "pwm", "parent", "slow-parent";
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#pwm-cells = <2>;
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resets = <&tegra_car TEGRA186_RESET_PWM1>;
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reset-names = "pwm";
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status = "disabled";
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};
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tegra_pwm2: pwm@3290000 {
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compatible = "nvidia,tegra186-pwm";
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reg = <0x0 0x3290000 0x0 0x10000>;
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clocks = <&tegra_car TEGRA186_CLK_PWM2>,
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<&tegra_car TEGRA186_CLK_PLLP_OUT0>,
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<&tegra_car TEGRA186_CLK_CLK_M>;
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clock-names = "pwm", "parent", "slow-parent";
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#pwm-cells = <2>;
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resets = <&tegra_car TEGRA186_RESET_PWM2>;
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reset-names = "pwm";
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status = "disabled";
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};
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tegra_pwm3: pwm@32a0000 {
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compatible = "nvidia,tegra186-pwm";
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reg = <0x0 0x32a0000 0x0 0x10000>;
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clocks = <&tegra_car TEGRA186_CLK_PWM3>,
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<&tegra_car TEGRA186_CLK_PLLP_OUT0>,
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<&tegra_car TEGRA186_CLK_CLK_M>;
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clock-names = "pwm", "parent", "slow-parent";
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#pwm-cells = <2>;
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resets = <&tegra_car TEGRA186_RESET_PWM3>;
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reset-names = "pwm";
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status = "disabled";
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};
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tegra_pwm4: pwm@c340000 {
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compatible = "nvidia,tegra186-pwm";
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reg = <0x0 0xc340000 0x0 0x10000>;
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clocks = <&tegra_car TEGRA186_CLK_PWM4>;
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clock-names = "pwm";
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#pwm-cells = <2>;
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resets = <&tegra_car TEGRA186_RESET_PWM4>;
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reset-names = "pwm";
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status = "disabled";
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};
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tegra_pwm5: pwm@32c0000 {
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compatible = "nvidia,tegra186-pwm";
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reg = <0x0 0x32c0000 0x0 0x10000>;
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clocks = <&tegra_car TEGRA186_CLK_PWM5>,
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<&tegra_car TEGRA186_CLK_PLLP_OUT0>,
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<&tegra_car TEGRA186_CLK_CLK_M>;
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clock-names = "pwm", "parent", "slow-parent";
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#pwm-cells = <2>;
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resets = <&tegra_car TEGRA186_RESET_PWM5>;
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reset-names = "pwm";
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status = "disabled";
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};
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tegra_pwm6: pwm@32d0000 {
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compatible = "nvidia,tegra186-pwm";
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reg = <0x0 0x32d0000 0x0 0x10000>;
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clocks = <&tegra_car TEGRA186_CLK_PWM6>,
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<&tegra_car TEGRA186_CLK_PLLP_OUT0>,
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<&tegra_car TEGRA186_CLK_CLK_M>;
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clock-names = "pwm", "parent", "slow-parent";
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#pwm-cells = <2>;
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resets = <&tegra_car TEGRA186_RESET_PWM6>;
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reset-names = "pwm";
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status = "disabled";
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};
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tegra_pwm7: pwm@32e0000 {
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compatible = "nvidia,tegra186-pwm";
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reg = <0x0 0x32e0000 0x0 0x10000>;
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clocks = <&tegra_car TEGRA186_CLK_PWM7>,
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<&tegra_car TEGRA186_CLK_PLLP_OUT0>,
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<&tegra_car TEGRA186_CLK_CLK_M>;
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clock-names = "pwm", "parent", "slow-parent";
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#pwm-cells = <2>;
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resets = <&tegra_car TEGRA186_RESET_PWM7>;
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reset-names = "pwm";
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status = "disabled";
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};
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tegra_pwm8: pwm@32f0000 {
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compatible = "nvidia,tegra186-pwm";
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reg = <0x0 0x32f0000 0x0 0x10000>;
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clocks = <&tegra_car TEGRA186_CLK_PWM8>,
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<&tegra_car TEGRA186_CLK_PLLP_OUT0>,
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<&tegra_car TEGRA186_CLK_CLK_M>;
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clock-names = "pwm", "parent", "slow-parent";
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#pwm-cells = <2>;
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resets = <&tegra_car TEGRA186_RESET_PWM8>;
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reset-names = "pwm";
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status = "disabled";
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};
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};
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