Jetpack/hardware/nvidia/soc/t18x/kernel-dts/tegra186-soc/tegra186-soc-i2c.dtsi
dchvs 31faf4d851 cti_kernel: Add CTI sources
Elroy L4T r32.4.4 – JetPack 4.4.1
2021-03-15 20:15:11 -06:00

206 lines
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/*
* Copyright (c) 2015-2016, NVIDIA CORPORATION. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
*
*/
#include <dt-bindings/gpio/tegra186-gpio.h>
/ {
aliases {
i2c0 = &gen1_i2c;
i2c1 = &gen2_i2c;
i2c2 = &cam_i2c;
i2c3 = &dp_aux_ch1_i2c;
i2c4 = &pwr_i2c;
i2c5 = &dp_aux_ch0_i2c;
i2c6 = &gen7_i2c;
i2c7 = &gen8_i2c;
i2c8 = &gen9_i2c;
};
gen1_i2c: i2c@3160000 {
#address-cells = <1>;
#size-cells = <0>;
iommus = <&smmu TEGRA_SID_GPCDMA_0>;
compatible = "nvidia,tegra186-i2c";
reg = <0x0 0x3160000 0x0 0x100>;
interrupts = <0 TEGRA186_IRQ_I2C1 0x04>;
scl-gpio = <&tegra_main_gpio TEGRA_MAIN_GPIO(C, 5) 0>;
sda-gpio = <&tegra_main_gpio TEGRA_MAIN_GPIO(C, 6) 0>;
status = "disabled";
clock-frequency = <400000>;
clocks = <&tegra_car TEGRA186_CLK_I2C1
&tegra_car TEGRA186_CLK_PLLP_OUT0
&tegra_car TEGRA186_CLK_I2C_SLOW>;
clock-names = "div-clk", "parent", "slow-clk";
resets = <&tegra_car TEGRA186_RESET_I2C1>;
reset-names = "i2c";
dmas = <&gpcdma 21>, <&gpcdma 21>;
dma-names = "rx", "tx";
};
gen2_i2c: i2c@c240000 {
#address-cells = <1>;
#size-cells = <0>;
iommus = <&smmu TEGRA_SID_GPCDMA_0>;
compatible = "nvidia,tegra186-i2c";
reg = <0x0 0xc240000 0x0 0x100>;
interrupts = <0 TEGRA186_IRQ_I2C2 0x04>;
scl-gpio = <&tegra_aon_gpio TEGRA_AON_GPIO(EE, 0) 0>;
sda-gpio = <&tegra_aon_gpio TEGRA_AON_GPIO(EE, 1) 0>;
status = "okay";
clock-frequency = <100000>;
clocks = <&tegra_car TEGRA186_CLK_I2C2
&tegra_car TEGRA186_CLK_PLLP_OUT0
&tegra_car TEGRA186_CLK_AON_I2C_SLOW>;
clock-names = "div-clk", "parent", "slow-clk";
resets = <&tegra_car TEGRA186_RESET_I2C2>;
reset-names = "i2c";
dmas = <&gpcdma 22>, <&gpcdma 22>;
dma-names = "rx", "tx";
};
cam_i2c: i2c@3180000 {
#address-cells = <1>;
#size-cells = <0>;
iommus = <&smmu TEGRA_SID_GPCDMA_0>;
compatible = "nvidia,tegra186-i2c";
reg = <0x0 0x3180000 0x0 0x100>;
interrupts = <0 TEGRA186_IRQ_I2C3 0x04>;
scl-gpio = <&tegra_main_gpio TEGRA_MAIN_GPIO(O, 2) 0>;
sda-gpio = <&tegra_main_gpio TEGRA_MAIN_GPIO(O, 3) 0>;
status = "disabled";
clock-frequency = <400000>;
clocks = <&tegra_car TEGRA186_CLK_I2C3
&tegra_car TEGRA186_CLK_PLLP_OUT0
&tegra_car TEGRA186_CLK_I2C_SLOW>;
clock-names = "div-clk", "parent", "slow-clk";
resets = <&tegra_car TEGRA186_RESET_I2C3>;
reset-names = "i2c";
dmas = <&gpcdma 23>, <&gpcdma 23>;
dma-names = "rx", "tx";
};
dp_aux_ch1_i2c: i2c@3190000 {
#address-cells = <1>;
#size-cells = <0>;
iommus = <&smmu TEGRA_SID_GPCDMA_0>;
compatible = "nvidia,tegra186-i2c";
reg = <0x0 0x3190000 0x0 0x100>;
interrupts = <0 TEGRA186_IRQ_I2C4 0x04>;
status = "disabled";
clock-frequency = <100000>;
clocks = <&tegra_car TEGRA186_CLK_I2C4
&tegra_car TEGRA186_CLK_PLLP_OUT0
&tegra_car TEGRA186_CLK_AON_I2C_SLOW>;
clock-names = "div-clk", "parent", "slow-clk";
resets = <&tegra_car TEGRA186_RESET_I2C4>;
reset-names = "i2c";
dmas = <&gpcdma 26>, <&gpcdma 26>;
dma-names = "rx", "tx";
};
pwr_i2c: bpmp_i2c {
#address-cells = <1>;
#size-cells = <0>;
compatible = "nvidia,tegra186-bpmp-i2c";
status = "disabled";
adapter = <5>;
};
dp_aux_ch0_i2c: i2c@31b0000 {
#address-cells = <1>;
#size-cells = <0>;
iommus = <&smmu TEGRA_SID_GPCDMA_0>;
compatible = "nvidia,tegra186-i2c";
reg = <0x0 0x31b0000 0x0 0x100>;
interrupts = <0 TEGRA186_IRQ_I2C6 0x04>;
status = "disabled";
clock-frequency = <100000>;
clocks = <&tegra_car TEGRA186_CLK_I2C6
&tegra_car TEGRA186_CLK_PLLP_OUT0
&tegra_car TEGRA186_CLK_I2C_SLOW>;
clock-names = "div-clk", "parent", "slow-clk";
resets = <&tegra_car TEGRA186_RESET_I2C6>;
reset-names = "i2c";
dmas = <&gpcdma 30>, <&gpcdma 30>;
dma-names = "rx", "tx";
};
gen7_i2c: i2c@31c0000 {
#address-cells = <1>;
#size-cells = <0>;
iommus = <&smmu TEGRA_SID_GPCDMA_0>;
compatible = "nvidia,tegra186-i2c";
reg = <0x0 0x31c0000 0x0 0x100>;
interrupts = <0 TEGRA186_IRQ_I2C7 0x04>;
scl-gpio = <&tegra_main_gpio TEGRA_MAIN_GPIO(L, 0) 0>;
sda-gpio = <&tegra_main_gpio TEGRA_MAIN_GPIO(L, 1) 0>;
status = "disabled";
clock-frequency = <400000>;
clocks = <&tegra_car TEGRA186_CLK_I2C7
&tegra_car TEGRA186_CLK_PLLP_OUT0
&tegra_car TEGRA186_CLK_I2C_SLOW>;
clock-names = "div-clk", "parent", "slow-clk";
resets = <&tegra_car TEGRA186_RESET_I2C7>;
reset-names = "i2c";
dmas = <&gpcdma 27>, <&gpcdma 27>;
dma-names = "rx", "tx";
};
gen8_i2c: i2c@c250000 {
#address-cells = <1>;
#size-cells = <0>;
iommus = <&smmu TEGRA_SID_GPCDMA_0>;
compatible = "nvidia,tegra186-i2c";
reg = <0x0 0xc250000 0x0 0x100>;
interrupts = <0 TEGRA186_IRQ_I2C8 0x04>;
scl-gpio = <&tegra_aon_gpio TEGRA_AON_GPIO(W, 0) 0>;
sda-gpio = <&tegra_aon_gpio TEGRA_AON_GPIO(W, 1) 0>;
status = "disabled";
clock-frequency = <400000>;
clocks = <&tegra_car TEGRA186_CLK_I2C8
&tegra_car TEGRA186_CLK_PLLP_OUT0
&tegra_car TEGRA186_CLK_AON_I2C_SLOW>;
clock-names = "div-clk", "parent", "slow-clk";
resets = <&tegra_car TEGRA186_RESET_I2C8>;
reset-names = "i2c";
dmas = <&gpcdma 0>, <&gpcdma 0>;
dma-names = "rx", "tx";
};
gen9_i2c: i2c@31e0000 {
#address-cells = <1>;
#size-cells = <0>;
iommus = <&smmu TEGRA_SID_GPCDMA_0>;
compatible = "nvidia,tegra186-i2c";
reg = <0x0 0x31e0000 0x0 0x100>;
interrupts = <0 TEGRA186_IRQ_I2C9 0x04>;
scl-gpio = <&tegra_main_gpio TEGRA_MAIN_GPIO(L, 2) 0>;
sda-gpio = <&tegra_main_gpio TEGRA_MAIN_GPIO(L, 3) 0>;
status = "disabled";
clock-frequency = <400000>;
clocks = <&tegra_car TEGRA186_CLK_I2C9
&tegra_car TEGRA186_CLK_PLLP_OUT0
&tegra_car TEGRA186_CLK_I2C_SLOW>;
clock-names = "div-clk", "parent", "slow-clk";
resets = <&tegra_car TEGRA186_RESET_I2C9>;
reset-names = "i2c";
dmas = <&gpcdma 31>, <&gpcdma 31>;
dma-names = "rx", "tx";
};
};