forked from rrcarlosr/Jetpack
32 lines
878 B
C
32 lines
878 B
C
#ifndef DT_BINDINGS_MEMORY_TEGRA124_MC_H
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#define DT_BINDINGS_MEMORY_TEGRA124_MC_H
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#define TEGRA_SWGROUP_PTC 0
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#define TEGRA_SWGROUP_DC 1
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#define TEGRA_SWGROUP_DCB 2
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#define TEGRA_SWGROUP_AFI 3
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#define TEGRA_SWGROUP_AVPC 4
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#define TEGRA_SWGROUP_HDA 5
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#define TEGRA_SWGROUP_HC 6
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#define TEGRA_SWGROUP_MSENC 7
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#define TEGRA_SWGROUP_PPCS 8
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#define TEGRA_SWGROUP_SATA 9
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#define TEGRA_SWGROUP_VDE 10
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#define TEGRA_SWGROUP_MPCORELP 11
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#define TEGRA_SWGROUP_MPCORE 12
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#define TEGRA_SWGROUP_ISP2 13
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#define TEGRA_SWGROUP_XUSB_HOST 14
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#define TEGRA_SWGROUP_XUSB_DEV 15
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#define TEGRA_SWGROUP_ISP2B 16
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#define TEGRA_SWGROUP_TSEC 17
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#define TEGRA_SWGROUP_A9AVP 18
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#define TEGRA_SWGROUP_GPU 19
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#define TEGRA_SWGROUP_SDMMC1A 20
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#define TEGRA_SWGROUP_SDMMC2A 21
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#define TEGRA_SWGROUP_SDMMC3A 22
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#define TEGRA_SWGROUP_SDMMC4A 23
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#define TEGRA_SWGROUP_VIC 24
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#define TEGRA_SWGROUP_VI 25
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#endif
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