forked from rrcarlosr/Jetpack
576 lines
14 KiB
C
576 lines
14 KiB
C
/*
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* Copyright (c) 2014-2018, NVIDIA CORPORATION. All rights reserved.
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* Copyright (c) 2015, Google Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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#ifndef __PHY_TEGRA_XUSB_H
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#define __PHY_TEGRA_XUSB_H
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#include <linux/io.h>
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#include <linux/iopoll.h>
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#include <linux/mutex.h>
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#include <linux/workqueue.h>
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#include <linux/usb/ch9.h>
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#include <linux/phy/tegra/xusb.h>
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/* legacy entry points for backwards-compatibility */
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int tegra_xusb_padctl_legacy_probe(struct platform_device *pdev);
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int tegra_xusb_padctl_legacy_remove(struct platform_device *pdev);
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struct phy;
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struct phy_provider;
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struct platform_device;
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struct regulator;
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/*
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* lanes
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*/
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struct tegra_xusb_lane_soc {
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const char *name;
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unsigned int offset;
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unsigned int shift;
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unsigned int mask;
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const char * const *funcs;
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unsigned int num_funcs;
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};
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struct tegra_xusb_lane {
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const struct tegra_xusb_lane_soc *soc;
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struct tegra_xusb_pad *pad;
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struct device_node *np;
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struct list_head list;
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unsigned int function;
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unsigned int index;
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};
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int tegra_xusb_lane_parse_dt(struct tegra_xusb_lane *lane,
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struct device_node *np);
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struct tegra_xusb_usb3_lane {
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struct tegra_xusb_lane base;
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};
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static inline struct tegra_xusb_usb3_lane *
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to_usb3_lane(struct tegra_xusb_lane *lane)
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{
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return container_of(lane, struct tegra_xusb_usb3_lane, base);
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}
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struct tegra_xusb_usb2_lane {
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struct tegra_xusb_lane base;
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u32 hs_curr_level_offset;
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bool powered_on;
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};
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static inline struct tegra_xusb_usb2_lane *
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to_usb2_lane(struct tegra_xusb_lane *lane)
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{
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return container_of(lane, struct tegra_xusb_usb2_lane, base);
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}
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struct tegra_xusb_ulpi_lane {
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struct tegra_xusb_lane base;
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};
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static inline struct tegra_xusb_ulpi_lane *
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to_ulpi_lane(struct tegra_xusb_lane *lane)
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{
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return container_of(lane, struct tegra_xusb_ulpi_lane, base);
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}
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struct tegra_xusb_hsic_lane {
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struct tegra_xusb_lane base;
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u32 strobe_trim;
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u32 rx_strobe_trim;
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u32 rx_data_trim;
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u32 tx_rtune_n;
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u32 tx_rtune_p;
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u32 tx_rslew_n;
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u32 tx_rslew_p;
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bool auto_term;
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};
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static inline struct tegra_xusb_hsic_lane *
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to_hsic_lane(struct tegra_xusb_lane *lane)
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{
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return container_of(lane, struct tegra_xusb_hsic_lane, base);
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}
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struct tegra_xusb_pcie_lane {
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struct tegra_xusb_lane base;
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};
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static inline struct tegra_xusb_pcie_lane *
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to_pcie_lane(struct tegra_xusb_lane *lane)
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{
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return container_of(lane, struct tegra_xusb_pcie_lane, base);
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}
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struct tegra_xusb_sata_lane {
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struct tegra_xusb_lane base;
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};
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static inline struct tegra_xusb_sata_lane *
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to_sata_lane(struct tegra_xusb_lane *lane)
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{
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return container_of(lane, struct tegra_xusb_sata_lane, base);
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}
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struct tegra_xusb_lane_ops {
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struct tegra_xusb_lane *(*probe)(struct tegra_xusb_pad *pad,
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struct device_node *np,
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unsigned int index);
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void (*remove)(struct tegra_xusb_lane *lane);
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};
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bool tegra_xusb_lane_check(struct tegra_xusb_lane *lane,
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const char *function);
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/*
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* pads
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*/
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struct tegra_xusb_pad_soc;
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struct tegra_xusb_padctl;
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struct tegra_xusb_pad_ops {
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struct tegra_xusb_pad *(*probe)(struct tegra_xusb_padctl *padctl,
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const struct tegra_xusb_pad_soc *soc,
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struct device_node *np);
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void (*remove)(struct tegra_xusb_pad *pad);
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};
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struct tegra_xusb_pad_soc {
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const char *name;
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const struct tegra_xusb_lane_soc *lanes;
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unsigned int num_lanes;
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const struct tegra_xusb_pad_ops *ops;
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};
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struct tegra_xusb_pad {
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const struct tegra_xusb_pad_soc *soc;
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struct tegra_xusb_padctl *padctl;
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struct phy_provider *provider;
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struct phy **lanes;
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struct device dev;
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const struct tegra_xusb_lane_ops *ops;
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struct list_head list;
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};
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static inline struct tegra_xusb_pad *to_tegra_xusb_pad(struct device *dev)
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{
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return container_of(dev, struct tegra_xusb_pad, dev);
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}
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int tegra_xusb_pad_init(struct tegra_xusb_pad *pad,
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struct tegra_xusb_padctl *padctl,
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struct device_node *np);
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int tegra_xusb_pad_register(struct tegra_xusb_pad *pad,
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const struct phy_ops *ops);
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void tegra_xusb_pad_unregister(struct tegra_xusb_pad *pad);
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struct tegra_xusb_usb3_pad {
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struct tegra_xusb_pad base;
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unsigned int enable;
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struct mutex lock;
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};
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static inline struct tegra_xusb_usb3_pad *
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to_usb3_pad(struct tegra_xusb_pad *pad)
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{
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return container_of(pad, struct tegra_xusb_usb3_pad, base);
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}
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struct tegra_xusb_usb2_pad {
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struct tegra_xusb_pad base;
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struct clk *clk;
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unsigned int enable;
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struct mutex lock;
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};
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static inline struct tegra_xusb_usb2_pad *
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to_usb2_pad(struct tegra_xusb_pad *pad)
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{
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return container_of(pad, struct tegra_xusb_usb2_pad, base);
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}
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struct tegra_xusb_ulpi_pad {
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struct tegra_xusb_pad base;
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};
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static inline struct tegra_xusb_ulpi_pad *
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to_ulpi_pad(struct tegra_xusb_pad *pad)
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{
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return container_of(pad, struct tegra_xusb_ulpi_pad, base);
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}
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struct tegra_xusb_hsic_pad {
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struct tegra_xusb_pad base;
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struct regulator *supply;
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struct clk *clk;
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};
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static inline struct tegra_xusb_hsic_pad *
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to_hsic_pad(struct tegra_xusb_pad *pad)
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{
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return container_of(pad, struct tegra_xusb_hsic_pad, base);
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}
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struct tegra_xusb_pcie_pad {
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struct tegra_xusb_pad base;
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struct reset_control *rst;
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struct clk *pll;
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unsigned int enable;
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};
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static inline struct tegra_xusb_pcie_pad *
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to_pcie_pad(struct tegra_xusb_pad *pad)
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{
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return container_of(pad, struct tegra_xusb_pcie_pad, base);
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}
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struct tegra_xusb_sata_pad {
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struct tegra_xusb_pad base;
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struct reset_control *rst;
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struct clk *pll;
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unsigned int enable;
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};
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static inline struct tegra_xusb_sata_pad *
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to_sata_pad(struct tegra_xusb_pad *pad)
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{
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return container_of(pad, struct tegra_xusb_sata_pad, base);
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}
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/*
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* ports
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*/
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struct tegra_xusb_port_ops;
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struct tegra_xusb_port {
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struct tegra_xusb_padctl *padctl;
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struct tegra_xusb_lane *lane;
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unsigned int index;
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struct list_head list;
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struct device dev;
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const struct tegra_xusb_port_ops *ops;
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};
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struct tegra_xusb_lane_map {
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unsigned int port;
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const char *type;
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unsigned int index;
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const char *func;
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};
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struct tegra_xusb_lane *
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tegra_xusb_port_find_lane(struct tegra_xusb_port *port,
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const struct tegra_xusb_lane_map *map,
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const char *function);
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struct tegra_xusb_port *
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tegra_xusb_find_port(struct tegra_xusb_padctl *padctl, const char *type,
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unsigned int index);
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enum tegra_xusb_usb_port_cap {
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USB_PORT_DISABLED = 0,
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USB_HOST_CAP,
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USB_DEVICE_CAP,
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USB_OTG_CAP,
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};
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struct tegra_xusb_usb2_port {
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struct tegra_xusb_port base;
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struct regulator *supply;
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bool internal;
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enum tegra_xusb_usb_port_cap port_cap;
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int oc_pin;
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int usb3_port_fake; /* only required for T210 device mode */
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int vbus_id;
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};
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static inline struct tegra_xusb_usb2_port *
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to_usb2_port(struct tegra_xusb_port *port)
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{
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return container_of(port, struct tegra_xusb_usb2_port, base);
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}
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struct tegra_xusb_usb2_port *
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tegra_xusb_find_usb2_port(struct tegra_xusb_padctl *padctl,
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unsigned int index);
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struct tegra_xusb_ulpi_port {
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struct tegra_xusb_port base;
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struct regulator *supply;
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bool internal;
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};
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static inline struct tegra_xusb_ulpi_port *
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to_ulpi_port(struct tegra_xusb_port *port)
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{
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return container_of(port, struct tegra_xusb_ulpi_port, base);
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}
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struct tegra_xusb_hsic_port {
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struct tegra_xusb_port base;
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};
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static inline struct tegra_xusb_hsic_port *
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to_hsic_port(struct tegra_xusb_port *port)
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{
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return container_of(port, struct tegra_xusb_hsic_port, base);
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}
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struct tegra_xusb_hsic_port *
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tegra_xusb_find_hsic_port(struct tegra_xusb_padctl *padctl, unsigned int index);
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struct tegra_xusb_usb3_port {
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struct tegra_xusb_port base;
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bool context_saved;
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unsigned int port; /* port number of companion USB2 port */
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bool internal;
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enum tegra_xusb_usb_port_cap port_cap;
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int oc_pin;
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bool gen1_only;
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int vbus_id;
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u32 tap1;
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u32 amp;
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u32 ctle_z;
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u32 ctle_g;
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};
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static inline struct tegra_xusb_usb3_port *
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to_usb3_port(struct tegra_xusb_port *port)
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{
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return container_of(port, struct tegra_xusb_usb3_port, base);
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}
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struct tegra_xusb_usb3_port *
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tegra_xusb_find_usb3_port(struct tegra_xusb_padctl *padctl,
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unsigned int index);
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struct tegra_xusb_port_ops {
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int (*enable)(struct tegra_xusb_port *port);
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void (*disable)(struct tegra_xusb_port *port);
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struct tegra_xusb_lane *(*map)(struct tegra_xusb_port *port);
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};
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/*
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* pad controller
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*/
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struct tegra_xusb_padctl_soc;
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struct tegra_xusb_padctl_ops {
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struct tegra_xusb_padctl *
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(*probe)(struct device *dev,
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const struct tegra_xusb_padctl_soc *soc);
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void (*remove)(struct tegra_xusb_padctl *padctl);
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int (*suspend_noirq)(struct tegra_xusb_padctl *padctl);
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int (*resume_noirq)(struct tegra_xusb_padctl *padctl);
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int (*usb3_save_context)(struct tegra_xusb_padctl *padctl,
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unsigned int index);
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int (*hsic_set_idle)(struct tegra_xusb_padctl *padctl,
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unsigned int index, bool idle);
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int (*hsic_reset)(struct tegra_xusb_padctl *padctl, unsigned int index);
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int (*usb3_set_lfps_detect)(struct tegra_xusb_padctl *padctl,
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unsigned int index, bool enable);
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int (*vbus_override_early)(struct tegra_xusb_padctl *padctl,
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unsigned int i, bool set);
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int (*vbus_override)(struct tegra_xusb_padctl *padctl, unsigned int i,
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bool set);
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int (*id_override)(struct tegra_xusb_padctl *padctl, unsigned int i,
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bool set);
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bool (*has_otg_cap)(struct tegra_xusb_padctl *padctl, struct phy *phy);
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int (*vbus_power_on)(struct tegra_xusb_padctl *padctl,
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unsigned int index);
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int (*vbus_power_off)(struct tegra_xusb_padctl *padctl,
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unsigned int index);
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void (*otg_vbus_handle)(struct tegra_xusb_padctl *padctl,
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unsigned int vbus_id, unsigned int index);
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int (*phy_sleepwalk)(struct tegra_xusb_padctl *padctl, struct phy *phy,
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bool enable, enum usb_device_speed speed);
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int (*phy_wake)(struct tegra_xusb_padctl *padctl, struct phy *phy,
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bool enable);
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int (*remote_wake_detected)(struct phy *phy);
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int (*set_debounce_time)(struct tegra_xusb_padctl *padctl,
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struct phy *phy, u32 val);
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int (*utmi_pad_charger_detect_on)(struct tegra_xusb_padctl *padctl,
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struct phy *phy);
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int (*utmi_pad_charger_detect_off)(struct tegra_xusb_padctl *padctl,
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struct phy *phy);
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int (*detect_filters)(struct tegra_xusb_padctl *padctl,
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struct phy *phy,
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bool on);
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int (*utmi_pad_set_protection_level)(struct tegra_xusb_padctl *padctl,
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struct phy *phy,
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int level,
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enum tegra_vbus_dir dir);
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int (*utmi_pad_dcd)(struct tegra_xusb_padctl *padctl,
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struct phy *phy);
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int (*noncompliant_div_detect)(struct tegra_xusb_padctl *padctl,
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struct phy *phy);
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int (*utmi_pad_primary_charger_detect)(struct tegra_xusb_padctl *padctl,
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struct phy *phy);
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int (*utmi_pad_secondary_charger_detect)(struct tegra_xusb_padctl
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*padctl, struct phy *phy);
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int (*set_host_cdp)(struct tegra_xusb_padctl *padctl, struct phy *phy,
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bool enable);
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int (*overcurrent_detected)(struct phy *phy);
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void (*handle_overcurrent)(struct tegra_xusb_padctl *padctl);
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void (*utmi_pad_power_on)(struct phy *phy);
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void (*utmi_pad_power_down)(struct phy *phy);
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int (*utmi_port_reset_quirk)(struct phy *phy);
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int (*usb3_port_gen1_only)(struct phy *phy, bool on);
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};
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struct tegra_xusb_padctl_soc {
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const struct tegra_xusb_pad_soc * const *pads;
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unsigned int num_pads;
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unsigned int num_oc_pins;
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struct {
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struct {
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const struct tegra_xusb_port_ops *ops;
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unsigned int count;
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} usb2, ulpi, hsic, usb3;
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} ports;
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const struct tegra_xusb_padctl_ops *ops;
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const char * const *supply_names;
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unsigned int num_supplies;
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};
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struct tegra_xusb_padctl {
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struct device *dev;
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void __iomem *regs;
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struct mutex lock;
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struct reset_control *rst;
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const struct tegra_xusb_padctl_soc *soc;
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struct tegra_xusb_pad *pcie;
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struct tegra_xusb_pad *sata;
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struct tegra_xusb_pad *ulpi;
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struct tegra_xusb_pad *usb2;
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struct tegra_xusb_pad *hsic;
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struct list_head ports;
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struct list_head lanes;
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struct list_head pads;
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unsigned int enable;
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struct clk *clk;
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/* vbus/id based OTG */
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int usb2_otg_port_base_1; /* one based usb2 port number */
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int usb3_otg_port_base_1; /* one based usb3 port number */
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struct work_struct otg_vbus_work;
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bool otg_vbus_updating[XUSB_MAX_OTG_PORT_NUM];
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int otg_vbus_usb2_port_base_1[XUSB_MAX_OTG_PORT_NUM];
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int otg_vbus_usb3_port_base_1[XUSB_MAX_OTG_PORT_NUM];
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bool otg_vbus_on[XUSB_MAX_OTG_PORT_NUM];
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bool otg_vbus_alwayson;
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int otg_port_num;
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bool cdp_used;
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bool is_xhci_iov;
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struct pinctrl *oc_pinctrl;
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/*
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* array of pinctrl_state (of number num_oc_pins)
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* for different OC states
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*/
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struct pinctrl_state **oc_tristate_enable;
|
|
struct pinctrl_state **oc_passthrough_enable;
|
|
struct pinctrl_state **oc_disable;
|
|
|
|
struct regulator_bulk_data *supplies;
|
|
};
|
|
|
|
static inline void padctl_writel(struct tegra_xusb_padctl *padctl, u32 value,
|
|
unsigned long offset)
|
|
{
|
|
dev_dbg(padctl->dev, "%08lx < %08x\n", offset, value);
|
|
writel(value, padctl->regs + offset);
|
|
}
|
|
|
|
static inline u32 padctl_readl(struct tegra_xusb_padctl *padctl,
|
|
unsigned long offset)
|
|
{
|
|
u32 value = readl(padctl->regs + offset);
|
|
dev_dbg(padctl->dev, "%08lx > %08x\n", offset, value);
|
|
return value;
|
|
}
|
|
|
|
static inline u32 padctl_readl_poll(struct tegra_xusb_padctl *padctl,
|
|
unsigned long offset, u32 val, u32 mask, int us)
|
|
{
|
|
u32 regval;
|
|
int err;
|
|
|
|
err = readl_poll_timeout_atomic(padctl->regs + offset, regval,
|
|
(regval & mask) == val, 1, us);
|
|
dev_dbg(padctl->dev, "%08lx poll > %08x, %d\n", offset,
|
|
regval, err);
|
|
if (err) {
|
|
dev_err(padctl->dev, "%08lx poll timeout > %08x\n", offset,
|
|
regval);
|
|
}
|
|
|
|
return err;
|
|
}
|
|
|
|
struct tegra_xusb_lane *tegra_xusb_find_lane(struct tegra_xusb_padctl *padctl,
|
|
const char *name,
|
|
unsigned int index);
|
|
|
|
int tegra_xusb_select_vbus_en_state(struct tegra_xusb_padctl *padctl,
|
|
int pin, bool tristate);
|
|
|
|
#if defined(CONFIG_ARCH_TEGRA_124_SOC) || defined(CONFIG_ARCH_TEGRA_132_SOC)
|
|
extern const struct tegra_xusb_padctl_soc tegra124_xusb_padctl_soc;
|
|
#endif
|
|
#if defined(CONFIG_ARCH_TEGRA_210_SOC)
|
|
extern const struct tegra_xusb_padctl_soc tegra210_xusb_padctl_soc;
|
|
#endif
|
|
#if defined(CONFIG_ARCH_TEGRA_210_SOC)
|
|
extern const struct tegra_xusb_padctl_soc tegra210b01_xusb_padctl_soc;
|
|
#endif
|
|
#if defined(CONFIG_ARCH_TEGRA_18x_SOC)
|
|
extern const struct tegra_xusb_padctl_soc tegra186_xusb_padctl_soc;
|
|
#endif
|
|
#if defined(CONFIG_ARCH_TEGRA_19x_SOC)
|
|
extern const struct tegra_xusb_padctl_soc tegra194_xusb_padctl_soc;
|
|
#endif
|
|
|
|
|
|
#endif /* __PHY_TEGRA_XUSB_H */
|