forked from rrcarlosr/Jetpack
271 lines
8.1 KiB
C
271 lines
8.1 KiB
C
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/*
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* Tegra 18x VI register offsets
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*
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* Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef __VI4_REGISTERS_H__
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#define __VI4_REGISTERS_H__
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/* VI registers. Start from 0x0 */
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#define VI_STREAMS (6)
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#define VIRTUAL_CHANNELS (4)
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#define VI4_CHANNEL_OFFSET 0x10000
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#define CFG_INTERRUPT_STATUS 0x44
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#define CFG_INTERRUPT_MASK 0x48
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#define VGP6_INT_MASK (0x1 << 29)
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#define VGP5_INT_MASK (0x1 << 28)
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#define VGP4_INT_MASK (0x1 << 27)
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#define VGP3_INT_MASK (0x1 << 26)
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#define VGP2_INT_MASK (0x1 << 25)
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#define VGP1_INT_MASK (0x1 << 24)
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#define HOST_PKTINJECT_STALL_ERR_MASK (0x1 << 7)
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#define CSIMUX_FIFO_OVFL_ERR_MASK (0x1 << 6)
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#define ATOMP_PACKER_OVFL_ERR_MASK (0x1 << 5)
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#define FMLITE_BUF_OVFL_ERR_MASK (0x1 << 4)
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#define NOTIFY_FIFO_OVFL_ERR_MASK (0x1 << 3)
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#define ISPBUFA_ERR_MASK (0x1 << 0)
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#define CFG_PWM_HIGH_PULSE 0x50
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#define PWM_HIGH_PULSE (0xffffffff << 0)
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#define CSIMUX_CONFIG_STREAM_0 0x424
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#define CSIMUX_CONFIG_STREAM_1 0x428
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#define CSIMUX_CONFIG_STREAM_2 0x42C
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#define CSIMUX_CONFIG_STREAM_3 0x430
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#define CSIMUX_CONFIG_STREAM_4 0x434
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#define CSIMUX_CONFIG_STREAM_5 0x438
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#define FRAMEIDGEN (0xf << 26)
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#define STICKYFAULT (0x1 << 25)
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#define VPR (0x1 << 24)
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#define SRESET (0x1 << 23)
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#define QBLOCK (0x1 << 22)
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#define FEINJECT (0x1 << 21)
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#define FESHORTTIMER (0x1 << 20)
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#define FEMAXTIME (0xffff << 4)
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#define WT (0xf << 0)
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#define NOTIFY_FIFO_TAG_0 0x4000
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#define NOTIFY_FRAME_ID (0xffff << 16)
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#define NOTIFY_CHANNEL (0xff << 8)
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#define NOTIFY_CHANNEL_SHIFT (8)
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#define NOTIFY_TAG (0x1f << 1)
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#define NOTIFY_TAG_SHIFT (1)
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#define NOTIFY_VALID (0x1 << 0)
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#define TAG_FS 0
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#define TAG_FE 1
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#define TAG_CSIMUX_FRAME 2
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#define TAG_CSIMUX_STREAM 3
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#define TAG_CHANSEL_PXL_SOF 4
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#define TAG_CHANSEL_PXL_EOF 5
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#define TAG_CHANSEL_EMBED_SOF 6
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#define TAG_CHANSEL_EMBED_EOF 7
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#define TAG_CHANSEL_NLINES 8
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#define TAG_CHANSEL_FAULT 9
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#define TAG_CHANSEL_FAULT_FE 10
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#define TAG_CHANSEL_NOMATCH 11
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#define TAG_CHANSEL_COLLISION 12
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#define TAG_CHANSEL_SHORT_FRAME 13
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#define TAG_CHANSEL_LOAD_FRAMED 14
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#define TAG_ATOMP_PACKER_OVERFLOW 15
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#define TAG_ATOMP_FS 16
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#define TAG_ATOMP_FE 17
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#define TAG_ATOMP_FRAME_DONE 18
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#define TAG_ATOMP_EMB_DATA_DONE 19
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#define TAG_ATOMP_FRAME_NLINES_DONE 20
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#define TAG_ATOMP_FRAME_TRUNCATED 21
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#define TAG_ATOMP_FRAME_TOSSED 22
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#define TAG_ATOMP_PDAF_DATA_DONE 23
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#define TAG_ISPBUF_FIFO_OVERFLOW 26
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#define TAG_ISPBUF_FS 27
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#define TAG_ISPBUF_FE 28
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#define TAG_VGP0_DONE 29
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#define TAG_VGP1_DONE 30
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#define TAG_FMLITE_DONE 31
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#define NOTIFY_FIFO_TIMESTAMP_0 0x4004
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#define NOTIFY_TIMESTAMP (0xffffffff << 0)
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#define NOTIFY_FIFO_DATA_0 0x4008
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#define NOTIFY_DATA (0xffffffff << 0)
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#define NOTIFY_TAG_CLASSIFY_0 0x6000
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#define NOTIFY_TAG_CLASSIFY_1 0x6004
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#define NOTIFY_TAG_CLASSIFY_2 0x6008
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#define NOTIFY_TAG_CLASSIFY_3 0x600c
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#define NOTIFY_TAG_CLASSIFY_4 0x6010
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#define STREAM5_FEINJECT_VC (0xf << 20)
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#define STREAM4_FEINJECT_VC (0xf << 16)
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#define STREAM3_FEINJECT_VC (0xf << 12)
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#define STREAM2_FEINJECT_VC (0xf << 8)
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#define STREAM1_FEINJECT_VC (0xf << 4)
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#define STREAM0_FEINJECT_VC (0xf << 0)
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#define NOTIFY_FIFO_OCCUPANCY_0 0x6014
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#define NOTIFY_MAX (0x3ff << 20)
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#define NOTIFY_CURRENT (0x3ff << 10)
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#define NOTIFY_CURRENT_SHIFT 10
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#define NOTIFY_SIZE (0x3ff << 0)
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/* VI_CH registers. Start from 0x10000, offset 0x10000 */
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#define CHANNEL_COMMAND 0x004
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#define WR_ACT_SEL (0x1 << 5)
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#define RD_MUX_SEL (0x1 << 4)
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#define AUTOLOAD (0x1 << 1)
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#define LOAD (0x1 << 0)
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#define CONTROL 0x01c
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#define SPARE (0xffff << 16)
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#define POST_RUNAWAY_EMBED (0x1 << 4)
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#define POST_RUNAWAY_PIXEL (0x1 << 3)
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#define EARLY_ABORT (0x1 << 2)
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#define SINGLESHOT (0x1 << 1)
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#define MATCH_STATE_EN (0x1 << 0)
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#define MATCH 0x020
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#define STREAM (0x3f << 14)
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#define STREAM_SHIFT (14)
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#define STREAM_MASK (0x3f << 8)
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#define VIRTUAL_CHANNEL (0xf << 4)
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#define VIRTUAL_CHANNEL_SHIFT (4)
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#define VIRTUAL_CHANNEL_MASK (0xf << 0)
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#define MATCH_DATATYPE 0x024
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#define DATATYPE (0x3f << 6)
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#define DATATYPE_SHIFT (6)
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#define DATATYPE_MASK (0x3f << 0)
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#define DATATYPE_MASK_SHIFT (0)
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#define MATCH_FRAMEID 0x028
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#define FRAMEID (0xffff << 16)
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#define FRAMEID_SHIFT (16)
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#define FRAMEID_MASK (0xffff << 0)
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#define DT_OVERRIDE 0x02c
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#define OVRD_DT (0x3f << 1)
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#define DT_OVRD_EN (0x1 << 0)
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#define FRAME_X 0x030
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#define CROP_X 0x04c
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#define OUT_X 0x058
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#define WIDTH (0xffff < 0)
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#define FRAME_Y 0x034
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#define CROP_Y 0x054
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#define OUT_Y 0x05c
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#define HEIGHT (0xffff < 0)
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#define EMBED_X 0x038
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#define MAX_BYTES (0x3ffff < 0)
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#define EMBED_Y 0x03c
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#define SKIP_Y 0x050
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#define LINES (0xffff < 0)
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/* for EMBED_Y only */
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#define EXPECT (0x1 << 24)
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#define LINE_TIMER 0x044
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#define LINE_TIMER_EN (0x1 << 25)
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#define PERIODIC (0x1 << 24)
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#define TRIPLINE (0xffff << 0)
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#define SKIP_X 0x048
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#define PACKETS (0x1fff << 0)
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#define NOTIFY_MASK 0x060
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#define MASK_DTYPE_MISMATCH (0x1 << 31)
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#define MASK_EMBED_INFRINGE (0x1 << 22)
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#define MASK_EMBED_LONG_LINE (0x1 << 21)
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#define MASK_EMBED_SPURIOUS (0x1 << 20)
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#define MASK_EMBED_RUNAWAY (0x1 << 19)
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#define MASK_EMBED_MISSING_LE (0x1 << 18)
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#define MASK_EMBED_EOF (0x1 << 17)
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#define MASK_EMBED_SOF (0x1 << 16)
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#define MASK_PIXEL_LINE_TIMER (0x1 << 7)
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#define MASK_PIXEL_SHORT_LINE (0x1 << 6)
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#define MASK_PIXEL_LONG_LINE (0x1 << 5)
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#define MASK_PIXEL_SPURIOUS (0x1 << 4)
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#define MASK_PIXEL_RUNAWAY (0x1 << 3)
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#define MASK_PIXEL_MISSING_LE (0x1 << 2)
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#define MASK_PIXEL_EOF (0x1 << 1)
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#define MASK_PIXEL_SOF (0x1 << 0)
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#define NOTIFY_MASK_XCPT 0x064
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#define MASK_NOMATCH (0x1 << 9)
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#define MASK_EMBED_OPEN_LINE (0x1 << 8)
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#define MASK_PIXEL_OPEN_LINE (0x1 << 7)
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#define MASK_FORCE_FE (0x1 << 6)
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#define MASK_STALE_FRAME (0x1 << 5)
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#define MASK_COLLISION (0x1 << 4)
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#define MASK_EMPTY_FRAME (0x1 << 3)
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#define MASK_EMBED_SHORT_FRAME (0x1 << 2)
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#define MASK_PIXEL_SHORT_FRAME (0x1 << 1)
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#define MASK_LOAD_FRAMED (0x1 << 0)
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#define FRAME_COUNT 0x06c
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#define PIXFMT_ENABLE 0x080
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#define PDAF_EN (0x1 << 2)
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#define COMPAND_EN (0x1 << 1)
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#define PIXFMT_EN (0x1 << 0)
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#define PIXFMT_FORMAT 0x084
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#define FORMAT (0xff << 0)
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/* refer to enum tegra_image_format in core.h */
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#define PIXFMT_WIDE 0x088
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#define ENDIAN_BIG (0x0 << 1)
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#define ENDIAN_LITTLE (0x1 << 1)
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#define PIXFMT_WIDE_EN (0x1 << 0)
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#define DPCM_STRIP 0x0b8
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#define OVERFETCH (0x1fff < 16)
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#define STRIP_WIDTH (0x1fff < 0)
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#define ATOMP_DPCM_CHUNK 0x0ec
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#define CHUNK_OFFSET (0x3ffff << 0)
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#define ATOMP_SURFACE_OFFSET0 0x0e0
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#define ATOMP_SURFACE_OFFSET1 0x0f0
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#define ATOMP_SURFACE_OFFSET2 0x0fc
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#define ATOMP_EMB_SURFACE_OFFSET0 0x108
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#define SURFACE_OFFSET (0xffffffff << 0)
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#define ATOMP_SURFACE_OFFSET0_H 0x0e4
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#define ATOMP_SURFACE_OFFSET1_H 0x0f4
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#define ATOMP_SURFACE_OFFSET2_H 0x100
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#define ATOMP_EMB_SURFACE_OFFSET0_H 0x10c
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#define SURFACE_OFFSET_HI (0xff << 0)
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#define ATOMP_SURFACE_STRIDE0 0x0e8
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#define ATOMP_SURFACE_STRIDE1 0x0f8
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#define ATOMP_SURFACE_STRIDE2 0x104
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#define ATOMP_EMB_SURFACE_STRIDE0 0x110
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#define SURFACE_STRIDE (0x3ffff << 0)
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#define ATOMP_RESERVE 0x120
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#define ISPBUFA 0x134
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#define ISPBUFA_EN (0x1 << 0)
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#define ISPBUFA_ERROR 0x1000
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#define FIFO_OVERFLOW (0x1 << 0)
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#define FMLITE_ERROR 0x313c
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#define NOTIFY_ERROR 0x6020
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#endif /* __VI4_REGISTERS_H__ */
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