forked from Archive/PX4-Autopilot
160 lines
4.3 KiB
C
160 lines
4.3 KiB
C
/****************************************************************************
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*
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* Copyright (C) 2012 PX4 Development Team. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name PX4 nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/**
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* @file i2c.c
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*
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* I2C communication for the PX4IO module.
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*/
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#include <stdint.h>
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#include <nuttx/arch.h>
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#include <arch/board/board.h>
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#include <stm32_i2c.h>
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#define DEBUG
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#include "px4io.h"
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/*
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* I2C register definitions.
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*/
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#define I2C_BASE STM32_I2C1_BASE
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#define REG(_reg) (*(volatile uint32_t *)(I2C_BASE + _reg))
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#define rCR1 REG(STM32_I2C_CR1_OFFSET)
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#define rCR2 REG(STM32_I2C_CR2_OFFSET)
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#define rOAR1 REG(STM32_I2C_OAR1_OFFSET)
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#define rOAR2 REG(STM32_I2C_OAR2_OFFSET)
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#define rDR REG(STM32_I2C_DR_OFFSET)
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#define rSR1 REG(STM32_I2C_SR1_OFFSET)
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#define rSR2 REG(STM32_I2C_SR2_OFFSET)
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#define rCCR REG(STM32_I2C_CCR_OFFSET)
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#define rTRISE REG(STM32_I2C_TRISE_OFFSET)
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static int i2c_interrupt(int irq, void *context);
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static void i2c_dump(void);
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void
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i2c_init(void)
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{
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// enable the i2c block clock and reset it
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modifyreg32(STM32_RCC_APB1ENR, 0, RCC_APB1ENR_I2C1EN);
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modifyreg32(STM32_RCC_APB1RSTR, 0, RCC_APB1RSTR_I2C1RST);
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modifyreg32(STM32_RCC_APB1RSTR, RCC_APB1RSTR_I2C1RST, 0);
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// configure the i2c GPIOs
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stm32_configgpio(GPIO_I2C1_SCL);
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stm32_configgpio(GPIO_I2C1_SDA);
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// soft-reset the block
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rCR1 |= I2C_CR1_SWRST;
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rCR1 = 0;
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// set the frequency value in CR2
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rCR2 &= ~I2C_CR2_FREQ_MASK;
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rCR2 |= STM32_PCLK1_FREQUENCY / 1000000;
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// set divisor and risetime for fast mode
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uint16_t result = STM32_PCLK1_FREQUENCY / (400000 * 25);
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if (result < 1)
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result = 1;
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result = 3;
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rCCR &= ~I2C_CCR_CCR_MASK;
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rCCR |= I2C_CCR_DUTY | I2C_CCR_FS | result;
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rTRISE = (uint16_t)((((STM32_PCLK1_FREQUENCY / 1000000) * 300) / 1000) + 1);
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// set our device address
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rOAR1 = 0x1a << 1;
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// enable event interrupts
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irq_attach(STM32_IRQ_I2C1EV, i2c_interrupt);
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up_enable_irq(STM32_IRQ_I2C1EV);
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rCR2 |= I2C_CR2_ITEVFEN;
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// and enable the I2C port
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rCR1 |= I2C_CR1_ACK | I2C_CR1_PE;
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i2c_dump();
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}
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static int
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i2c_interrupt(int irq, FAR void *context)
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{
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uint16_t sr1 = rSR1;
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// XXX not sure what else we need to do here...
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if (sr1 & I2C_SR1_ERRORMASK) {
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//debug("errors 0x%04x", sr1 & I2C_SR1_ERRORMASK);
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//i2c_dump();
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rSR1 = 0;
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}
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if (sr1 & I2C_SR1_ADDR) {
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/* XXX we have been addressed, set up to receive */
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/* clear ADDR */
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(void)rSR2;
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debug("addr");
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}
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if (sr1 & I2C_SR1_RXNE) {
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debug("data 0x%02x", rDR);
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}
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if (sr1 & I2C_SR1_STOPF) {
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/* write to CR1 to clear STOPF */
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rCR1 |= I2C_CR1_PE;
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debug("stop");
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/* XXX handle txn */
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}
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return 0;
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}
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static void
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i2c_dump(void)
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{
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debug("CR1 0x%08x CR2 0x%08x", rCR1, rCR2);
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debug("OAR1 0x%08x OAR2 0x%08x", rOAR1, rOAR2);
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debug("CCR 0x%08x TRISE 0x%08x", rCCR, rTRISE);
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debug("SR1 0x%08x SR2 0x%08x", rSR1, rSR2);
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}
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