forked from Archive/PX4-Autopilot
42 lines
1.5 KiB
Diff
42 lines
1.5 KiB
Diff
diff --git NuttX/nuttx/arch/arm/src/stm32/stm32f40xxx_i2c.c NuttX/nuttx/arch/arm/src/stm32/stm32f40xxx_i2c.c
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index 2bb715c..481b851 100644
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--- NuttX/nuttx/arch/arm/src/stm32/stm32f40xxx_i2c.c
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+++ NuttX/nuttx/arch/arm/src/stm32/stm32f40xxx_i2c.c
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@@ -1828,6 +1828,20 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
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* the ISR cycle to handle the sending/receiving of the messages.
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*/
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+ /* First check for errors */
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+
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+ if ((status & I2C_SR1_ERRORMASK) != 0)
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+ {
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+ stm32_i2c_traceevent(priv, I2CEVENT_ERROR, status & I2C_SR1_ERRORMASK);
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+
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+ /* Clear interrupt flags */
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+
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+ stm32_i2c_putreg(priv, STM32_I2C_SR1_OFFSET, 0);
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+
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+ priv->dcnt = -1;
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+ priv->msgc = 0;
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+ }
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+
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if (priv->dcnt == -1 && priv->msgc == 0)
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{
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i2cinfo("Shutting down I2C ISR\n");
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@@ -2027,7 +2041,6 @@ static int stm32_i2c_transfer(FAR struct i2c_master_s *dev, FAR struct i2c_msg_s
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int count)
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{
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FAR struct stm32_i2c_priv_s *priv = (struct stm32_i2c_priv_s *)dev;
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- stm32_i2c_sem_wait(priv); /* Ensure that address or flags don't change meanwhile */
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uint32_t status = 0;
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#ifdef I2C1_FSMC_CONFLICT
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uint32_t ahbenr;
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@@ -2035,6 +2048,7 @@ static int stm32_i2c_transfer(FAR struct i2c_master_s *dev, FAR struct i2c_msg_s
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int ret = 0;
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ASSERT(count);
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+ stm32_i2c_sem_wait(priv); /* Ensure that address or flags don't change meanwhile */
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#ifdef I2C1_FSMC_CONFLICT
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/* Disable FSMC that shares a pin with I2C1 (LBAR) */
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