I2C bus chaged I2C0 is external, I2C1 internal
Added BMM150 on I2C1 @ Addr 0x100
Added BMP280 on I2C1 @ Addr 0x76
UART0 (/dev/ttyS1) now used at Telem 2
Chip select added for W25X40CLUXIG Calibration EE prom
Driver is not added at this time
This is a workaround for the write timeout that we have seen for some
host computers trying to flash the firmware.
We don't know the root cause of the problem but we do observed the
following:
- For blocking writes with timeout (Pyserial write_timeout=0.5):
write() throws SerialTimeoutException. In systrace we see that the
select() call after write waiting for the write to be finished hangs
and finally times out.
- For blocking writes without timeout (Pyserial write_timeout=None):
write() hangs indefinitely. In systrace we see that the
select() call after write waiting for the write to be finished hangs.
- For non-blocking writes:
write() works but flush() hangs. In systrace we see that
ioctl(fd, TCSBRK, 1) which is (correctly) triggered by termios tcdrain
hangs.
Inspecting USB traffic using usbmon, we can see that the data which is
written actually seems to be sent and looking at responses from the
Pixhawk bootloader and the timings it looks like all the data has
arrived.
This workaround uses non-blocking writes without flushing and this
seemed to prevent the issue from happening so far.
Debugging was done in collaboration with Beat Küng and David Sidrane.
The replay functionality was broken with lockstep. This is an interim
fix for the replay functionality.
In the longer term it would be nice to leverage the lockstep speedup
for the replay.
- Remove unnecessary in between rate limits member vectors.
- Only switch the yaw rate limit in auto modes,
other values stay the same anyways.
- Fill gain vectors with parameters in one line.
With this commit the use cases will be:
Success case:
- booting, no messages about OA, pre-arm check would fail if you try to arm and OA is not yet running
Fail case:
- if OA takes longer than timeout time defined in COM_ONB_BOOT_T, then an error message is triggered.
Signed-off-by: Claudio Micheli <claudio@auterion.com>
Since onboard controllers bootup times are hardware dependent, it makes sense to have the possibility to adapt timeout time according to the specific HW.
Signed-off-by: Claudio Micheli <claudio@auterion.com>
This allows to perform pre-arm checks and prevent arming if obstacle avoidance is enabled but not yet running.
Added a print once flag to prevent excessive message spamming in QGC.
Signed-off-by: Claudio Micheli <claudio@auterion.com>
bresch
Nuno Marques
Roman
Julian Oes
Daniel Agar
mcsauder
David Sidrane
Nico van Duijn
Alessandro Simovic
Thijs Raymakers
DanielePettenuzzo
CarlOlsson
Beat Küng
Matthias Grob
Claudio Micheli