Events have a global, system-wide sequence number, which must be handled
atomically, (fetching and incrementing the sequence AND sending the event
to uORB must be atomic). Currently in FLAT mode, only one instance of this
sequence number exists, so it is OK to have it in px4_platform.
However, in PROTECTED mode px4_platform is instantiated both in kernel-
and user spaces, which makes two instances of this sequence number, which
causes problems in the mavlink event handling logic.
When mavlink receives and handles events, it expects that:
- The sequence numbers arrive in order (seq n is followed by n+1 etc)
- It increments by 1
- There is only one instance of the sequence number
In PROTECTED mode this is violated, as the kernel and user sequence
numbers run freely on their own. This patch fixes the issue by moving
the event backend to the kernel and by providing user access to it via
ioctl.
c23b72dffe [BACKPORT] sched/semaphore: Remove restriction to use nxsem_trywait from ISR
fd47cd20a2 [BACKPORT] imxrt:Serial Preserve all but W1C bit in SR
c55f0fd3ac [BACKPORT] imxrt: lpspi dma invalidate cache after exchange
198c7caecb [BACKPORT] imxrt:lpi2c fix status handeling & race
cbd2e44c10 [BACKPORT] s32k3xx: lpspi dma invalidate cache after exchange
e71618d60e [BACKPORT] s32k3xx:lpi2c fix status handeling & race
6f59cc3659 [BACKPORT] s32k1xx:lpi2c fix status handeling & race
1e316d7e32 [BACKPORT] imxrt: flexcan use hpwork for receiving frames
67c1c59865 [BACKPORT] net/can can_readahead_timestamp always free iob
8be831a4ff [BACKPORT] imxrt: fix txdeadline add ecc/fd support
00a68b7668 [BACKPORT] fs/cromfs: Fix faulty DEBUGASSERT() check
d5cf545d6e [BACKPORT] S32K3XX EMAC MCAST support Fix compile warning when ioctl is not enabled
4265c830fa [BACKPORT] imxrt:edma {s|d}last needs to be total xfer size
24b4d44896 [BACKPORT] s32k3xx:edma {s|d}last needs to be total xfer size
eed0482f64 [BACKPORT] s32k1xx:edma {s|d}last needs to be total xfer size
36aab4146a [BACKPORT] kinetis:edma {s|d}last needs to be total xfer size
a0faf31f6f [BACKPORT] arch/stm32f7: fixes for pinmap
eb8255121d [BACKPORT] stm32h7:sdmmc It is not an error if no wait was needed
062044fe41 [BACKPORT] board nucleo-h743zi:Rework board.h not use CONFIG_STM32_USE_LEGACY_PINMAP
e03f9d3917 [BACKPORT] board olimexino-stm32:Rework board.h not use CONFIG_STM32_USE_LEGACY_PINMAP
4c3a467415 [BACKPORT] stm32l5:pinmap Add suffix to all pins and add legacy pinmap
153069ed40 [BACKPORT] stm32wb:pinmap Add suffix to all pins and add legacy pinmap
d84d737f89 [BACKPORT] stm32f0l0g0:stm32f0{3|5|7|9}x_pinmap & stm32g0_pinmap Remove GPIO_SPEED_xxx and add legacy pinmap
5fc7071ac1 [BACKPORT] stm32l4:stm32l4x{3|4|5|6|r}xx_pinmap pinmap Remove GPIO_SPEED_xxx and add legacy pinmap
20061c2aab [BACKPORT] stm32:stm32f10{0|2|3{c|r|v|z}|5{r|v}|7v}_pinmap refactor
4d1f83d484 [BACKPORT] stm32:stm32l15xxx pinmap Remove GPIO_SPEED_xxx and add legacy pinmap
2dfa3f2601 [BACKPORT] stm32:stm32g4xx{c|k|r|m|v|q} pinmap Remove GPIO_SPEED_xxx and add legacy pinmap
d206327809 [BACKPORT] stm32:stm32f3{0|3|7}xxx pinmap Remove GPIO_SPEED_xxx and add legacy pinmap
95e66ab508 [BACKPORT] stm32:stm32f20xxx pinmap Remove GPIO_SPEED_xxx and add legacy pinmap
d2fd9178ad [BACKPORT] stm32:f4/f412 pinmap Remove GPIO_SPEED_xxx and add legacy pinmap
a9df45166d [BACKPORT] stm32f7:pinmap Remove GPIO_SPEED_xxx and add legacy pinmap
07dd2b424e [BACKPORT] stm32h7:pinmap Remove GPIO_SPEED_xxx and add legacy pinmap
1e3065344f [BACKPORT] stm32u5:stm32u585xx_pinmap Fix typo
0a05365a90 [BACKPORT] stm32wl5:pinmap Fix typo
e3834138dc [BACKPORT] tools:Add STM32 Pin migration tool
df851a8768 [BACKPORT] stm32h7/rcc: make VOS0 configurable from board.h also for stm32h7x7xx
d75dfcf1e9 [BACKPORT] stm32h7/rcc: make VOS0 configurable from board.h
963f35f4fc [BACKPORT] {stm32,stm32f7,stm32h7,stm32l4,efm32}/otg: rasie an assertion if IN request is not possible to transfer
de2fcc6668 [BACKPORT] {stm32f7,stm32h7,stm32l4}/sdmmc: callback support requires HPWORK
6929144fc2 [BACKPORT] stm32h7/otgdev: FS transceiver must be enabled if OTGFS enabled
a2078afaea [BACKPORT] stm32h7/otg: add support for external ULPI
26e1246c86 [BACKPORT] stm32h7/rcc: OTGHS ULPI works only in VOS0
cd6daa185e [BACKPORT] stm32h7: update ULPI pins
c73c261ae3 [BACKPORT] arch/boards: fix stm32f411-mininum:nsh compilation failure after enabling IRQMONITOR
8078f134ef [BACKPORT] arch/stm32/stm32.h: do not include stm32_usbdev.h if not supported
60e884fa92 [BACKPORT] {stm32,stm32l4,stm32f0l0g0}/otg: move STM32_NENDPOINTS definitions to header files
dda297cb78 [BACKPORT] arch/arm/src/stm32/hardware: Fix register define
362b976b0e [BACKPORT] arch/arm/src/stm32/hardware: Add stm32g4 rcc apb1 timer enable compatibility
434fd71f2c [BACKPORT] {stm32/stm32l4/stm32f7/stm32h7/efm32}/otgdev: remove invalid use of the priv field for EP
2476d24e8c [BACKPORT] {stm32f7,stm32h7}/otg: fix compilation for USBDEV when USB_DEBUG=y
eb43c582ea [BACKPORT] drivers/mtd/ramtron: change nsectors size to uint32
20f61ff0d5 [BACKPORT] fs/littlefs: add full support for LittleFS block device cfg in Kconfig
60471fbf8c [BACKPORT] drivers/mtd: add Kconfig options for RAMTRON emulated page & sector size
- re-enable once the estimator selector respects configured mag
priority (at least initially) or is otherwise able to automatically
prefer an external mag over internal
- for SITL disabled because the full matrix of esitmator instances
(IMUs X mags) was too many topics for logger currently
This consolidates the version/revision detection function.
This should allow for actual changes in a follow up commit.
Signed-off-by: Julian Oes <julian@oes.ch>
Bootloader needs to have a mechanism to de-initialize crypto, in case some HW accelerator
is being used. This adds the needed function for it
Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
- nuttx in PX4/Firmware (d3b7112dd9): f80785664f
- nuttx current upstream: 35997053c5
- Changes: f80785664f...35997053c5
35997053c5 2023-01-23 David Sidrane - [BACKPORT] s32k1xx:serial Do not use TC use TDRE & TIE
- new ROS2 platform in PX4 intended for creating configs that build and run entirely in ROS2
- PX4_CONFIG defaults to px4_ros2_default if no config specified and in a colcon workspace with ROS_VERSION=2
- currently doesn't do much other than allow you to build px4 msgs interface package
- apps in PX4/Firmware (351bd1768a4a862f81b2a262225e945c0e4fe4fa): e04333c986
- apps current upstream: a489381b49
- Changes: e04333c986...a489381b49
a489381b4 2022-10-17 Peter van der Perk - [REJECTED] Backport 0d06c1c netinit:Network Monitor add a polled option
7b7cd332e 2022-09-12 Peter van der Perk - [REJECTED] Backport dbcb783671cee8a8c97b5909d9eb818c3864ca93 FAT DMA fix
Co-authored-by: Peter van der Perk <peter.vanderperk@nxp.com>
Co-authored-by: David Sidrane <David.Sidrane@NscDg.com>
Co-authored-by: alexklimaj <alex@arkelectron.com>
- Include board_config.h for BOARD_GET_EXTERNAL_LOCKOUT_STATE etc. macros
- Include fcntl.h for "open"
Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
the nuttx and posix specific options files since this option cannot be used with
the qurt platform. There are header files in the hexagon sdk that fail this check.
Ville Juven
Igor Mišić
David Sidrane
Niklas Hauser
Jukka Laitinen
Peter van der Perk
Beat Küng
Daniel Agar
Julian Oes
Christian Rauch
小光
PX4 BuildBot
alexklimaj
Siddharth Bharat Purohit
Eric Katzfey