Commit Graph

7 Commits

Author SHA1 Message Date
TSC21 e932030d88 add timestamp field to uORB msgs; sync timestamp whenever possible 2018-08-09 13:40:48 +02:00
TSC21 ca42483794 update msgs fields from camelCase to snake_case so rosidl_generate_interfaces() is able to generate code for ROS IDL files 2018-07-30 21:40:28 +02:00
David Sidrane a9bd3aeb85 Fixed typo usb_vaild -> usb_valid 2017-09-29 10:46:50 -10:00
David Sidrane 9635ec42e9 system_power:Add blank line per review 2017-07-17 21:02:50 -10:00
David Sidrane f13682223a Added FMUv5 System Power related system_power.msg fields
voltage3V3_v - the sensor 3.3V voltage rail
   v3v3_valid   - the value of voltage3V3_v  may be 0. This
                  field is a 1 when the HW provides voltage3V3_v

   brick_valid - is now a bit mask. A 1 in the postion inticate the
                 Power controler HW has a valid supply voltage
                 present (in V window) on that priority
                 (channel V1..Vn).
                 The mapping is formed by 1<<battery_status.msg.priority
                 or using the manifest constanst BRICKn_VALID_MASK

   usb_vaild - is now indicated from the Power controler HW or
               the usb_connected if Power controler is
               not present.

   brick_valid == 0 and usb_vaild = 1 implies the FMU is powered
   from USB only

   brick_valid != 0  and usb_vaild = 1 implies the FMU is powered
   from the higest priority brick, providing a 1 bit in brick_valid
   and from USB
2017-07-17 21:02:50 -10:00
Daniel Agar 76387b1693 uorb autogeneration 2016-05-14 11:27:07 +02:00
Lorenz Meier 520d830cec uORB: Moved subsystem_info to generated topics 2015-05-27 15:21:32 -07:00