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67 Commits

Author SHA1 Message Date
Daniel Agar 77694183b2 delete position_estimator_inav 2019-08-02 17:38:28 -04:00
Beat Küng b7a0e1ef03 boards: simplify RC port configuration by using NuttX ioctl's 
A board only needs to define:
 #define RC_SERIAL_PORT                     "/dev/ttyS4"

Then it can optionally define one or more of the following:
 #define RC_SERIAL_SWAP_RXTX
 #define RC_SERIAL_SINGLEWIRE
 #define RC_INVERT_INPUT(_invert_true) px4_arch_gpiowrite(GPIO_SBUS_INV, _invert_true)
 2019-07-16 08:09:22 +02:00
Beat Küng 4b0afff33a fmu-v5 init.c: remove unused include 2019-07-16 08:09:22 +02:00
Timothy Scott 2ed00c9cb6 Rover: Rewrote gnd_pos_control and removed gnd_att_control (#12239) 2019-07-11 09:39:13 -04:00
Daniel Agar d4cd1d0d2e
NuttX stm32f7 fully re-enable dcache with write back (#12435) 
- fixes https://github.com/PX4/Firmware/issues/12216
 - includes latest PX4/NuttX and apps update 7.29+
 2019-07-10 19:08:12 -04:00
Daniel Agar dc10a68539 NuttX and apps update 7.29 2019-07-10 12:58:35 -04:00
Daniel Agar 15d1543f95 create systemcmds/i2cdetect tool to scan i2c bus 2019-07-06 10:28:16 -04:00
dlwalter cbdfc0c587 px4_fmu-v5: rc.board_sensors start lis3mdl optional external magnetometer 2019-07-01 14:52:14 -04:00
Daniel Agar 5f20d3cf3b Jenkins HIL increase boot timeout for stackcheck build 
- px4_fmu-v5_stackcheck remove extra drivers (to try and get the system
usuable)
 2019-06-15 16:59:04 -04:00
David Sidrane 6eb4cf0ceb Add CUAV 5+ and Nano to fmu-v5 manifest 
* rcS: Set SYS_USE_IO for Nano
 2019-06-14 13:19:41 -04:00
Daniel Agar bef7a9ba8e
NuttX boards increase task limit 32 -> 64 (#12230) 2019-06-10 09:42:36 -04:00
BazookaJoe1900 b0176dc88a Pr cleanup board files (#12218) 
Clear non exist functions definitions
Added RC Serial note before its relevant definitions
 2019-06-08 15:48:53 -07:00
Beat Küng d947818654 console: add simple dmesg functionality (enable only on v5) 2019-06-04 11:57:54 +02:00
Daniel Agar f85c15e247 board common create generic dma allocator (from fat_dma_alloc) 2019-05-30 19:31:40 -04:00
Mohammed Kabir b334b75886 Move optical flow drivers to own subdirectory 2019-05-28 23:23:38 -04:00
David Sidrane ed8c6019d5 Added TI ina226 I2C power monitor (#11755) 2019-05-17 13:33:48 -04:00
Daniel Agar f067ca0d8f
fmu-v2 & fmu-v5 add missing tone_alarm to example board variants 
- fixes #12012
 2019-05-13 15:49:22 -04:00
Beat Küng 226f3c0999 rc.board_sensors: probe for external qmc5883 2019-04-15 10:37:06 +02:00
Beat Küng 914a9b78b6 new airframe for sih, HIL_STATE_QUATERION sent through MAVLink 2019-04-12 09:25:07 +02:00
Daniel Agar 5a50f96bcf
move icm20948 (Here GPS compass) to Cube sensors start (#11838) 2019-04-11 11:15:53 -04:00
David Sidrane 46c4a68b62 fmu-v5: Move stage 0 dcache disable to later in boot (#11791) 2019-04-04 11:07:28 -04:00
David Sidrane 1c212e3f84 M7 dcache ctrl via a parameter (#11769) 
* Support for armv7-m_dcache control via parameter

  The FORCE_F7_DCACHE parameter can be set to
   0 - (default) if Eratta exits turn dcache off else leave it on
   1 -  Force it off
   2 -  Force it on

   At boot the system will disable the d-cache if the silicon
   has the 1259864 Data corruption in a sequence of Write-Through
   stores and loads eratta.

   Post nsh script execution the FORCE_F7_DCACHE paramater
   will be used to set the d-cache to the state indicated
   above.
 2019-04-03 16:14:19 -04:00
Daniel Agar 5e6bfe1ad8
vscode updates 
* working debugging (one click build and debug)
   * SITL jmavsim
   * SITL gazebo
   * jlink px4_fmu-v{2-5}
 * improved syntax highlighting
   * GNU linker files
   * ROS message files msg/*.msg
   * jinja2 template files
 * fixed intellisense support
 2019-03-22 20:55:39 -04:00
Daniel Agar 3f890b6ab1 px4_fmu-v5 stackcheck compress defconfig 2019-03-21 08:41:01 -04:00
Daniel Agar f6cd70bcc5 px4_fmu-v5 nsh compress defconfig 2019-03-21 08:41:01 -04:00
David Sidrane 3938574a4a px4_fmuv5:Extend probes to CAP pins 
This also fixes a typo in the GPIO defines
 2019-03-18 16:16:23 -04:00
Hamish Willee 257b90958f Correct links to example docs 2019-03-15 08:05:54 +01:00
mcsauder d60d802194 Correct board-config PIN1/PIN0 typo in fmu-v5/src/board_config.h. 2019-03-02 14:31:02 -08:00
David Sidrane edd9f91a19 board:Set larger stack margin 2019-03-01 23:45:48 -05:00
David Sidrane 12d442e8dd px4_fmuv5:Stack Check build Increase to 2624 
The cause of the stack detection fault is because of the
   level of nesting in the start up script. We need to
   determine the worst case configuration and set the
   bar there.

   This fault occurred some 42 calls deep due to script
   calling script (repeat).

   The HW stack check requires as a margin of 204 bytes. That is
   ISR HW stacking of CPU(8) FPU(18) registers and SW stacking of
   CPU(11) and FPU(16) registers. Total CPU(19) registers is
   68 bytes and the total FPU(34) registers is 136 bytes.  On
   a system with a separate ISR stack This only needs to be 104
   so there is 100 bytes of headroom. But as coded the detection
   will give a false positive detection and fault. This does not
   mean that the stack will be corrupted.

   Adjustments to that stack can have no effect due to rounding.
   A stack size of 2608 and 2616 can yield the exact same size stack.
   So even when the failure is due to a 4 byte overflow, it can take
   greater than a 16 bytes increase to fix it. Because the final
   stack size is calculated with an 8 byte alignment after a 4 byte
   decrease. So 2624 becomes 2620 at runtime and will boot
   with SYS_AUTOSTART=4001.
 2019-03-01 23:45:48 -05:00
David Sidrane 0846059646 fmuv5:Repurpose TIM5_SPARE_4 as nARMED 
nARMED is a Digital OUTPUT. GPIO will be set as input while not
   armed HW will have Pull UP. While armed it will be configured
   as a GPIO OUT set LOW.
 2019-02-26 15:34:10 -05:00
Mohammed Kabir 20e44aa320 Analog Device ADIS16497 IMU initial support 2019-02-25 09:34:58 -05:00
Daniel Agar f1d17c9003
camera_capture add to all boards 2019-02-11 14:15:28 -05:00
David Sidrane b40f8d52a8 STM32F7 disable d-cache as a precaution (#11374) 
- see 1259864 Data corruption in a sequence of Write-Through stores and loads
 - if we can be certain this sequence won't occur in PX4 then the d-cache will be re-enabled
 2019-02-10 18:25:16 -05:00
DanielePettenuzzo b12b4e1222 fixes after rebase 2019-02-10 18:07:44 -05:00
Daniel Agar adad624572 px4_fmu-v5 remove PX4_FMUV5_RC00 2019-02-08 20:52:15 -05:00
Daniel Agar 06f5a782f4 px4_fmu-v5 board spi cleanup 2019-02-08 20:52:15 -05:00
Daniel Agar 1a4d31140e
create example vehicle type build configs for fmu-v2 and fmu-v5 (#10963) 
- update navigator precision landing to build without multicopter
 2019-02-05 19:53:54 -05:00
Daniel Agar 8dc0509989 mpu9250: split icm20948 support out into new separate driver 2019-01-30 09:29:08 +01:00
mcsauder dc5f18bdcd ToneAlarm class refactoring to implement an interface for hardware specific methods and a single ToneAlarm class. 2019-01-28 18:58:04 -08:00
Daniel Agar 739a02022b position_estimator_inav: move to examples (start deprecation) 2019-01-27 22:15:39 +01:00
David Sidrane 0f5f4814bb px4_fmu-v5: Inital commit NuttX 7.27+ 2019-01-25 06:32:37 -08:00
David Sidrane 8f308efa88 upstram NuttX CONFIG_EXAMPLES_NSH_CXXINITIALIZE->CONFIG_SYSTEM_NSH_CXXINITIALIZE 2019-01-25 06:32:37 -08:00
David Sidrane f2208171d5 Add callout for CONFIG_BOARDCTL_FINALINIT 2019-01-25 06:32:37 -08:00
Daniel Agar 2ffb49b734 delete px4_includes.h header and update boards/ to use syslog 2019-01-23 18:25:18 -05:00
Daniel Agar 67e5986c9b delete obsolete examples/subscriber 2019-01-23 18:25:18 -05:00
Daniel Agar 693ee4808a delete obsolete examples/publisher 2019-01-23 18:25:18 -05:00
Daniel Agar 320d2e9383
create PX4 platform layer initialization helper (#11269) 
- starts requirements for PX4 modules (hrt, param, etc)
 2019-01-22 14:13:20 -05:00
Daniel Agar fef65bf5c8 ROMFS split rc.board into defaults, sensors, and extras 2019-01-15 23:52:46 -08:00
David Sidrane 5e53f73ad8 fmu-v5:Add Alias CUAV V5 REV:5, VER:1 2019-01-08 07:34:22 -08:00