Initial omnibusf4sd target support

Flight tested: ekf2 w/ mag and compass by @nathantsoi: https://logs.px4.io/plot_app?log=79b81031-cf1e-41f0-890b-d6cd7d559766

NOTE: external I2C devices need a pullup. I have tested with a 3.3v 2.2k pullup.

Working:
 - mpu6000, bench tested and verified via nsh
 - fmu
 - all 6 ch output bench tested w/ pwm and oneshot via nsh
 - ppm input bench tested
 - dsm input bench tested
 - bmp280, bench tested and verified via nsh
 - hmc5883, bench tested and verified via nsh, but requires an external i2c pullup
 - gps on uart6
 - startuplog, nsh, mavlink on uart4, but params are not sent for some reason. RSSI pin is TX, MOTOR 5 is RX (normal mode, 57600 baud)
 - rgbled over i2c, bench tested and workingp
 - sbus via the shared sbus/ppm pin (which includes an inverter to the mcu SBUS in pin), remove the solder bridge or jumper to the ppm pin before use

Not yet implemented:
  - ADC
  - OSD: passthrough video is untested, use at your own risk until a basic driver is implemented.
This commit is contained in:
nathan 2018-03-27 19:01:20 -07:00 committed by Lorenz Meier
parent eb6086cc39
commit f754d092f8
20 changed files with 3850 additions and 11 deletions

2
Jenkinsfile vendored
View File

@ -53,7 +53,7 @@ pipeline {
} }
// nuttx default targets that are archived and uploaded to s3 // nuttx default targets that are archived and uploaded to s3
for (def option in ["px4fmu-v4", "px4fmu-v4pro", "px4fmu-v5", "aerofc-v1", "aerocore2", "auav-x21", "crazyflie", "mindpx-v2", "nxphlite-v3", "tap-v1"]) { for (def option in ["px4fmu-v4", "px4fmu-v4pro", "px4fmu-v5", "aerofc-v1", "aerocore2", "auav-x21", "crazyflie", "mindpx-v2", "nxphlite-v3", "tap-v1", "omnibus-f4sd"]) {
def node_name = "${option}" def node_name = "${option}"
builds[node_name] = createBuildNode(docker_nuttx, "${node_name}_default") builds[node_name] = createBuildNode(docker_nuttx, "${node_name}_default")
} }

View File

@ -120,7 +120,7 @@ then
fi fi
fi fi
if ver hwcmp MINDPX_V2 CRAZYFLIE AEROFC_V1 PX4FMU_V4 NXPHLITE_V3 if ver hwcmp MINDPX_V2 CRAZYFLIE AEROFC_V1 PX4FMU_V4 NXPHLITE_V3 OMNIBUS_F4SD
then then
set MIXER_AUX none set MIXER_AUX none
fi fi

View File

@ -3,7 +3,7 @@
# Standard startup script for sensor drivers. # Standard startup script for sensor drivers.
# #
if ver hwcmp AEROFC_V1 if ver hwcmp AEROFC_V1 OMNIBUS_F4SD
then then
# Aero FC uses separate driver # Aero FC uses separate driver
else else
@ -267,6 +267,16 @@ then
ll40ls start i2c ll40ls start i2c
fi fi
if ver hwcmp OMNIBUS_F4SD
then
mpu6000 -R 12 -s start
# Possible external compasses
hmc5883 -X start
bmp280 start
fi
if ver hwcmp PX4FMU_V4PRO if ver hwcmp PX4FMU_V4PRO
then then
# Internal SPI bus ICM-20608-G # Internal SPI bus ICM-20608-G

View File

@ -13,6 +13,12 @@ set +e
# #
# NOTE: COMMENT LINES ARE REMOVED BEFORE STORED IN ROMFS. # NOTE: COMMENT LINES ARE REMOVED BEFORE STORED IN ROMFS.
# #
# UART mapping on OMNIBUSF4SD:
#
# USART1 /dev/ttyS0 SerialRX
# USART4 /dev/ttyS1 TELEM1
# USART6 /dev/ttyS2 GPS
#
# UART mapping on FMUv2/3/4: # UART mapping on FMUv2/3/4:
# #
# UART1 /dev/ttyS0 IO debug (except v4, there ttyS0 is the wifi) # UART1 /dev/ttyS0 IO debug (except v4, there ttyS0 is the wifi)
@ -229,6 +235,11 @@ then
set MAVLINK_COMPANION_DEVICE /dev/ttyS4 set MAVLINK_COMPANION_DEVICE /dev/ttyS4
fi fi
if ver hwcmp OMNIBUS_F4SD
then
set MAVLINK_COMPANION_DEVICE /dev/ttyS1
fi
# #
# Set USE_IO flag # Set USE_IO flag
# #
@ -281,8 +292,8 @@ then
# #
if [ $AUTOCNF == yes ] if [ $AUTOCNF == yes ]
then then
# Disable safety switch by default on Pixracer # Disable safety switch by default on Pixracer and OmnibusF4SD
if ver hwcmp PX4FMU_V4 if ver hwcmp PX4FMU_V4 OMNIBUS_F4SD
then then
param set CBRK_IO_SAFETY 22027 param set CBRK_IO_SAFETY 22027
fi fi
@ -412,7 +423,6 @@ then
sh /etc/init.d/rc.sensors sh /etc/init.d/rc.sensors
commander start commander start
fi fi
send_event start send_event start
load_mon start load_mon start
@ -573,12 +583,12 @@ then
fi fi
fi fi
if ver hwcmp CRAZYFLIE if ver hwcmp CRAZYFLIE OMNIBUS_F4SD
then then
# Avoid using either of the two available serials # Avoid using either of the two available serials
set MAVLINK_F none set MAVLINK_F none
fi fi
fi fi
if [ "x$MAVLINK_F" == xnone ] if [ "x$MAVLINK_F" == xnone ]
then then
@ -707,7 +717,7 @@ then
fi fi
fi fi
if ver hwcmp PX4FMU_V2 PX4FMU_V4 PX4FMU_V4PRO MINDPX_V2 PX4FMU_V5 if ver hwcmp PX4FMU_V2 PX4FMU_V4 PX4FMU_V4PRO MINDPX_V2 PX4FMU_V5 OMNIBUS_F4SD
then then
# Check for flow sensor - as it is a background task, launch it last # Check for flow sensor - as it is a background task, launch it last
px4flow start & px4flow start &

View File

@ -0,0 +1,150 @@
px4_nuttx_configure(HWCLASS m4 CONFIG nsh ROMFS y ROMFSROOT px4fmu_common)
set(config_uavcan_num_ifaces 1)
set(config_module_list
#
# Board support modules
#
drivers/barometer/bmp280
#drivers/differential_pressure
#drivers/distance_sensor
drivers/magnetometer/hmc5883
drivers/telemetry/frsky_telemetry
drivers/imu/mpu6000
#drivers/batt_smbus
#drivers/blinkm
#drivers/camera_trigger
drivers/gps
#drivers/irlock
#drivers/mkblctrl
#drivers/oreoled
#drivers/pca9685
#drivers/pwm_input
drivers/px4flow
drivers/px4fmu
drivers/rgbled
drivers/stm32
#drivers/stm32/adc
#drivers/stm32/tone_alarm
#drivers/tap_esc
#drivers/vmount
modules/sensors
#
# System commands
#
systemcmds/bl_update
systemcmds/config
#systemcmds/dumpfile
#systemcmds/esc_calib
systemcmds/hardfault_log
systemcmds/led_control
systemcmds/mixer
#systemcmds/motor_ramp
#systemcmds/mtd
systemcmds/nshterm
systemcmds/param
systemcmds/perf
systemcmds/pwm
systemcmds/reboot
#systemcmds/sd_bench
systemcmds/top
systemcmds/topic_listener
systemcmds/tune_control
systemcmds/ver
##
## Testing
##
#drivers/distance_sensor/sf0x/sf0x_tests
#drivers/test_ppm
##lib/rc/rc_tests
#modules/commander/commander_tests
#lib/controllib/controllib_test
#modules/mavlink/mavlink_tests
#modules/mc_pos_control/mc_pos_control_tests
#modules/uORB/uORB_tests
#systemcmds/tests
#
# General system control
#
#modules/camera_feedback
modules/commander
modules/events
modules/gpio_led
modules/land_detector
modules/load_mon
modules/mavlink
modules/navigator
#modules/uavcan
#
# Estimation modules
#
modules/attitude_estimator_q
modules/ekf2
modules/landing_target_estimator
modules/local_position_estimator
#modules/position_estimator_inav
modules/wind_estimator
#
# Vehicle Control
#
modules/fw_att_control
modules/fw_pos_control_l1
modules/gnd_att_control
modules/gnd_pos_control
modules/mc_att_control
modules/mc_pos_control
modules/vtol_att_control
#
# Logging
#
modules/logger
modules/sdlog2
#
# Library modules
#
modules/dataman
##
## OBC challenge
##
#examples/bottle_drop
##
## Rover apps
##
#examples/rover_steering_control
##
## Segway
##
#examples/segway
##
## Demo apps
##
## Tutorial code from
## https://px4.io/dev/px4_simple_app
#examples/px4_simple_app
## Tutorial code from
## https://px4.io/dev/debug_values
#examples/px4_mavlink_debug
## Tutorial code from
## https://px4.io/dev/example_fixedwing_control
#examples/fixedwing_control
## Hardware test
#examples/hwtest
)

View File

@ -0,0 +1,13 @@
{
"board_id": 42,
"magic": "OMNIBUSF4SD",
"description": "Firmware for the OmnibusF4SD board",
"image": "",
"build_time": 0,
"summary": "PX4/OmnibusF4",
"version": "0.1",
"image_size": 0,
"image_maxsize": 1032192,
"git_identity": "",
"board_revision": 0
}

View File

@ -0,0 +1,398 @@
/************************************************************************************
* nuttx-configs/omnibus-f4sd/include/board.h
* include/arch/board/board.h
*
* Copyright (C) 2012 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Copyright (c) 2018 PX4 Development Team. All rights reserved.
* Author: Nathan Tsoi <nathan@vertile.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
#ifndef __CONFIG_OMNIBUSF4SD_INCLUDE_BOARD_H
#define __CONFIG_OMNIBUSF4SD_INCLUDE_BOARD_H
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#ifndef __ASSEMBLY__
# include <stdint.h>
#endif
#include "stm32_rcc.h"
#include "stm32_sdio.h"
#include "stm32.h"
/************************************************************************************
* Definitions
************************************************************************************/
/* Clocking *************************************************************************/
/* The omnibusf4sd board features a single 8MHz crystal. Space is provided
* for a 32kHz RTC backup crystal, but it is not stuffed.
*
* This is the canonical configuration:
* System Clock source : PLL (HSE)
* SYSCLK(Hz) : 168000000 Determined by PLL configuration
* HCLK(Hz) : 168000000 (STM32_RCC_CFGR_HPRE)
* AHB Prescaler : 1 (STM32_RCC_CFGR_HPRE)
* APB1 Prescaler : 4 (STM32_RCC_CFGR_PPRE1)
* APB2 Prescaler : 2 (STM32_RCC_CFGR_PPRE2)
* HSE Frequency(Hz) : 8000000 (STM32_BOARD_XTAL)
* PLLM : 8 (STM32_PLLCFG_PLLM)
* PLLN : 336 (STM32_PLLCFG_PLLN)
* PLLP : 2 (STM32_PLLCFG_PLLP)
* PLLQ : 7 (STM32_PLLCFG_PLLQ)
* Main regulator output voltage : Scale1 mode Needed for high speed SYSCLK
* Flash Latency(WS) : 5
* Prefetch Buffer : OFF
* Instruction cache : ON
* Data cache : ON
* Require 48MHz for USB OTG FS, : Enabled
* SDIO and RNG clock
*/
/* HSI - 16 MHz RC factory-trimmed
* LSI - 32 KHz RC
* HSE - On-board crystal frequency is 8MHz
* LSE - 32.768 kHz
*/
#define STM32_BOARD_XTAL 8000000ul
#define STM32_HSI_FREQUENCY 16000000ul
#define STM32_LSI_FREQUENCY 32000
#define STM32_HSE_FREQUENCY STM32_BOARD_XTAL
#define STM32_LSE_FREQUENCY 32768
/* Main PLL Configuration.
*
* PLL source is HSE
* PLL_VCO = (STM32_HSE_FREQUENCY / PLLM) * PLLN
* = (8,000,000 / 8) * 336
* = 336,000,000
* SYSCLK = PLL_VCO / PLLP
* = 336,000,000 / 2 = 168,000,000
* USB OTG FS, SDIO and RNG Clock
* = PLL_VCO / PLLQ
* = 48,000,000
*/
#define STM32_PLLCFG_PLLM RCC_PLLCFG_PLLM(8)
#define STM32_PLLCFG_PLLN RCC_PLLCFG_PLLN(336)
#define STM32_PLLCFG_PLLP RCC_PLLCFG_PLLP_2
#define STM32_PLLCFG_PLLQ RCC_PLLCFG_PLLQ(7)
#define STM32_SYSCLK_FREQUENCY 168000000ul
/* AHB clock (HCLK) is SYSCLK (168MHz) */
#define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK /* HCLK = SYSCLK / 1 */
#define STM32_HCLK_FREQUENCY STM32_SYSCLK_FREQUENCY
#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* same as above, to satisfy compiler */
/* APB1 clock (PCLK1) is HCLK/4 (42MHz) */
#define STM32_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLKd4 /* PCLK1 = HCLK / 4 */
#define STM32_PCLK1_FREQUENCY (STM32_HCLK_FREQUENCY/4)
/* Timers driven from APB1 will be twice PCLK1 */
#define STM32_APB1_TIM2_CLKIN (2*STM32_PCLK1_FREQUENCY)
#define STM32_APB1_TIM3_CLKIN (2*STM32_PCLK1_FREQUENCY)
#define STM32_APB1_TIM4_CLKIN (2*STM32_PCLK1_FREQUENCY)
#define STM32_APB1_TIM5_CLKIN (2*STM32_PCLK1_FREQUENCY)
#define STM32_APB1_TIM6_CLKIN (2*STM32_PCLK1_FREQUENCY)
#define STM32_APB1_TIM7_CLKIN (2*STM32_PCLK1_FREQUENCY)
#define STM32_APB1_TIM12_CLKIN (2*STM32_PCLK1_FREQUENCY)
#define STM32_APB1_TIM13_CLKIN (2*STM32_PCLK1_FREQUENCY)
#define STM32_APB1_TIM14_CLKIN (2*STM32_PCLK1_FREQUENCY)
/* APB2 clock (PCLK2) is HCLK/2 (84MHz) */
#define STM32_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLKd2 /* PCLK2 = HCLK / 2 */
#define STM32_PCLK2_FREQUENCY (STM32_HCLK_FREQUENCY/2)
/* Timers driven from APB2 will be twice PCLK2 */
#define STM32_APB2_TIM1_CLKIN (2*STM32_PCLK2_FREQUENCY)
#define STM32_APB2_TIM8_CLKIN (2*STM32_PCLK2_FREQUENCY)
#define STM32_APB2_TIM9_CLKIN (2*STM32_PCLK2_FREQUENCY)
#define STM32_APB2_TIM10_CLKIN (2*STM32_PCLK2_FREQUENCY)
#define STM32_APB2_TIM11_CLKIN (2*STM32_PCLK2_FREQUENCY)
/* Timer Frequencies, if APBx is set to 1, frequency is same to APBx
* otherwise frequency is 2xAPBx.
* Note: TIM1,8-11 are on APB2, others on APB1
*/
#define BOARD_TIM1_FREQUENCY STM32_APB2_TIM1_CLKIN
#define BOARD_TIM2_FREQUENCY STM32_APB1_TIM2_CLKIN
#define BOARD_TIM3_FREQUENCY STM32_APB1_TIM3_CLKIN
#define BOARD_TIM4_FREQUENCY STM32_APB1_TIM4_CLKIN
#define BOARD_TIM5_FREQUENCY STM32_APB1_TIM5_CLKIN
#define BOARD_TIM6_FREQUENCY STM32_APB1_TIM6_CLKIN
#define BOARD_TIM7_FREQUENCY STM32_APB1_TIM7_CLKIN
#define BOARD_TIM8_FREQUENCY STM32_APB2_TIM8_CLKIN
#define BOARD_TIM9_FREQUENCY STM32_APB2_TIM9_CLKIN
#define BOARD_TIM10_FREQUENCY STM32_APB2_TIM10_CLKIN
#define BOARD_TIM11_FREQUENCY STM32_APB2_TIM11_CLKIN
#define BOARD_TIM12_FREQUENCY STM32_APB1_TIM12_CLKIN
#define BOARD_TIM13_FREQUENCY STM32_APB1_TIM13_CLKIN
#define BOARD_TIM14_FREQUENCY STM32_APB1_TIM14_CLKIN
/* SDIO dividers. Note that slower clocking is required when DMA is disabled
* in order to avoid RX overrun/TX underrun errors due to delayed responses
* to service FIFOs in interrupt driven mode. These values have not been
* tuned!!!
*
* SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(118+2)=400 KHz
*/
#define SDIO_INIT_CLKDIV (118 << SDIO_CLKCR_CLKDIV_SHIFT)
/* DMA ON: SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(1+2)=16 MHz
* DMA OFF: SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(2+2)=12 MHz
*/
#ifdef CONFIG_STM32_SDIO_DMA
# define SDIO_MMCXFR_CLKDIV (1 << SDIO_CLKCR_CLKDIV_SHIFT)
#else
# define SDIO_MMCXFR_CLKDIV (2 << SDIO_CLKCR_CLKDIV_SHIFT)
#endif
/* DMA ON: SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(1+2)=16 MHz
* DMA OFF: SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(2+2)=12 MHz
*/
#ifdef CONFIG_STM32_SDIO_DMA
# define SDIO_SDXFR_CLKDIV (1 << SDIO_CLKCR_CLKDIV_SHIFT)
#else
# define SDIO_SDXFR_CLKDIV (2 << SDIO_CLKCR_CLKDIV_SHIFT)
#endif
/* DMA Channl/Stream Selections *****************************************************/
/* Stream selections are arbitrary for now but might become important in the future
* is we set aside more DMA channels/streams.
*
* SDIO DMA
*   DMAMAP_SDIO_1 = Channel 4, Stream 3 <- may later be used by SPI DMA
*   DMAMAP_SDIO_2 = Channel 4, Stream 6
*/
#define DMAMAP_SDIO DMAMAP_SDIO_1
/* LED definitions ******************************************************************/
/* If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in any
* way. The following definitions are used to access individual LEDs.
*/
/* LED index values for use with stm32_setled() */
#define BOARD_LED1 0
//#define BOARD_LED2 1
#define BOARD_NLEDS 1
#define BOARD_LED_BLUE BOARD_LED1
//#define BOARD_LED_RED BOARD_LED2
/* LED bits for use with stm32_setleds() */
#define BOARD_LED1_BIT (1 << BOARD_LED1)
#define BOARD_LED2_BIT (1 << BOARD_LED2)
/* If CONFIG_ARCH_LEDs is defined, then NuttX will control the 2 LEDs on board the
* omnibusf4sd. The following definitions describe how NuttX controls the LEDs:
*/
#define LED_STARTED 0 /* LED1 */
#define LED_HEAPALLOCATE 1 /* LED2 */
#define LED_IRQSENABLED 2 /* LED1 */
#define LED_STACKCREATED 3 /* LED1 + LED2 */
#define LED_INIRQ 4 /* LED1 */
#define LED_SIGNAL 5 /* LED2 */
#define LED_ASSERTION 6 /* LED1 + LED2 */
#define LED_PANIC 7 /* LED1 + LED2 */
/* Alternate function pin selections ************************************************/
/* UART1:
*
* PA10 (RX) and PA9 (TX) are broken out on J5
*/
#define GPIO_USART1_RX GPIO_USART1_RX_1
#define GPIO_USART1_TX GPIO_USART1_TX_1
/* USART1 require a RX DMA configuration */
#define DMAMAP_USART1_RX DMAMAP_USART1_RX_2
/* USART3:
*
* PC10 (TX) and PC11 (RX) are broken out on J4
*
* However, this port is shared with SPI3 which contains the BMP280 and MAX7456
*
* The Silkscreen pin labeled SCL is TX
* MISO is RX
*/
//#define GPIO_USART3_RX GPIO_USART3_RX_2
//#define GPIO_USART3_TX GPIO_USART3_TX_2
/* UART4:
*
* PA0 (TX) -- Labeled RSSI on the silkscreen is only broken out on a test pad
* on the pro version. It's on a 2.54mm header on other versions
* PA1 (RX) -- Motor 5 out
*/
#define GPIO_UART4_RX GPIO_UART4_RX_1
#define GPIO_UART4_TX GPIO_UART4_TX_1
/* UART6:
*
* PC6 (TX) and PC7 (RX) are broken out on J10
*/
#define GPIO_USART6_RX GPIO_USART6_RX_1
#define GPIO_USART6_TX GPIO_USART6_TX_1
/* USART6 require a RX DMA configuration */
#define DMAMAP_USART6_RX DMAMAP_USART6_RX_1
/* SPI1:
* MPU6000
* CS: PA4 -- configured in board_config.h
* CLK: PA5
* MISO: PA6
* MOSI: PA7
*/
#define GPIO_SPI1_SCK GPIO_SPI1_SCK_1
#define GPIO_SPI1_MISO GPIO_SPI1_MISO_1
#define GPIO_SPI1_MOSI GPIO_SPI1_MOSI_1
/* SPI2:
* SD Card
* CS: PB12 -- configured in board_config.h
* CLK: PB13
* MISO: PB14
* MOSI: PB15
*/
#define GPIO_SPI2_SCK GPIO_SPI2_SCK_2
#define GPIO_SPI2_MISO GPIO_SPI2_MISO_1
#define GPIO_SPI2_MOSI GPIO_SPI2_MOSI_1
/* SPI3:
* BMP280
* CS: PB3 -- configured in board_config.h
* CLK: PC10
* MISO: PC11
* MOSI: PC12
*/
#define GPIO_SPI3_SCK GPIO_SPI3_SCK_2
#define GPIO_SPI3_MISO GPIO_SPI3_MISO_2
#define GPIO_SPI3_MOSI GPIO_SPI3_MOSI_2
/*
* I2C (external)
*
* SCL: PB10
* SDA: PB11
*
* TODO:
* The optional _GPIO configurations allow the I2C driver to manually
* reset the bus to clear stuck slaves. They match the pin configuration,
* but are normally-high GPIOs.
*/
#define GPIO_I2C2_SCL GPIO_I2C2_SCL_1
#define GPIO_I2C2_SDA GPIO_I2C2_SDA_1
// TODO:
//#define GPIO_I2C1_SCL_GPIO (GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN6)
//#define GPIO_I2C1_SDA_GPIO (GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN9)
/************************************************************************************
* Public Data
************************************************************************************/
#ifndef __ASSEMBLY__
#undef EXTERN
#if defined(__cplusplus)
#define EXTERN extern "C"
extern "C" {
#else
#define EXTERN extern
#endif
/************************************************************************************
* Public Function Prototypes
************************************************************************************/
/************************************************************************************
* Name: stm32_boardinitialize
*
* Description:
* All STM32 architectures must provide the following entry point. This entry point
* is called early in the intitialization -- after all memory has been configured
* and mapped but before any devices have been initialized.
*
************************************************************************************/
EXTERN void stm32_boardinitialize(void);
/************************************************************************************
* Name: stm32_ledinit, stm32_setled, and stm32_setleds
*
* Description:
* If CONFIG_ARCH_LEDS is defined, then NuttX will control the on-board LEDs. If
* CONFIG_ARCH_LEDS is not defined, then the following interfacesare available to
* control the LEDs from user applications.
*
************************************************************************************/
#ifndef CONFIG_ARCH_LEDS
EXTERN void stm32_ledinit(void);
EXTERN void stm32_setled(int led, bool ledon);
EXTERN void stm32_setleds(uint8_t ledset);
#endif
#undef EXTERN
#if defined(__cplusplus)
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* __CONFIG_OMNIBUSF4SD_INCLUDE_BOARD_H */

View File

@ -0,0 +1,42 @@
/****************************************************************************
*
* Copyright (C) 2018 PX4 Development Team. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name PX4 nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/**
* nsh_romfsetc.h
*
* This file is a stub for 'make export' purposes; the actual ROMFS
* must be supplied by the library client.
*/
extern unsigned char romfs_img[];
extern unsigned int romfs_img_len;

File diff suppressed because it is too large Load Diff

View File

@ -0,0 +1,150 @@
/****************************************************************************
* configs/omnibus-f4sd/scripts/ld.script
*
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/* The STM32F405RG has 1024Kb of FLASH beginning at address 0x0800:0000 and
* 192Kb of SRAM. SRAM is split up into three blocks:
*
* 1) 112Kb of SRAM beginning at address 0x2000:0000
* 2) 16Kb of SRAM beginning at address 0x2001:c000
* 3) 64Kb of CCM SRAM beginning at address 0x1000:0000
*
* When booting from FLASH, FLASH memory is aliased to address 0x0000:0000
* where the code expects to begin execution by jumping to the entry point in
* the 0x0800:0000 address range.
*
* The first 0x4000 of flash is reserved for the bootloader.
*/
MEMORY
{
flash (rx) : ORIGIN = 0x08004000, LENGTH = 1008K
sram (rwx) : ORIGIN = 0x20000000, LENGTH = 128K
ccsram (rwx) : ORIGIN = 0x10000000, LENGTH = 64K
}
OUTPUT_ARCH(arm)
ENTRY(__start) /* treat __start as the anchor for dead code stripping */
EXTERN(_vectors) /* force the vectors to be included in the output */
/*
* Ensure that abort() is present in the final object. The exception handling
* code pulled in by libgcc.a requires it (and that code cannot be easily avoided).
*/
EXTERN(abort)
SECTIONS
{
.text : {
_stext = ABSOLUTE(.);
*(.vectors)
*(.text .text.*)
*(.fixup)
*(.gnu.warning)
*(.rodata .rodata.*)
*(.gnu.linkonce.t.*)
*(.got)
*(.gcc_except_table)
*(.gnu.linkonce.r.*)
_etext = ABSOLUTE(.);
/*
* This is a hack to make the newlib libm __errno() call
* use the NuttX get_errno_ptr() function.
*/
__errno = get_errno_ptr;
} > flash
/*
* Init functions (static constructors and the like)
*/
.init_section : {
_sinit = ABSOLUTE(.);
KEEP(*(.init_array .init_array.*))
_einit = ABSOLUTE(.);
} > flash
/*
* Construction data for parameters.
*/
__param ALIGN(4): {
__param_start = ABSOLUTE(.);
KEEP(*(__param*))
__param_end = ABSOLUTE(.);
} > flash
.ARM.extab : {
*(.ARM.extab*)
} > flash
__exidx_start = ABSOLUTE(.);
.ARM.exidx : {
*(.ARM.exidx*)
} > flash
__exidx_end = ABSOLUTE(.);
_eronly = ABSOLUTE(.);
.data : {
_sdata = ABSOLUTE(.);
*(.data .data.*)
*(.gnu.linkonce.d.*)
CONSTRUCTORS
_edata = ABSOLUTE(.);
} > sram AT > flash
.bss : {
_sbss = ABSOLUTE(.);
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
. = ALIGN(4);
_ebss = ABSOLUTE(.);
} > sram
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_info 0 : { *(.debug_info) }
.debug_line 0 : { *(.debug_line) }
.debug_pubnames 0 : { *(.debug_pubnames) }
.debug_aranges 0 : { *(.debug_aranges) }
}

View File

@ -584,8 +584,12 @@ struct bmp280_bus_option {
#if defined(PX4_SPIDEV_EXT_BARO) && defined(PX4_SPI_BUS_EXT) #if defined(PX4_SPIDEV_EXT_BARO) && defined(PX4_SPI_BUS_EXT)
{ BMP280_BUS_SPI_EXTERNAL, "/dev/bmp280_spi_ext", &bmp280_spi_interface, PX4_SPI_BUS_EXT, PX4_SPIDEV_EXT_BARO, true, NULL }, { BMP280_BUS_SPI_EXTERNAL, "/dev/bmp280_spi_ext", &bmp280_spi_interface, PX4_SPI_BUS_EXT, PX4_SPIDEV_EXT_BARO, true, NULL },
#endif #endif
#ifdef PX4_SPIDEV_BARO #if defined(PX4_SPIDEV_BARO)
# if defined(PX4_SPIDEV_BARO_BUS)
{ BMP280_BUS_SPI_INTERNAL, "/dev/bmp280_spi_int", &bmp280_spi_interface, PX4_SPIDEV_BARO_BUS, PX4_SPIDEV_BARO, false, NULL },
# else
{ BMP280_BUS_SPI_INTERNAL, "/dev/bmp280_spi_int", &bmp280_spi_interface, PX4_SPI_BUS_SENSORS, PX4_SPIDEV_BARO, false, NULL }, { BMP280_BUS_SPI_INTERNAL, "/dev/bmp280_spi_int", &bmp280_spi_interface, PX4_SPI_BUS_SENSORS, PX4_SPIDEV_BARO, false, NULL },
# endif
#endif #endif
#ifdef PX4_I2C_OBDEV_BMP280 #ifdef PX4_I2C_OBDEV_BMP280
{ BMP280_BUS_I2C_INTERNAL, "/dev/bmp280_i2c_int", &bmp280_i2c_interface, PX4_I2C_BUS_EXPANSION, PX4_I2C_OBDEV_BMP280, false, NULL }, { BMP280_BUS_I2C_INTERNAL, "/dev/bmp280_i2c_int", &bmp280_i2c_interface, PX4_I2C_BUS_EXPANSION, PX4_I2C_OBDEV_BMP280, false, NULL },

View File

@ -73,7 +73,7 @@
#if defined(BOARD_DMA_ALLOC_POOL_SIZE) #if defined(BOARD_DMA_ALLOC_POOL_SIZE)
# if !defined(CONFIG_GRAN) || !defined(CONFIG_FAT_DMAMEMORY) # if !defined(CONFIG_GRAN) || !defined(CONFIG_FAT_DMAMEMORY)
# error microSD DMA support requires CONFIG_GRAN # error microSD DMA support requires CONFIG_GRAN and CONFIG_FAT_DMAMEMORY
# endif # endif
static GRAN_HANDLE dma_allocator; static GRAN_HANDLE dma_allocator;

View File

@ -0,0 +1,49 @@
############################################################################
#
# Copyright (c) 2018 PX4 Development Team. All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# 1. Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in
# the documentation and/or other materials provided with the
# distribution.
# 3. Neither the name PX4 nor the names of its contributors may be
# used to endorse or promote products derived from this software
# without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
############################################################################
px4_add_library(drivers_board
init.c
led.c
spi.c
timer_config.c
usb.c
)
target_link_libraries(drivers_board
PRIVATE
drivers__led # drv_led_start
nuttx_apps # up_cxxinitialize
nuttx_arch # sdio
nuttx_drivers # sdio
parameters # param_init
)

View File

@ -0,0 +1,340 @@
/****************************************************************************
*
* Copyright (c) 2018, 2014 PX4 Development Team. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name PX4 nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/**
* @file board_config.h
*
* omnibusf4sd internal definitions
*/
#pragma once
/****************************************************************************************************
* Included Files
****************************************************************************************************/
#include <px4_config.h>
#include <nuttx/compiler.h>
#include <stdint.h>
/****************************************************************************************************
* Definitions
****************************************************************************************************/
/* Configuration ************************************************************************************/
/* omnibusf4sd GPIOs ***********************************************************************************/
/* LEDs */
// power - green
// LED1 - PB5 - blue
#define GPIO_LED1 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTB|GPIO_PIN5)
#define GPIO_LED_BLUE GPIO_LED1
/* GPS
* UART6
*/
#define GPS_DEFAULT_UART_PORT "/dev/ttyS2"
/*
* ADC channels
*
* These are the channel numbers of the ADCs of the microcontroller that can be used by the Px4 Firmware in the adc driver
*/
// TODO: ADCs, eg. pixracer
//#define ADC_CHANNELS (1 << 2) | (1 << 3) | (1 << 4) | (1 << 10) | (1 << 11) | (1 << 12) | (1 << 13) | (1 << 14)
// Placeholder
#define ADC_BATTERY_VOLTAGE_CHANNEL ((uint8_t)(-1))
#define ADC_BATTERY_CURRENT_CHANNEL ((uint8_t)(-1))
#define ADC_AIRSPEED_VOLTAGE_CHANNEL ((uint8_t)(-1))
// TODO: ADCs
//#define ADC_BATTERY_VOLTAGE_CHANNEL 2
//#define ADC_BATTERY_CURRENT_CHANNEL 3
//#define ADC_5V_RAIL_SENSE 4
//#define ADC_RC_RSSI_CHANNEL 11
/* Define Battery 1 Voltage Divider and A per V
*/
// TODO:
//#define BOARD_BATTERY1_V_DIV (13.653333333f)
//#define BOARD_BATTERY1_A_PER_V (36.367515152f)
/* User GPIOs
*
* GPIO0-5 are the PWM servo outputs.
* GPIO_TIM3_CH3OUT GPIO_TIM3_CH3OUT_1 //PB0 S1_OUT D1_ST7
* GPIO_TIM3_CH4OUT GPIO_TIM3_CH4OUT_1 //PB1 S2_OUT D1_ST2
* GPIO_TIM2_CH4OUT GPIO_TIM2_CH4OUT_1 //PA3 S3_OUT D1_ST6
* GPIO_TIM2_CH3OUT GPIO_TIM2_CH3OUT_1 //PA2 S4_OUT D1_ST1
* GPIO_TIM5_CH2OUT GPIO_TIM5_CH2OUT_1 //PA1 S5_OUT
* GPIO_TIM1_CH1OUT GPIO_TIM1_CH1OUT_1 //PA8 S6_OUT
*/
#define _MK_GPIO_INPUT(def) (((def) & (GPIO_PORT_MASK | GPIO_PIN_MASK)) | (GPIO_INPUT|GPIO_PULLUP))
#define GPIO_GPIO0_INPUT _MK_GPIO_INPUT(GPIO_TIM3_CH3IN)
#define GPIO_GPIO1_INPUT _MK_GPIO_INPUT(GPIO_TIM3_CH4IN)
#define GPIO_GPIO2_INPUT _MK_GPIO_INPUT(GPIO_TIM2_CH4IN)
#define GPIO_GPIO3_INPUT _MK_GPIO_INPUT(GPIO_TIM2_CH3IN)
//#define GPIO_GPIO4_INPUT _MK_GPIO_INPUT(GPIO_TIM5_CH2IN)
//#define GPIO_GPIO5_INPUT _MK_GPIO_INPUT(GPIO_TIM1_CH1IN)
#define _MK_GPIO_OUTPUT(def) (((def) & (GPIO_PORT_MASK | GPIO_PIN_MASK)) | (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR))
#define GPIO_GPIO0_OUTPUT _MK_GPIO_OUTPUT(GPIO_TIM3_CH3OUT)
#define GPIO_GPIO1_OUTPUT _MK_GPIO_OUTPUT(GPIO_TIM3_CH4OUT)
#define GPIO_GPIO2_OUTPUT _MK_GPIO_OUTPUT(GPIO_TIM2_CH4OUT)
#define GPIO_GPIO3_OUTPUT _MK_GPIO_OUTPUT(GPIO_TIM2_CH3OUT)
//#define GPIO_GPIO4_OUTPUT _MK_GPIO_OUTPUT(GPIO_TIM5_CH2OUT)
//#define GPIO_GPIO5_OUTPUT _MK_GPIO_OUTPUT(GPIO_TIM1_CH1OUT)
/*----------------------------------------------------------*/
/* OMNIBUSF4SD SPI chip selects and DRDY */
/*----------------------------------------------------------*/
/* SPI chip selects */
/*
* Define the Chip Selects for SPI1
*
* MPU6000: PA4
*
*/
#define GPIO_SPI_CS_MEMS (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTA|GPIO_PIN4)
/*
* Define the Chip Selects for SPI2
*
* SD Card: PB12
*
*/
#define GPIO_SPI_CS_SDCARD (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN12)
/*
* Define the Chip Selects for SPI3
*
* BMP280: PB3
* ABT7456: PA15
*
*/
#define GPIO_SPI3_CS_BARO (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN3)
#define GPIO_SPI3_CS_OSD (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_SET|GPIO_PORTA|GPIO_PIN15)
/*
* Define the ability to shut off off the sensor signals
* by changing the signals to inputs
*/
#define _PIN_OFF(def) (((def) & (GPIO_PORT_MASK | GPIO_PIN_MASK)) | (GPIO_INPUT|GPIO_PULLDOWN|GPIO_SPEED_2MHz))
/* SPI 1 bus off */
#define GPIO_SPI1_SCK_OFF _PIN_OFF(GPIO_SPI1_SCK)
#define GPIO_SPI1_MISO_OFF _PIN_OFF(GPIO_SPI1_MISO)
#define GPIO_SPI1_MOSI_OFF _PIN_OFF(GPIO_SPI1_MOSI)
/* SPI 1 CS's off */
#define GPIO_SPI1_CS_MEMS_OFF _PIN_OFF(GPIO_SPI_CS_MEMS)
/* SPI 2 bus off */
#define GPIO_SPI2_SCK_OFF _PIN_OFF(GPIO_SPI2_SCK)
#define GPIO_SPI2_MISO_OFF _PIN_OFF(GPIO_SPI2_MISO)
#define GPIO_SPI2_MOSI_OFF _PIN_OFF(GPIO_SPI2_MOSI)
/* SPI 2 CS's off */
#define GPIO_SPI2_CS_SDCARD_OFF _PIN_OFF(GPIO_SPI_CS_SDCARD)
/* SPI 3 bus off */
#define GPIO_SPI3_SCK_OFF _PIN_OFF(GPIO_SPI3_SCK)
#define GPIO_SPI3_MISO_OFF _PIN_OFF(GPIO_SPI3_MISO)
#define GPIO_SPI3_MOSI_OFF _PIN_OFF(GPIO_SPI3_MOSI)
/* SPI 3 CS's off */
#define GPIO_SPI3_CS_BARO_OFF _PIN_OFF(GPIO_SPI3_CS_BARO)
// One device per bus
#define PX4_SPI_BUS_SENSORS 1
#define PX4_SPIDEV_MPU 1
#define PX4_SPIDEV_BARO_BUS 3
#define PX4_SPIDEV_BARO 1
/* USB OTG FS
*
* PA9 OTG_FS_VBUS VBUS sensing
*/
#define GPIO_OTGFS_VBUS (GPIO_INPUT|GPIO_FLOAT|GPIO_SPEED_100MHz|GPIO_OPENDRAIN|GPIO_PORTC|GPIO_PIN5)
/*----------------------------------------------------------*/
/* End OMNIBUSF4SD SPI chip selects and DRDY */
/*----------------------------------------------------------*/
#define PX4_SPI_BUS_BARO 3
#define PX4_I2C_BUS_EXPANSION 2
#define PX4_I2C_BUS_LED PX4_I2C_BUS_EXPANSION
/* PWM
*
* 6 PWM outputs are configured.
*
* Alternatively CH3/CH4 could be assigned to UART6_TX/RX
*
* Pins:
*
* INPUTS:
* CH1 : PB8 : TIM10_CH1 // PPM
* CH2 : PB9 : TIM4_CH4
* CH3 : PC6 : TIM8_CH1 // OR UART6_TX
* CH4 : PC7 : TIM8_CH2 // OR UART6_RX
* CH5 : PC8 : TIM8_CH3
* CH6 : PC9 : TIM8_CH4
*
* OUTPUTS:
* M1 : PB0 : TIM3_CH3
* M2 : PB1 : TIM3_CH4
* M3 : PA3 : TIM2_CH3
* M4 : PA2 : TIM2_CH4
* M5 : PA1 : TIM5_CH2 // UART4_RX
* M6 : PA8 : TIM1_CH1 // USART2_TX
*/
#define GPIO_TIM3_CH3OUT GPIO_TIM3_CH3OUT_1 //PB0 S1_OUT D1_ST7
#define GPIO_TIM3_CH4OUT GPIO_TIM3_CH4OUT_1 //PB1 S2_OUT D1_ST2
#define GPIO_TIM2_CH4OUT GPIO_TIM2_CH4OUT_1 //PA3 S3_OUT D1_ST6
#define GPIO_TIM2_CH3OUT GPIO_TIM2_CH3OUT_1 //PA2 S4_OUT D1_ST1
#define DIRECT_PWM_OUTPUT_CHANNELS 4
#define GPIO_TIM3_CH3IN GPIO_TIM3_CH3IN_1
#define GPIO_TIM3_CH4IN GPIO_TIM3_CH4IN_1
#define GPIO_TIM2_CH4IN GPIO_TIM2_CH4IN_1
#define GPIO_TIM2_CH3IN GPIO_TIM2_CH3IN_1
#define DIRECT_INPUT_TIMER_CHANNELS 4
// Has pwm outputs
#define BOARD_HAS_PWM DIRECT_PWM_OUTPUT_CHANNELS
/* High-resolution timer */
#define HRT_TIMER 4 // T4C1
#define HRT_TIMER_CHANNEL 1 // use capture/compare channel 1
#define HRT_PPM_CHANNEL 3 // capture/compare channel 3
#define GPIO_PPM_IN (GPIO_ALT|GPIO_AF2|GPIO_PULLUP|GPIO_PORTB|GPIO_PIN8)
#define RC_SERIAL_PORT "/dev/ttyS0"
/*
* One RC_IN
*
* GPIO PPM_IN on PB8 T4CH3
* SPEKTRUM_RX (it's TX or RX in Bind) on PA10 UART1
* The FMU can drive GPIO PPM_IN as an output
*/
// TODO?
//#define GPIO_PPM_IN_AS_OUT (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_SET|GPIO_PORTC|GPIO_PIN6)
//#define SPEKTRUM_RX_AS_GPIO_OUTPUT() px4_arch_configgpio(GPIO_PPM_IN_AS_OUT)
//#define SPEKTRUM_RX_AS_UART() px4_arch_configgpio(GPIO_USART1_RX)
//#define SPEKTRUM_OUT(_one_true) px4_arch_gpiowrite(GPIO_PPM_IN_AS_OUT, (_one_true))
#define BOARD_NAME "OMNIBUS_F4SD"
#define BOARD_HAS_PWM DIRECT_PWM_OUTPUT_CHANNELS
#define BOARD_FMU_GPIO_TAB { \
{GPIO_GPIO0_INPUT, GPIO_GPIO0_OUTPUT, 0}, \
{GPIO_GPIO1_INPUT, GPIO_GPIO1_OUTPUT, 0}, \
{GPIO_GPIO2_INPUT, GPIO_GPIO2_OUTPUT, 0}, \
{GPIO_GPIO3_INPUT, GPIO_GPIO3_OUTPUT, 0}, }
/*
* PX4FMUv4 GPIO numbers.
*
* There are no alternate functions on this board.
*/
#define GPIO_SERVO_1 (1<<0) /**< servo 1 output */
#define GPIO_SERVO_2 (1<<1) /**< servo 2 output */
#define GPIO_SERVO_3 (1<<2) /**< servo 3 output */
#define GPIO_SERVO_4 (1<<3) /**< servo 4 output */
/* This board provides a DMA pool and APIs */
#define BOARD_DMA_ALLOC_POOL_SIZE 5120
#define BOARD_HAS_ON_RESET 1
__BEGIN_DECLS
/****************************************************************************************************
* Public Types
****************************************************************************************************/
/****************************************************************************************************
* Public data
****************************************************************************************************/
#ifndef __ASSEMBLY__
/****************************************************************************************************
* Public Functions
****************************************************************************************************/
/****************************************************************************************************
* Name: stm32_spiinitialize
*
* Description:
* Called to configure SPI chip select GPIO pins for the PX4FMU board.
*
* mask - is bus selection
* 1 - 1 << 0
* 2 - 1 << 1
*
****************************************************************************************************/
extern void stm32_spiinitialize(void);
void board_spi_reset(int ms);
/****************************************************************************************************
* Name: stm32_usbinitialize
*
* Description:
* Called to configure USB IO.
*
****************************************************************************************************/
extern void stm32_usbinitialize(void);
extern void board_peripheral_reset(int ms);
#include "../common/board_common.h"
#endif /* __ASSEMBLY__ */
__END_DECLS

View File

@ -0,0 +1,507 @@
/****************************************************************************
*
* Copyright (c) 2012-2018 PX4 Development Team. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name PX4 nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/**
* @file init.c
*
* omnibusf4sd-specific early startup code. This file implements the
* board_app_initialize() function that is called early by nsh during startup.
*
* Code here is run before the rcS script is invoked; it should start required
* subsystems and perform board-specific initialization.
*/
/****************************************************************************
* Included Files
****************************************************************************/
#include <px4_config.h>
#include <px4_tasks.h>
#include <stdbool.h>
#include <stdio.h>
#include <string.h>
#include <debug.h>
#include <errno.h>
#include "platform/cxxinitialize.h"
#include <nuttx/board.h>
#include <nuttx/spi/spi.h>
#include <nuttx/i2c/i2c_master.h>
#include <nuttx/mmcsd.h>
#include <nuttx/analog/adc.h>
#include <nuttx/mm/gran.h>
#include <stm32.h>
#include "board_config.h"
#include <stm32_uart.h>
#include <arch/board/board.h>
#include <drivers/drv_hrt.h>
#include <drivers/drv_board_led.h>
#include <systemlib/px4_macros.h>
#include <systemlib/cpuload.h>
#include <perf/perf_counter.h>
#include <systemlib/err.h>
#include <systemlib/hardfault_log.h>
#include <systemlib/systemlib.h>
#include <parameters/param.h>
/****************************************************************************
* Pre-Processor Definitions
****************************************************************************/
/* Configuration ************************************************************/
/* Debug ********************************************************************/
#ifdef CONFIG_CPP_HAVE_VARARGS
# ifdef CONFIG_DEBUG
# define message(...) syslog(__VA_ARGS__)
# else
# define message(...) printf(__VA_ARGS__)
# endif
#else
# ifdef CONFIG_DEBUG
# define message syslog
# else
# define message printf
# endif
#endif
/*
* Ideally we'd be able to get these from up_internal.h,
* but since we want to be able to disable the NuttX use
* of leds for system indication at will and there is no
* separate switch, we need to build independent of the
* CONFIG_ARCH_LEDS configuration switch.
*/
__BEGIN_DECLS
extern void led_init(void);
extern void led_on(int led);
extern void led_off(int led);
__END_DECLS
/****************************************************************************
* Protected Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/************************************************************************************
* Name: board_peripheral_reset
*
* Description:
*
************************************************************************************/
__EXPORT void board_peripheral_reset(int ms)
{
UNUSED(ms);
}
/************************************************************************************
* Name: board_on_reset
*
* Description:
* Optionally provided function called on entry to board_system_reset
* It should perform any house keeping prior to the rest.
*
* status - 1 if resetting to boot loader
* 0 if just resetting
*
************************************************************************************/
__EXPORT void board_on_reset(int status)
{
/* configure the GPIO pins to outputs and keep them low */
stm32_configgpio(GPIO_GPIO0_OUTPUT);
stm32_configgpio(GPIO_GPIO1_OUTPUT);
stm32_configgpio(GPIO_GPIO2_OUTPUT);
stm32_configgpio(GPIO_GPIO3_OUTPUT);
//stm32_configgpio(GPIO_GPIO4_OUTPUT);
//stm32_configgpio(GPIO_GPIO5_OUTPUT);
/* On resets invoked from system (not boot) insure we establish a low
* output state (discharge the pins) on PWM pins before they become inputs.
*/
if (status >= 0) {
up_mdelay(400);
}
}
/************************************************************************************
* Name: stm32_boardinitialize
*
* Description:
* All STM32 architectures must provide the following entry point. This entry point
* is called early in the initialization -- after all memory has been configured
* and mapped but before any devices have been initialized.
*
************************************************************************************/
__EXPORT void
stm32_boardinitialize(void)
{
/* Reset all PWM to Low outputs */
board_on_reset(-1);
/* configure LEDs */
board_autoled_initialize();
//TODO: ADCs
///* configure ADC pins */
//stm32_configgpio(GPIO_ADC1_IN2); /* BATT_VOLTAGE_SENS */
//stm32_configgpio(GPIO_ADC1_IN3); /* BATT_CURRENT_SENS */
//stm32_configgpio(GPIO_ADC1_IN4); /* VDD_5V_SENS */
//stm32_configgpio(GPIO_ADC1_IN11); /* RSSI analog in */
// TODO: power peripherals
///* configure power supply control/sense pins */
//stm32_configgpio(GPIO_PERIPH_3V3_EN);
//stm32_configgpio(GPIO_VDD_BRICK_VALID);
//stm32_configgpio(GPIO_VDD_USB_VALID);
// TODO: 3v3 Sensor?
///* Start with Sensor voltage off We will enable it
// * in board_app_initialize
// */
//stm32_configgpio(GPIO_VDD_3V3_SENSORS_EN);
// TODO: SBUS inversion? SPEK power?
//stm32_configgpio(GPIO_SBUS_INV);
//stm32_configgpio(GPIO_SPEKTRUM_PWR_EN);
// TODO: $$$ Unused?
//stm32_configgpio(GPIO_8266_GPIO0);
//stm32_configgpio(GPIO_8266_PD);
//stm32_configgpio(GPIO_8266_RST);
/* Safety - led don in led driver */
// TODO: unused?
//stm32_configgpio(GPIO_BTN_SAFETY);
// TODO: RSSI
//stm32_configgpio(GPIO_RSSI_IN);
stm32_configgpio(GPIO_PPM_IN);
/* configure SPI all interfaces GPIO */
stm32_spiinitialize();
}
/****************************************************************************
* Name: board_app_initialize
*
* Description:
* Perform application specific initialization. This function is never
* called directly from application code, but only indirectly via the
* (non-standard) boardctl() interface using the command BOARDIOC_INIT.
*
* Input Parameters:
* arg - The boardctl() argument is passed to the board_app_initialize()
* implementation without modification. The argument has no
* meaning to NuttX; the meaning of the argument is a contract
* between the board-specific initalization logic and the the
* matching application logic. The value cold be such things as a
* mode enumeration value, a set of DIP switch switch settings, a
* pointer to configuration data read from a file or serial FLASH,
* or whatever you would like to do with it. Every implementation
* should accept zero/NULL as a default configuration.
*
* Returned Value:
* Zero (OK) is returned on success; a negated errno value is returned on
* any failure to indicate the nature of the failure.
*
****************************************************************************/
static struct spi_dev_s *spi1;
static struct spi_dev_s *spi2;
static struct spi_dev_s *spi3;
__EXPORT int board_app_initialize(uintptr_t arg)
{
#if defined(CONFIG_HAVE_CXX) && defined(CONFIG_HAVE_CXXINITIALIZE)
/* run C++ ctors before we go any further */
up_cxxinitialize();
# if defined(CONFIG_EXAMPLES_NSH_CXXINITIALIZE)
# error CONFIG_EXAMPLES_NSH_CXXINITIALIZE Must not be defined! Use CONFIG_HAVE_CXX and CONFIG_HAVE_CXXINITIALIZE.
# endif
#else
# error platform is dependent on c++ both CONFIG_HAVE_CXX and CONFIG_HAVE_CXXINITIALIZE must be defined.
#endif
/* configure the high-resolution time/callout interface */
hrt_init();
param_init();
/* configure the DMA allocator */
if (board_dma_alloc_init() < 0) {
message("DMA alloc FAILED");
}
/* configure CPU load estimation */
#ifdef CONFIG_SCHED_INSTRUMENTATION
cpuload_initialize_once();
#endif
/* set up the serial DMA polling */
static struct hrt_call serial_dma_call;
struct timespec ts;
/*
* Poll at 1ms intervals for received bytes that have not triggered
* a DMA event.
*/
ts.tv_sec = 0;
ts.tv_nsec = 1000000;
hrt_call_every(&serial_dma_call,
ts_to_abstime(&ts),
ts_to_abstime(&ts),
(hrt_callout)stm32_serial_dma_poll,
NULL);
#if defined(CONFIG_STM32_BBSRAM)
/* NB. the use of the console requires the hrt running
* to poll the DMA
*/
/* Using Battery Backed Up SRAM */
int filesizes[CONFIG_STM32_BBSRAM_FILES + 1] = BSRAM_FILE_SIZES;
stm32_bbsraminitialize(BBSRAM_PATH, filesizes);
#if defined(CONFIG_STM32_SAVE_CRASHDUMP)
/* Panic Logging in Battery Backed Up Files */
/*
* In an ideal world, if a fault happens in flight the
* system save it to BBSRAM will then reboot. Upon
* rebooting, the system will log the fault to disk, recover
* the flight state and continue to fly. But if there is
* a fault on the bench or in the air that prohibit the recovery
* or committing the log to disk, the things are too broken to
* fly. So the question is:
*
* Did we have a hard fault and not make it far enough
* through the boot sequence to commit the fault data to
* the SD card?
*/
/* Do we have an uncommitted hard fault in BBSRAM?
* - this will be reset after a successful commit to SD
*/
int hadCrash = hardfault_check_status("boot");
if (hadCrash == OK) {
message("[boot] There is a hard fault logged. Hold down the SPACE BAR," \
" while booting to halt the system!\n");
/* Yes. So add one to the boot count - this will be reset after a successful
* commit to SD
*/
int reboots = hardfault_increment_reboot("boot", false);
/* Also end the misery for a user that holds for a key down on the console */
int bytesWaiting;
ioctl(fileno(stdin), FIONREAD, (unsigned long)((uintptr_t) &bytesWaiting));
if (reboots > 2 || bytesWaiting != 0) {
/* Since we can not commit the fault dump to disk. Display it
* to the console.
*/
hardfault_write("boot", fileno(stdout), HARDFAULT_DISPLAY_FORMAT, false);
message("[boot] There were %d reboots with Hard fault that were not committed to disk - System halted %s\n",
reboots,
(bytesWaiting == 0 ? "" : " Due to Key Press\n"));
/* For those of you with a debugger set a break point on up_assert and
* then set dbgContinue = 1 and go.
*/
/* Clear any key press that got us here */
static volatile bool dbgContinue = false;
int c = '>';
while (!dbgContinue) {
switch (c) {
case EOF:
case '\n':
case '\r':
case ' ':
continue;
default:
putchar(c);
putchar('\n');
switch (c) {
case 'D':
case 'd':
hardfault_write("boot", fileno(stdout), HARDFAULT_DISPLAY_FORMAT, false);
break;
case 'C':
case 'c':
hardfault_rearm("boot");
hardfault_increment_reboot("boot", true);
break;
case 'B':
case 'b':
dbgContinue = true;
break;
default:
break;
} // Inner Switch
message("\nEnter B - Continue booting\n" \
"Enter C - Clear the fault log\n" \
"Enter D - Dump fault log\n\n?>");
fflush(stdout);
if (!dbgContinue) {
c = getchar();
}
break;
} // outer switch
} // for
} // inner if
} // outer if
#endif // CONFIG_STM32_SAVE_CRASHDUMP
#endif // CONFIG_STM32_BBSRAM
/* initial LED state */
drv_led_start();
led_off(LED_BLUE);
/* Configure SPI-based devices */
// SPI1: MPU6000
spi1 = stm32_spibus_initialize(1);
if (!spi1) {
message("[boot] FAILED to initialize SPI port 1\n");
board_autoled_on(LED_RED);
return -ENODEV;
}
/* Default SPI1 to 1MHz and de-assert the known chip selects. */
SPI_SETFREQUENCY(spi1, 10000000);
SPI_SETBITS(spi1, 8);
SPI_SETMODE(spi1, SPIDEV_MODE3);
SPI_SELECT(spi1, PX4_SPIDEV_MPU, false);
up_udelay(20);
// SPI2: SDCard
/* Get the SPI port for the microSD slot */
spi2 = stm32_spibus_initialize(CONFIG_NSH_MMCSDSPIPORTNO);
if (!spi2) {
message("[boot] FAILED to initialize SPI port %d\n", CONFIG_NSH_MMCSDSPIPORTNO);
return -ENODEV;
}
/* Now bind the SPI interface to the MMCSD driver */
int result = mmcsd_spislotinitialize(CONFIG_NSH_MMCSDMINOR, CONFIG_NSH_MMCSDSLOTNO, spi2);
if (result != OK) {
message("[boot] FAILED to bind SPI port 2 to the MMCSD driver\n");
return -ENODEV;
}
up_udelay(20);
// SPI3: OSD / Baro
spi3 = stm32_spibus_initialize(3);
if (!spi3) {
message("[boot] FAILED to initialize SPI port 3\n");
board_autoled_on(LED_RED);
return -ENODEV;
}
/* Copied from fmu-v4
* Default SPI3 to 12MHz and de-assert the known chip selects.
* MS5611 has max SPI clock speed of 20MHz
*/
// BMP280 max SPI speed is 10 MHz
SPI_SETFREQUENCY(spi3, 10 * 1000 * 1000);
SPI_SETBITS(spi3, 8);
SPI_SETMODE(spi3, SPIDEV_MODE3);
SPI_SELECT(spi3, PX4_SPIDEV_BARO, false);
up_udelay(20);
return OK;
}

View File

@ -0,0 +1,125 @@
/****************************************************************************
*
* Copyright (c) 2018 PX4 Development Team. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name PX4 nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/**
* @file led.c
*
* omnibusf4sd LED backend.
*/
#include <px4_config.h>
#include <stdbool.h>
#include "stm32.h"
#include "board_config.h"
#include <nuttx/board.h>
/*
* Ideally we'd be able to get these from up_internal.h,
* but since we want to be able to disable the NuttX use
* of leds for system indication at will and there is no
* separate switch, we need to build independent of the
* CONFIG_ARCH_LEDS configuration switch.
*/
__BEGIN_DECLS
extern void led_init(void);
extern void led_on(int led);
extern void led_off(int led);
extern void led_toggle(int led);
__END_DECLS
static uint32_t g_ledmap[] = {
GPIO_LED_BLUE,
};
__EXPORT void led_init(void)
{
/* Configure LED GPIOs for output */
for (size_t l = 0; l < (sizeof(g_ledmap) / sizeof(g_ledmap[0])); l++) {
stm32_configgpio(g_ledmap[l]);
}
}
static void phy_set_led(int led, bool state)
{
/* Pull Down to switch on */
stm32_gpiowrite(g_ledmap[led], !state);
}
__EXPORT void led_on(int led)
{
phy_set_led(led, true);
}
__EXPORT void led_off(int led)
{
phy_set_led(led, false);
}
__EXPORT void board_autoled_initialize(void)
{
/* Configure LED1 GPIO for output */
stm32_configgpio(GPIO_LED1);
}
__EXPORT void board_autoled_on(int led)
{
if (led == 1) {
/* Pull down to switch on */
stm32_gpiowrite(GPIO_LED1, false);
}
}
__EXPORT void board_autoled_off(int led)
{
if (led == 1) {
/* Pull up to switch off */
stm32_gpiowrite(GPIO_LED1, true);
}
}
__EXPORT void led_toggle(int led)
{
if (led == 1) {
if (stm32_gpioread(GPIO_LED1)) {
stm32_gpiowrite(GPIO_LED1, false);
} else {
stm32_gpiowrite(GPIO_LED1, true);
}
}
}

View File

@ -0,0 +1,184 @@
/****************************************************************************
*
* Copyright (C) 2018 PX4 Development Team. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name PX4 nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/**
* @file spi.c
*
* Board-specific SPI functions.
*/
/************************************************************************************
* Included Files
************************************************************************************/
#include <px4_config.h>
#include <stdint.h>
#include <stdbool.h>
#include <debug.h>
#include <unistd.h>
#include <nuttx/spi/spi.h>
#include <arch/board/board.h>
#include <up_arch.h>
#include <chip.h>
#include <stm32.h>
#include "board_config.h"
#include <systemlib/err.h>
/************************************************************************************
* Public Functions
************************************************************************************/
/************************************************************************************
* Name: stm32_spiinitialize
*
* Description:
* Called to configure SPI chip select GPIO pins for the PX4FMU board.
* mask - is bus selection
* 1 - 1 << 0
* 2 - 1 << 1
*
************************************************************************************/
__EXPORT void stm32_spiinitialize()
{
stm32_configgpio(GPIO_SPI_CS_MEMS);
stm32_configgpio(GPIO_SPI_CS_SDCARD);
stm32_configgpio(GPIO_SPI3_CS_BARO);
}
__EXPORT void stm32_spi1select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
{
/* SPI select is active low, so write !selected to select the device */
UNUSED(devid);
px4_arch_gpiowrite(GPIO_SPI_CS_MEMS, !selected);
}
__EXPORT uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, uint32_t devid)
{
return SPI_STATUS_PRESENT;
}
__EXPORT void stm32_spi2select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
{
/* SPI select is active low, so write !selected to select the device */
UNUSED(devid);
px4_arch_gpiowrite(GPIO_SPI_CS_SDCARD, !selected);
}
__EXPORT uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, uint32_t devid)
{
return SPI_STATUS_PRESENT;
}
__EXPORT void stm32_spi3select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
{
UNUSED(devid);
/* SPI select is active low, so write !selected to select the device */
px4_arch_gpiowrite(GPIO_SPI3_CS_BARO, !selected);
}
__EXPORT uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, uint32_t devid)
{
/* FRAM is always present */
return SPI_STATUS_PRESENT;
}
__EXPORT void board_spi_reset(int ms)
{
// TODO: DRDY
///* disable SPI bus 1 DRDY */
//stm32_configgpio(GPIO_DRDY_OFF_PORTD_PIN15);
//stm32_configgpio(GPIO_DRDY_OFF_PORTC_PIN14);
//stm32_configgpio(GPIO_DRDY_OFF_PORTE_PIN12);
//stm32_gpiowrite(GPIO_DRDY_OFF_PORTD_PIN15, 0);
//stm32_gpiowrite(GPIO_DRDY_OFF_PORTC_PIN14, 0);
//stm32_gpiowrite(GPIO_DRDY_OFF_PORTE_PIN12, 0);
/* disable SPI bus 1 CS */
stm32_configgpio(GPIO_SPI1_CS_MEMS_OFF);
stm32_gpiowrite(GPIO_SPI1_CS_MEMS_OFF, 0);
/* disable SPI bus 2 CS */
stm32_configgpio(GPIO_SPI2_CS_SDCARD_OFF);
stm32_gpiowrite(GPIO_SPI2_CS_SDCARD_OFF, 0);
/* disable SPI bus 3 CS */
stm32_configgpio(GPIO_SPI3_CS_BARO_OFF);
stm32_gpiowrite(GPIO_SPI3_CS_BARO_OFF, 0);
/* disable SPI bus 1*/
stm32_configgpio(GPIO_SPI1_SCK_OFF);
stm32_configgpio(GPIO_SPI1_MISO_OFF);
stm32_configgpio(GPIO_SPI1_MOSI_OFF);
stm32_gpiowrite(GPIO_SPI1_SCK_OFF, 0);
stm32_gpiowrite(GPIO_SPI1_MISO_OFF, 0);
stm32_gpiowrite(GPIO_SPI1_MOSI_OFF, 0);
/* disable SPI bus 2*/
stm32_configgpio(GPIO_SPI2_SCK_OFF);
stm32_configgpio(GPIO_SPI2_MISO_OFF);
stm32_configgpio(GPIO_SPI2_MOSI_OFF);
stm32_gpiowrite(GPIO_SPI2_SCK_OFF, 0);
stm32_gpiowrite(GPIO_SPI2_MISO_OFF, 0);
stm32_gpiowrite(GPIO_SPI2_MOSI_OFF, 0);
/* disable SPI bus 3*/
stm32_configgpio(GPIO_SPI3_SCK_OFF);
stm32_configgpio(GPIO_SPI3_MISO_OFF);
stm32_configgpio(GPIO_SPI3_MOSI_OFF);
stm32_gpiowrite(GPIO_SPI3_SCK_OFF, 0);
stm32_gpiowrite(GPIO_SPI3_MISO_OFF, 0);
stm32_gpiowrite(GPIO_SPI3_MOSI_OFF, 0);
/* wait a bit before starting SPI, different times didn't influence results */
usleep(100);
stm32_spiinitialize();
stm32_configgpio(GPIO_SPI1_SCK);
stm32_configgpio(GPIO_SPI1_MISO);
stm32_configgpio(GPIO_SPI1_MOSI);
// TODO: why do we not enable SPI2 here?
stm32_configgpio(GPIO_SPI3_SCK);
stm32_configgpio(GPIO_SPI3_MISO);
stm32_configgpio(GPIO_SPI3_MOSI);
}

View File

@ -0,0 +1,120 @@
/****************************************************************************
*
* Copyright (C) 2018 PX4 Development Team. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name PX4 nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/*
* @file timer_config.c
*
* Configuration data for the stm32 pwm_servo, input capture and pwm input driver.
*
* Note that these arrays must always be fully-sized.
*/
#include <stdint.h>
#include <stm32.h>
#include <stm32_gpio.h>
#include <stm32_tim.h>
#include <drivers/drv_pwm_output.h>
#include <drivers/stm32/drv_io_timer.h>
#include "board_config.h"
__EXPORT const io_timers_t io_timers[MAX_IO_TIMERS] = {
{
.base = STM32_TIM2_BASE,
.clock_register = STM32_RCC_APB1ENR,
.clock_bit = RCC_APB1ENR_TIM2EN,
.clock_freq = STM32_APB1_TIM2_CLKIN,
.first_channel_index = 0,
.last_channel_index = 1,
.handler = io_timer_handler1,
.vectorno = STM32_IRQ_TIM2
},
{
.base = STM32_TIM3_BASE,
.clock_register = STM32_RCC_APB1ENR,
.clock_bit = RCC_APB1ENR_TIM3EN,
.clock_freq = STM32_APB1_TIM3_CLKIN,
.first_channel_index = 2,
.last_channel_index = 3,
.handler = io_timer_handler2,
.vectorno = STM32_IRQ_TIM3
}
};
/*
* OUTPUTS:
* M3 : PA3 : TIM2_CH3
* M4 : PA2 : TIM2_CH4
* M1 : PB0 : TIM3_CH3
* M2 : PB1 : TIM3_CH4
*/
__EXPORT const timer_io_channels_t timer_io_channels[MAX_TIMER_IO_CHANNELS] = {
//PB0 S1_OUT D1_ST7
{
.gpio_out = GPIO_TIM3_CH3OUT,
.gpio_in = GPIO_TIM3_CH3IN,
.timer_index = 1,
.timer_channel = 3,
.ccr_offset = STM32_GTIM_CCR3_OFFSET,
.masks = GTIM_SR_CC3IF | GTIM_SR_CC3OF
},
//PB1 S2_OUT D1_ST2
{
.gpio_out = GPIO_TIM3_CH4OUT,
.gpio_in = GPIO_TIM3_CH4IN,
.timer_index = 1,
.timer_channel = 4,
.ccr_offset = STM32_GTIM_CCR4_OFFSET,
.masks = GTIM_SR_CC4IF | GTIM_SR_CC4OF
},
//PA3 S3_OUT D1_ST6
{
.gpio_out = GPIO_TIM2_CH4OUT,
.gpio_in = GPIO_TIM2_CH4IN,
.timer_index = 0,
.timer_channel = 4,
.ccr_offset = STM32_GTIM_CCR4_OFFSET,
.masks = GTIM_SR_CC4IF | GTIM_SR_CC4OF
},
//PA2 S4_OUT D1_ST1
{
.gpio_out = GPIO_TIM2_CH3OUT,
.gpio_in = GPIO_TIM2_CH3IN,
.timer_index = 0,
.timer_channel = 3,
.ccr_offset = STM32_GTIM_CCR3_OFFSET,
.masks = GTIM_SR_CC3IF | GTIM_SR_CC3OF
}
};

View File

@ -0,0 +1,108 @@
/****************************************************************************
*
* Copyright (C) 2018 PX4 Development Team. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name PX4 nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/**
* @file usb.c
*
* Board-specific USB functions.
*/
/************************************************************************************
* Included Files
************************************************************************************/
#include <px4_config.h>
#include <sys/types.h>
#include <stdint.h>
#include <stdbool.h>
#include <debug.h>
#include <nuttx/usb/usbdev.h>
#include <nuttx/usb/usbdev_trace.h>
#include <up_arch.h>
#include <stm32.h>
#include "board_config.h"
/************************************************************************************
* Definitions
************************************************************************************/
/************************************************************************************
* Private Functions
************************************************************************************/
/************************************************************************************
* Public Functions
************************************************************************************/
/************************************************************************************
* Name: stm32_usbinitialize
*
* Description:
* Called to setup USB-related GPIO pins for the omnibusf4sd board.
*
************************************************************************************/
__EXPORT void stm32_usbinitialize(void)
{
/* The OTG FS has an internal soft pull-up */
/* Configure the OTG FS VBUS sensing GPIO, Power On, and Overcurrent GPIOs */
#ifdef CONFIG_STM32_OTGFS
stm32_configgpio(GPIO_OTGFS_VBUS);
/* XXX We only support device mode
stm32_configgpio(GPIO_OTGFS_PWRON);
stm32_configgpio(GPIO_OTGFS_OVER);
*/
#endif
}
/************************************************************************************
* Name: stm32_usbsuspend
*
* Description:
* Board logic must provide the stm32_usbsuspend logic if the USBDEV driver is
* used. This function is called whenever the USB enters or leaves suspend mode.
* This is an opportunity for the board logic to shutdown clocks, power, etc.
* while the USB is suspended.
*
************************************************************************************/
__EXPORT void stm32_usbsuspend(FAR struct usbdev_s *dev, bool resume)
{
uinfo("resume: %d\n", resume);
}

View File

@ -1144,7 +1144,9 @@ void PX4FMU::set_rc_scan_state(RC_SCAN newState)
void PX4FMU::rc_io_invert(bool invert) void PX4FMU::rc_io_invert(bool invert)
{ {
#ifdef INVERT_RC_INPUT
INVERT_RC_INPUT(invert); INVERT_RC_INPUT(invert);
#endif
} }
#endif #endif