Add scripts for debugging with openocd

Note: We now use the version of stm32f4x that comes with openocd 0.7.0 or later
This commit is contained in:
Kevin Hester 2013-08-11 11:34:19 -10:00 committed by Lorenz Meier
parent 2bcf4385f6
commit f665ace38c
5 changed files with 36 additions and 64 deletions

View File

@ -0,0 +1,22 @@
# program a bootable device load on a mavstation
# To run type openocd -f mavprogram.cfg
source [find interface/olimex-arm-usb-ocd-h.cfg]
source [find px4fmu-v1-board.cfg]
init
halt
# Find the flash inside this CPU
flash probe 0
# erase it (128 pages) then program and exit
#flash erase_sector 0 0 127
# stm32f1x mass_erase 0
# It seems that Pat's image has a start address offset of 0x1000 but the vectors need to be at zero, so fixbin.sh moves things around
#flash write_bank 0 fixed.bin 0
#flash write_image firmware.elf
#shutdown

7
Debug/openocd.gdbinit Normal file
View File

@ -0,0 +1,7 @@
target remote :3333
mon reset halt
mon poll
mon cortex_m maskisr auto
set mem inaccessible-by-default off
set print pretty
source Debug/PX4

View File

@ -0,0 +1,6 @@
# The latest defaults in OpenOCD 0.7.0 are actually prettymuch correct for the px4fmu
# increase working area to 32KB for faster flash programming
set WORKAREASIZE 0x8000
source [find target/stm32f4x.cfg]

1
Debug/runopenocd.sh Executable file
View File

@ -0,0 +1 @@
openocd -f interface/olimex-arm-usb-ocd-h.cfg -f Debug/stm32f4x.cfg

View File

@ -1,64 +0,0 @@
# script for stm32f2xxx
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
set _CHIPNAME stm32f4xxx
}
if { [info exists ENDIAN] } {
set _ENDIAN $ENDIAN
} else {
set _ENDIAN little
}
# Work-area is a space in RAM used for flash programming
# By default use 64kB
if { [info exists WORKAREASIZE] } {
set _WORKAREASIZE $WORKAREASIZE
} else {
set _WORKAREASIZE 0x10000
}
# JTAG speed should be <= F_CPU/6. F_CPU after reset is 8MHz, so use F_JTAG = 1MHz
#
# Since we may be running of an RC oscilator, we crank down the speed a
# bit more to be on the safe side. Perhaps superstition, but if are
# running off a crystal, we can run closer to the limit. Note
# that there can be a pretty wide band where things are more or less stable.
jtag_khz 1000
jtag_nsrst_delay 100
jtag_ntrst_delay 100
#jtag scan chain
if { [info exists CPUTAPID ] } {
set _CPUTAPID $CPUTAPID
} else {
# See STM Document RM0033
# Section 32.6.3 - corresponds to Cortex-M3 r2p0
set _CPUTAPID 0x4ba00477
}
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
if { [info exists BSTAPID ] } {
set _BSTAPID $BSTAPID
} else {
# See STM Document RM0033
# Section 32.6.2
#
set _BSTAPID 0x06413041
}
jtag newtap $_CHIPNAME bs -irlen 5 -expected-id $_BSTAPID
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME cortex_m3 -endian $_ENDIAN -chain-position $_TARGETNAME -rtos auto
$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME stm32f2x 0 0 0 0 $_TARGETNAME
# if srst is not fitted use SYSRESETREQ to
# perform a soft reset
cortex_m3 reset_config sysresetreq