forked from Archive/PX4-Autopilot
Fix the nxlines configuration for the zp214xpa board
git-svn-id: http://svn.code.sf.net/p/nuttx/code/trunk@5467 42af7a65-404d-4744-a932-0658087f49c3
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e1eacb2254
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@ -191,6 +191,7 @@ static inline int nxlines_initialize(void)
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g_nxlines.code = NXEXIT_NXOPEN;
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return ERROR;
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}
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return OK;
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}
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@ -3843,6 +3843,6 @@
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* configs/sim/nxlines: Add an nxlines configuration for the
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simulator.
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* configs/zp214xpa/nxlines: Add an nxlines configuration for the
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ZP213x/4xPA (with the LPC2148 and the UG_2864AMBAG01). As of this
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writing (2012-12-30), I see only garbage on the display each time
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the display is updated.
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ZP213x/4xPA (with the LPC2148 and the UG_2864AMBAG01). Working
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as of 2012-12-30.
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@ -85,20 +85,16 @@
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* Definitions
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****************************************************************************/
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/* Enables debug output from this file (needs CONFIG_DEBUG too) */
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/* Enables debug output from this file */
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#undef SPI_DEBUG /* Define to enable debug */
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#undef SPI_VERBOSE /* Define to enable verbose debug */
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#ifdef SPI_DEBUG
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#ifdef CONFIG_DEBUG_SPI
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# define spidbg lldbg
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# ifdef SPI_VERBOSE
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# ifdef CONFIG_DEBUG_VERBOSE
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# define spivdbg lldbg
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# else
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# define spivdbg(x...)
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# endif
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#else
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# undef SPI_VERBOSE
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# define spidbg(x...)
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# define spivdbg(x...)
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#endif
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@ -125,17 +121,17 @@
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****************************************************************************/
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#ifndef CONFIG_SPI_OWNBUS
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static int spi_lock(FAR struct spi_dev_s *dev, bool lock);
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static int spi_lock(FAR struct spi_dev_s *dev, bool lock);
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#endif
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static void spi_select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected);
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static void spi_select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected);
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static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency);
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static uint8_t spi_status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
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static uint8_t spi_status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
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#ifdef CONFIG_SPI_CMDDATA
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static int spi_cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
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static int spi_cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
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#endif
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static uint16_t spi_send(FAR struct spi_dev_s *dev, uint16_t ch);
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static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer, size_t nwords);
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static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer, size_t nwords);
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static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer, size_t nwords);
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static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer, size_t nwords);
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/****************************************************************************
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* Private Data
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@ -224,14 +220,14 @@ static void spi_select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool sel
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{
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/* Enable slave select (low enables) */
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spidbg("CD asserted\n");
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spidbg("CS asserted\n");
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putreg32(bit, CS_CLR_REGISTER);
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}
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else
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{
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/* Disable slave select (low enables) */
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spidbg("CD de-asserted\n");
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spidbg("CS de-asserted\n");
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putreg32(bit, CS_SET_REGISTER);
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/* Wait for the TX FIFO not full indication */
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@ -338,3 +338,5 @@ Configurations:
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CONFIG_HOST_LINUX=y : Linux (Cygwin under Windows okay too).
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CONFIG_ARM_TOOLCHAIN_GNU_EABI=y : Buildroot (arm-nuttx-elf-gcc)
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CONFIG_RAW_BINARY=y : Output formats: ELF and raw binary
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3. Verified as of this writing (2012-12-30).
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@ -86,20 +86,16 @@
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* Definitions
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****************************************************************************/
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/* Enables debug output from this file (needs CONFIG_DEBUG too) */
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/* Enables debug output from this file */
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#undef SPI_DEBUG /* Define to enable debug */
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#undef SPI_VERBOSE /* Define to enable verbose debug */
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#ifdef SPI_DEBUG
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#ifdef CONFIG_DEBUG_SPI
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# define spidbg lldbg
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# ifdef SPI_VERBOSE
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# ifdef CONFIG_DEBUG_VERBOSE
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# define spivdbg lldbg
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# else
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# define spivdbg(x...)
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# endif
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#else
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# undef SPI_VERBOSE
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# define spidbg(x...)
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# define spivdbg(x...)
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#endif
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@ -112,10 +108,12 @@
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/* Use either FIO or legacy GPIO */
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#ifdef CONFIG_LPC214x_FIO
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# define CS_PIN_REGISTER (LPC214X_FIO0_BASE+LPC214X_FIO_PIN_OFFSET)
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# define CS_SET_REGISTER (LPC214X_FIO0_BASE+LPC214X_FIO_SET_OFFSET)
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# define CS_CLR_REGISTER (LPC214X_FIO0_BASE+LPC214X_FIO_CLR_OFFSET)
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# define CS_DIR_REGISTER (LPC214X_FIO0_BASE+LPC214X_FIO_DIR_OFFSET)
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#else
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# define CS_PIN_REGISTER (LPC214X_GPIO0_BASE+LPC214X_GPIO_PIN_OFFSET)
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# define CS_SET_REGISTER (LPC214X_GPIO0_BASE+LPC214X_GPIO_SET_OFFSET)
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# define CS_CLR_REGISTER (LPC214X_GPIO0_BASE+LPC214X_GPIO_CLR_OFFSET)
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# define CS_DIR_REGISTER (LPC214X_GPIO0_BASE+LPC214X_GPIO_DIR_OFFSET)
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@ -130,7 +128,7 @@ static int spi_lock(FAR struct spi_dev_s *dev, bool lock);
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#endif
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static void spi_select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected);
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static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency);
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static uint8_t spi_status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
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static uint8_t spi_status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
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#ifdef CONFIG_SPI_CMDDATA
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static int spi_cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
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#endif
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@ -193,7 +191,7 @@ static struct spi_dev_s g_spidev = { &g_spiops };
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#ifndef CONFIG_SPI_OWNBUS
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static int spi_lock(FAR struct spi_dev_s *dev, bool lock)
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{
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/* Not implemented */
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/* Not implemented -- the UG_2864AMBAG01 is the only device on SPI1 */
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return -ENOSYS;
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}
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@ -219,25 +217,32 @@ static int spi_lock(FAR struct spi_dev_s *dev, bool lock)
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static void spi_select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
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{
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#ifdef CONFIG_DEBUG_SPI
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uint32_t regval;
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#endif
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uint32_t bit = 1 << 20;
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/* We do not bother to check if devid == SPIDEV_DISPLAY because that is the
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* only thing on the bus.
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*/
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#ifdef CONFIG_DEBUG_SPI
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regval = getreg32(CS_PIN_REGISTER);
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#endif
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if (selected)
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{
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/* Enable slave select (low enables) */
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spidbg("CD asserted\n");
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putreg32(bit, CS_CLR_REGISTER);
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spidbg("CS asserted: %08x->%08x\n", regval, getreg32(CS_PIN_REGISTER));
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}
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else
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{
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/* Disable slave select (low enables) */
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spidbg("CD de-asserted\n");
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putreg32(bit, CS_SET_REGISTER);
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spidbg("CS de-asserted: %08x->%08x\n", regval, getreg32(CS_PIN_REGISTER));
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/* Wait for the TX FIFO not full indication */
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@ -345,6 +350,9 @@ static uint8_t spi_status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
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#ifdef CONFIG_SPI_CMDDATA
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static int spi_cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd)
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{
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#ifdef CONFIG_DEBUG_SPI
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uint32_t regval;
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#endif
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uint32_t bit = 1 << 23;
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/* We do not bother to check if devid == SPIDEV_DISPLAY because that is the
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@ -358,19 +366,23 @@ static int spi_cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd
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* A0 = L: the inputs at D0 to D7 are transferred to the command registers."
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*/
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#ifdef CONFIG_DEBUG_SPI
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regval = getreg32(CS_PIN_REGISTER);
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#endif
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if (cmd)
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{
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/* L: the inputs at D0 to D7 are transferred to the command registers */
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spidbg("Command\n");
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putreg32(bit, CS_CLR_REGISTER);
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spidbg("Command: %08x->%08x\n", regval, getreg32(CS_PIN_REGISTER));
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}
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else
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{
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/* H: the inputs at D0 to D7 are treated as display data. */
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spidbg("CD de-asserted\n");
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putreg32(bit, CS_SET_REGISTER);
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spidbg("Data: %08x->%08x\n", regval, getreg32(CS_PIN_REGISTER));
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}
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return OK;
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@ -606,11 +618,15 @@ FAR struct spi_dev_s *up_spiinitialize(int port)
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* for commands (also low)
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*/
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regval32 = (1 << 20) || (1 << 23);
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regval32 = (1 << 20) | (1 << 23);
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putreg32(regval32, CS_SET_REGISTER);
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regval32 |= getreg32(CS_DIR_REGISTER);
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putreg32(regval32, CS_DIR_REGISTER);
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spidbg("CS Pin Config: PINSEL1: %08x PIN: %08x DIR: %08x\n",
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getreg32(LPC214X_PINSEL1), getreg32(CS_PIN_REGISTER),
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getreg32(CS_DIR_REGISTER));
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/* Enable peripheral clocking to SPI1 */
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regval32 = getreg32(LPC214X_PCON_PCONP);
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@ -85,13 +85,15 @@
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/* Use either FIO or legacy GPIO */
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#ifdef CONFIG_LPC214x_FIO
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# define CS_SET_REGISTER (LPC214X_FIO0_BASE+LPC214X_FIO_SET_OFFSET)
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# define CS_CLR_REGISTER (LPC214X_FIO0_BASE+LPC214X_FIO_CLR_OFFSET)
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# define CS_DIR_REGISTER (LPC214X_FIO0_BASE+LPC214X_FIO_DIR_OFFSET)
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# define RESET_PIN_REGISTER (LPC214X_FIO0_BASE+LPC214X_FIO_PIN_OFFSET)
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# define RESET_SET_REGISTER (LPC214X_FIO0_BASE+LPC214X_FIO_SET_OFFSET)
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# define RESET_CLR_REGISTER (LPC214X_FIO0_BASE+LPC214X_FIO_CLR_OFFSET)
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# define RESET_DIR_REGISTER (LPC214X_FIO0_BASE+LPC214X_FIO_DIR_OFFSET)
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#else
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# define CS_SET_REGISTER (LPC214X_GPIO0_BASE+LPC214X_GPIO_SET_OFFSET)
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# define CS_CLR_REGISTER (LPC214X_GPIO0_BASE+LPC214X_GPIO_CLR_OFFSET)
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# define CS_DIR_REGISTER (LPC214X_GPIO0_BASE+LPC214X_GPIO_DIR_OFFSET)
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# define RESET_PIN_REGISTER (LPC214X_GPIO0_BASE+LPC214X_GPIO_PIN_OFFSET)
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# define RESET_SET_REGISTER (LPC214X_GPIO0_BASE+LPC214X_GPIO_SET_OFFSET)
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# define RESET_CLR_REGISTER (LPC214X_GPIO0_BASE+LPC214X_GPIO_CLR_OFFSET)
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# define RESET_DIR_REGISTER (LPC214X_GPIO0_BASE+LPC214X_GPIO_DIR_OFFSET)
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#endif
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/* Debug ********************************************************************/
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@ -136,14 +138,21 @@ FAR struct lcd_dev_s *up_nxdrvinit(unsigned int devno)
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/* Set the RESET line low, putting the OLED into the reset state. */
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bits32 = (1 << 18);
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putreg32(bits32, CS_CLR_REGISTER);
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regval32 = getreg32(CS_DIR_REGISTER);
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putreg32(regval32 | bits32, CS_DIR_REGISTER);
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putreg32(bits32, RESET_CLR_REGISTER);
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regval32 = getreg32(RESET_DIR_REGISTER);
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putreg32(regval32 | bits32, RESET_DIR_REGISTER);
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lcdvdbg("RESET Pin Config: PINSEL1: %08x PIN: %08x DIR: %08x\n",
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getreg32(LPC214X_PINSEL1), getreg32(RESET_PIN_REGISTER),
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getreg32(RESET_DIR_REGISTER));
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/* Wait a bit then release the OLED from the reset state */
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up_mdelay(20);
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putreg32(bits32, CS_SET_REGISTER);
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putreg32(bits32, RESET_SET_REGISTER);
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lcdvdbg("RESET release: PIN: %08x DIR: %08x\n",
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getreg32(RESET_PIN_REGISTER), getreg32(RESET_DIR_REGISTER));
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/* Get the SPI1 port interface */
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@ -1148,8 +1148,8 @@ void ug2864ambag01_fill(FAR struct lcd_dev_s *dev, uint8_t color)
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/* Transfer one page of the selected color */
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(void)SPI_SNDBLOCK(priv->spi, &priv->fb[page * UG2864AMBAG01_XRES],
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UG2864AMBAG01_XRES);
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(void)SPI_SNDBLOCK(priv->spi, &priv->fb[page * UG2864AMBAG01_XRES],
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UG2864AMBAG01_XRES);
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}
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/* De-select and unlock the device */
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