forked from Archive/PX4-Autopilot
Some repartitioning of STM32 functionality to better support a USB host driver
git-svn-id: https://nuttx.svn.sourceforge.net/svnroot/nuttx/trunk@5028 7fd9a85b-ad96-42d3-883c-3090e2eb8679
This commit is contained in:
parent
3cc812dbad
commit
dd681d7fff
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@ -76,6 +76,12 @@ CMN_CSRCS += stm32_otgfsdev.c
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endif
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endif
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endif
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endif
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ifeq ($(CONFIG_USBHOST),y)
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ifeq ($(CONFIG_STM32_OTGFS),y)
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CMN_CSRCS += stm32_otgfshost.c
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endif
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endif
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ifeq ($(CONFIG_ARMV7M_CMNVECTOR),y)
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ifeq ($(CONFIG_ARMV7M_CMNVECTOR),y)
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CHIP_ASRCS += stm32_vectors.S
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CHIP_ASRCS += stm32_vectors.S
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endif
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endif
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@ -1,5 +1,5 @@
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/*******************************************************************************
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/*******************************************************************************
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* arch/arm/src/stm32/stm32_usbhost.c
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* arch/arm/src/stm32/stm32_otgfshost.c
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*
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*
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* Copyright (C) 2012 Gregory Nutt. All rights reserved.
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* Copyright (C) 2012 Gregory Nutt. All rights reserved.
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* Authors: Gregory Nutt <gnutt@nuttx.org>
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* Authors: Gregory Nutt <gnutt@nuttx.org>
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@ -47,6 +47,8 @@
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#include "chip.h"
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#include "chip.h"
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#include "chip/stm32_otgfs.h"
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#include "chip/stm32_otgfs.h"
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#if defined(CONFIG_STM32_OTGFS) && defined(CONFIG_USBHOST)
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/************************************************************************************
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/************************************************************************************
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* Public Functions
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* Public Functions
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************************************************************************************/
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************************************************************************************/
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@ -61,11 +63,40 @@ extern "C" {
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#define EXTERN extern
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#define EXTERN extern
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#endif
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#endif
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/***********************************************************************************
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* Name: stm32_usbhost_vbusdrive
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*
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* Description:
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* Enable/disable driving of VBUS 5V output. This function must be provided be
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* each platform that implements the STM32 OTG FS host interface
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*
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* "On-chip 5 V VBUS generation is not supported. For this reason, a charge pump
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* or, if 5 V are available on the application board, a basic power switch, must
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* be added externally to drive the 5 V VBUS line. The external charge pump can
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* be driven by any GPIO output. When the application decides to power on VBUS
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* using the chosen GPIO, it must also set the port power bit in the host port
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* control and status register (PPWR bit in OTG_FS_HPRT).
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*
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* "The application uses this field to control power to this port, and the core
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* clears this bit on an overcurrent condition."
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*
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* Input Parameters:
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* iface - For future growth to handle multiple USB host interface. Should be zero.
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* enable - true: enable VBUS power; false: disable VBUS power
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*
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* Returned Value:
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* None
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*
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***********************************************************************************/
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EXTERN void stm32_usbhost_vbusdrive(int iface, bool enable);
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#undef EXTERN
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#undef EXTERN
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#if defined(__cplusplus)
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#if defined(__cplusplus)
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}
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}
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#endif
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#endif
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#endif /* __ASSEMBLY__ */
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#endif /* __ASSEMBLY__ */
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#endif /* CONFIG_STM32_OTGFS && CONFIG_USBHOST */
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#endif /* __ARCH_ARM_SRC_STM32_STM32_USBHOST_H */
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#endif /* __ARCH_ARM_SRC_STM32_STM32_USBHOST_H */
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@ -616,7 +616,7 @@ static void stm32_stdclockconfig(void)
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/* Set the PLL dividers and multiplers to configure the main PLL */
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/* Set the PLL dividers and multiplers to configure the main PLL */
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regval = (STM32_PLLCFG_PLLM | STM32_PLLCFG_PLLN |STM32_PLLCFG_PLLP |
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regval = (STM32_PLLCFG_PLLM | STM32_PLLCFG_PLLN |STM32_PLLCFG_PLLP |
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RCC_PLLCFG_PLLSRC_HSE | STM32_PLLCFG_PPQ);
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RCC_PLLCFG_PLLSRC_HSE | STM32_PLLCFG_PLLQ);
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putreg32(regval, STM32_RCC_PLLCFG);
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putreg32(regval, STM32_RCC_PLLCFG);
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/* Enable the main PLL */
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/* Enable the main PLL */
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@ -618,7 +618,7 @@ static void stm32_stdclockconfig(void)
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/* Set the PLL dividers and multiplers to configure the main PLL */
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/* Set the PLL dividers and multiplers to configure the main PLL */
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regval = (STM32_PLLCFG_PLLM | STM32_PLLCFG_PLLN |STM32_PLLCFG_PLLP |
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regval = (STM32_PLLCFG_PLLM | STM32_PLLCFG_PLLN |STM32_PLLCFG_PLLP |
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RCC_PLLCFG_PLLSRC_HSE | STM32_PLLCFG_PPQ);
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RCC_PLLCFG_PLLSRC_HSE | STM32_PLLCFG_PLLQ);
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putreg32(regval, STM32_RCC_PLLCFG);
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putreg32(regval, STM32_RCC_PLLCFG);
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/* Enable the main PLL */
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/* Enable the main PLL */
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@ -77,7 +77,7 @@
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* PLLM : 25 (STM32_PLLCFG_PLLM)
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* PLLM : 25 (STM32_PLLCFG_PLLM)
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* PLLN : 240 (STM32_PLLCFG_PLLN)
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* PLLN : 240 (STM32_PLLCFG_PLLN)
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* PLLP : 2 (STM32_PLLCFG_PLLP)
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* PLLP : 2 (STM32_PLLCFG_PLLP)
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* PLLQ : 5 (STM32_PLLCFG_PPQ)
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* PLLQ : 5 (STM32_PLLCFG_PLLQ)
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* Main regulator output voltage : Scale1 mode Needed for high speed SYSCLK
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* Main regulator output voltage : Scale1 mode Needed for high speed SYSCLK
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* Flash Latency(WS) : 5
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* Flash Latency(WS) : 5
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* Prefetch Buffer : OFF
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* Prefetch Buffer : OFF
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@ -117,7 +117,7 @@
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#define STM32_PLLCFG_PLLM RCC_PLLCFG_PLLM(25)
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#define STM32_PLLCFG_PLLM RCC_PLLCFG_PLLM(25)
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#define STM32_PLLCFG_PLLN RCC_PLLCFG_PLLN(240)
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#define STM32_PLLCFG_PLLN RCC_PLLCFG_PLLN(240)
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#define STM32_PLLCFG_PLLP RCC_PLLCFG_PLLP_2
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#define STM32_PLLCFG_PLLP RCC_PLLCFG_PLLP_2
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#define STM32_PLLCFG_PPQ RCC_PLLCFG_PLLQ(5)
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#define STM32_PLLCFG_PLLQ RCC_PLLCFG_PLLQ(5)
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#define STM32_SYSCLK_FREQUENCY 120000000ul
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#define STM32_SYSCLK_FREQUENCY 120000000ul
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@ -56,8 +56,8 @@ ifeq ($(CONFIG_ARCH_BUTTONS),y)
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CSRCS += up_buttons.c
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CSRCS += up_buttons.c
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endif
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endif
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ifeq ($(CONFIG_USBDEV),y)
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ifeq ($(CONFIG_STM32_OTGFS),y)
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CSRCS += up_usbdev.c
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CSRCS += up_usb.c
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endif
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endif
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ifeq ($(CONFIG_STM32_FSMC),y)
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ifeq ($(CONFIG_STM32_FSMC),y)
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@ -135,8 +135,13 @@
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*/
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*/
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#define GPIO_OTGFS_VBUS (GPIO_INPUT|GPIO_FLOAT|GPIO_SPEED_100MHz|GPIO_OPENDRAIN|GPIO_PORTA|GPIO_PIN9)
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#define GPIO_OTGFS_VBUS (GPIO_INPUT|GPIO_FLOAT|GPIO_SPEED_100MHz|GPIO_OPENDRAIN|GPIO_PORTA|GPIO_PIN9)
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#define GPIO_OTGFS_PWRON (GPIO_OUTPUT|GPIO_FLOAT|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTH|GPIO_PIN5)
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#define GPIO_OTGFS_PWRON (GPIO_OUTPUT|GPIO_FLOAT|GPIO_OUTPUT_SET|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTH|GPIO_PIN5)
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#ifdef CONFIG_USBHOST
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# define GPIO_OTGFS_OVER (GPIO_INPUT|GPIO_EXTI|GPIO_FLOAT|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTF|GPIO_PIN11)
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#else
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# define GPIO_OTGFS_OVER (GPIO_INPUT|GPIO_FLOAT|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTF|GPIO_PIN11)
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# define GPIO_OTGFS_OVER (GPIO_INPUT|GPIO_FLOAT|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTF|GPIO_PIN11)
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#endif
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/* The STM3220G-EVAL has two STMPE811QTR I/O expanders on board both connected
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/* The STM3220G-EVAL has two STMPE811QTR I/O expanders on board both connected
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* to the STM32 via I2C1. They share a common interrupt line: PI2.
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* to the STM32 via I2C1. They share a common interrupt line: PI2.
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void weak_function stm32_spiinitialize(void);
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void weak_function stm32_spiinitialize(void);
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/************************************************************************************
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/****************************************************************************************************
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* Name: stm32_usbinitialize
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* Name: stm32_usbinitialize
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*
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*
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* Description:
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* Description:
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* Called to setup USB-related GPIO pins for the STM3210E-EVAL board.
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* Called from stm32_usbinitialize very early in inialization to setup USB-related GPIO pins for
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* the STM3220G-EVAL board.
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*
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*
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************************************************************************************/
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****************************************************************************************************/
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#ifdef CONFIG_STM32_OTGFS
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void weak_function stm32_usbinitialize(void);
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void weak_function stm32_usbinitialize(void);
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#endif
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/************************************************************************************
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/****************************************************************************************************
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* Name: stm32_usbhost_initialize
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*
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* Description:
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* Called at application startup time to initialize the USB host functionality. This function will
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* start a thread that will monitor for device connection/disconnection events.
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*
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****************************************************************************************************/
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#if defined(CONFIG_STM32_OTGFS) && defined(CONFIG_USBHOST)
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void stm32_usbhost_initialize(void);
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#endif
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/****************************************************************************************************
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* Name: stm32_extmemgpios
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* Name: stm32_extmemgpios
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*
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*
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* Description:
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* Description:
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* Initialize GPIOs for external memory usage
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* Initialize GPIOs for external memory usage
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*
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*
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************************************************************************************/
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****************************************************************************************************/
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#ifdef CONFIG_STM32_FSMC
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#ifdef CONFIG_STM32_FSMC
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void stm32_extmemgpios(const uint32_t *gpios, int ngpios);
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void stm32_extmemgpios(const uint32_t *gpios, int ngpios);
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#endif
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#endif
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/************************************************************************************
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/****************************************************************************************************
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* Name: stm32_extmemaddr
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* Name: stm32_extmemaddr
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*
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*
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* Description:
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* Description:
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* Initialize adress line GPIOs for external memory access
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* Initialize adress line GPIOs for external memory access
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*
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*
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************************************************************************************/
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****************************************************************************************************/
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#ifdef CONFIG_STM32_FSMC
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#ifdef CONFIG_STM32_FSMC
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void stm32_extmemaddr(int naddrs);
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void stm32_extmemaddr(int naddrs);
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#endif
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#endif
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/************************************************************************************
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/****************************************************************************************************
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* Name: stm32_extmemdata
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* Name: stm32_extmemdata
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*
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*
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* Description:
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* Description:
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* Initialize data line GPIOs for external memory access
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* Initialize data line GPIOs for external memory access
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*
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*
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************************************************************************************/
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****************************************************************************************************/
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#ifdef CONFIG_STM32_FSMC
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#ifdef CONFIG_STM32_FSMC
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void stm32_extmemdata(int ndata);
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void stm32_extmemdata(int ndata);
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* Description:
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* Description:
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* enable clocking to the FSMC module
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* enable clocking to the FSMC module
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*
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*
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************************************************************************************/
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****************************************************************************************************/
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#ifdef CONFIG_STM32_FSMC
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#ifdef CONFIG_STM32_FSMC
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void stm32_enablefsmc(void);
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void stm32_enablefsmc(void);
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@ -276,7 +297,7 @@ void stm32_enablefsmc(void);
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* Description:
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* Description:
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* enable clocking to the FSMC module
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* enable clocking to the FSMC module
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*
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*
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************************************************************************************/
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****************************************************************************************************/
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#ifdef CONFIG_STM32_FSMC
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#ifdef CONFIG_STM32_FSMC
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void stm32_disablefsmc(void);
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void stm32_disablefsmc(void);
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@ -306,7 +327,7 @@ void stm32_disablefsmc(void);
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* word and uses the needed byte only). The NBL[1:0] are always kept low
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* word and uses the needed byte only). The NBL[1:0] are always kept low
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* during read transactions.
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* during read transactions.
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*
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*
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************************************************************************************/
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****************************************************************************************************/
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#ifdef CONFIG_STM32_FSMC
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#ifdef CONFIG_STM32_FSMC
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void stm32_selectsram(void);
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void stm32_selectsram(void);
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@ -318,7 +339,7 @@ void stm32_selectsram(void);
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* Description:
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* Description:
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* Disable SRAM
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* Disable SRAM
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*
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*
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************************************************************************************/
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****************************************************************************************************/
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#ifdef CONFIG_STM32_FSMC
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#ifdef CONFIG_STM32_FSMC
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void stm32_deselectsram(void);
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void stm32_deselectsram(void);
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@ -330,7 +351,7 @@ void stm32_deselectsram(void);
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* Description:
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* Description:
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* Initialize to the LCD
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* Initialize to the LCD
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*
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*
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************************************************************************************/
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****************************************************************************************************/
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#ifdef CONFIG_STM32_FSMC
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#ifdef CONFIG_STM32_FSMC
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void stm32_selectlcd(void);
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void stm32_selectlcd(void);
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@ -342,7 +363,7 @@ void stm32_selectlcd(void);
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* Description:
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* Description:
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* Disable the LCD
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* Disable the LCD
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*
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*
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************************************************************************************/
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****************************************************************************************************/
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#ifdef CONFIG_STM32_FSMC
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#ifdef CONFIG_STM32_FSMC
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void stm32_deselectlcd(void);
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void stm32_deselectlcd(void);
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@ -88,12 +88,12 @@ void stm32_boardinitialize(void)
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stm32_selectsram();
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stm32_selectsram();
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#endif
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#endif
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/* Initialize USB is 1) USBDEV is selected, 2) the OTG FS controller is not
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/* Initialize USB if the 1) OTG FS controller is in the configuration and 2)
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* disabled, and 3) the weak function stm32_usbinitialize() has been brought
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* the weak function stm32_usbinitialize() has been brought into the build.
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* into the build.
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* Presumeably either CONFIG_USBDEV or CONFIG_USBHOST is also selected.
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*/
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*/
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#if defined(CONFIG_USBDEV) && defined(CONFIG_STM32_OTGFS)
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#ifdef CONFIG_STM32_OTGFS
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if (stm32_usbinitialize)
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if (stm32_usbinitialize)
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{
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{
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stm32_usbinitialize();
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stm32_usbinitialize();
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/************************************************************************************
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/************************************************************************************
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* configs/stm3220g-eval/src/up_usbdev.c
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* configs/stm3220g-eval/src/up_usb.c
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* arch/arm/src/board/up_boot.c
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* arch/arm/src/board/up_usb.c
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*
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*
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* Copyright (C) 2012 Gregory Nutt. All rights reserved.
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* Copyright (C) 2012 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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* Author: Gregory Nutt <gnutt@nuttx.org>
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@ -52,10 +52,19 @@
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#include "stm32_internal.h"
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#include "stm32_internal.h"
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#include "stm3220g-internal.h"
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#include "stm3220g-internal.h"
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#ifdef CONFIG_STM32_OTGFS
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/************************************************************************************
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/************************************************************************************
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* Definitions
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* Definitions
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************************************************************************************/
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************************************************************************************/
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#if defined(CONFIG_USBDEV) || defined(CONFIG_USBDEV)
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# define HAVE_USB 1
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#else
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# warning "CONFIG_STM32_OTGFS is enabled but neither CONFIG_USBDEV nor CONFIG_USBDEV"
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# undef HAVE_USB
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#endif
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/************************************************************************************
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/************************************************************************************
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* Private Functions
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* Private Functions
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************************************************************************************/
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************************************************************************************/
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@ -68,23 +77,109 @@
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* Name: stm32_usbinitialize
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* Name: stm32_usbinitialize
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*
|
*
|
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* Description:
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* Description:
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* Called to setup USB-related GPIO pins for the STM3210E-EVAL board.
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* Called from stm32_usbinitialize very early in inialization to setup USB-related
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* GPIO pins for the STM3220G-EVAL board.
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*
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*
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************************************************************************************/
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************************************************************************************/
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void stm32_usbinitialize(void)
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void stm32_usbinitialize(void)
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{
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{
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/* The OTG FS has an internal soft pull-up */
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#ifdef HAVE_USB
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/* The OTG FS has an internal soft pull-up. No GPIO configuration is required */
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|
||||||
/* Configure the OTG FS VBUS sensing GPIO, Power On, and Overcurrent GPIOs */
|
/* Configure the OTG FS VBUS sensing GPIO, Power On, and Overcurrent GPIOs */
|
||||||
|
|
||||||
#ifdef CONFIG_STM32_OTGFS
|
|
||||||
stm32_configgpio(GPIO_OTGFS_VBUS);
|
stm32_configgpio(GPIO_OTGFS_VBUS);
|
||||||
stm32_configgpio(GPIO_OTGFS_PWRON);
|
stm32_configgpio(GPIO_OTGFS_PWRON);
|
||||||
stm32_configgpio(GPIO_OTGFS_OVER);
|
stm32_configgpio(GPIO_OTGFS_OVER);
|
||||||
#endif
|
#endif
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/***********************************************************************************
|
||||||
|
* Name: stm32_usbhost_initialize
|
||||||
|
*
|
||||||
|
* Description:
|
||||||
|
* Called at application startup time to initialize the USB host functionality.
|
||||||
|
* This function will start a thread that will monitor for device
|
||||||
|
* connection/disconnection events.
|
||||||
|
*
|
||||||
|
***********************************************************************************/
|
||||||
|
|
||||||
|
#ifdef CONFIG_USBHOST
|
||||||
|
void stm32_usbhost_initialize(void)
|
||||||
|
{
|
||||||
|
#warning "Missing logic"
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/***********************************************************************************
|
||||||
|
* Name: stm32_usbhost_vbusdrive
|
||||||
|
*
|
||||||
|
* Description:
|
||||||
|
* Enable/disable driving of VBUS 5V output. This function must be provided be
|
||||||
|
* each platform that implements the STM32 OTG FS host interface
|
||||||
|
*
|
||||||
|
* "On-chip 5 V VBUS generation is not supported. For this reason, a charge pump
|
||||||
|
* or, if 5 V are available on the application board, a basic power switch, must
|
||||||
|
* be added externally to drive the 5 V VBUS line. The external charge pump can
|
||||||
|
* be driven by any GPIO output. When the application decides to power on VBUS
|
||||||
|
* using the chosen GPIO, it must also set the port power bit in the host port
|
||||||
|
* control and status register (PPWR bit in OTG_FS_HPRT).
|
||||||
|
*
|
||||||
|
* "The application uses this field to control power to this port, and the core
|
||||||
|
* clears this bit on an overcurrent condition."
|
||||||
|
*
|
||||||
|
* Input Parameters:
|
||||||
|
* iface - For future growth to handle multiple USB host interface. Should be zero.
|
||||||
|
* enable - true: enable VBUS power; false: disable VBUS power
|
||||||
|
*
|
||||||
|
* Returned Value:
|
||||||
|
* None
|
||||||
|
*
|
||||||
|
***********************************************************************************/
|
||||||
|
|
||||||
|
#ifdef CONFIG_USBHOST
|
||||||
|
void stm32_usbhost_vbusdrive(int iface, bool enable)
|
||||||
|
{
|
||||||
|
DEBUGASSERT(iface == 0);
|
||||||
|
|
||||||
|
if (enable)
|
||||||
|
{
|
||||||
|
/* Enable the Power Switch by driving the enable pin low */
|
||||||
|
|
||||||
|
stm32_gpiowrite(GPIO_OTGFS_PWRON, false);
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
/* Disable the Power Switch by driving the enable pin high */
|
||||||
|
|
||||||
|
stm32_gpiowrite(GPIO_OTGFS_PWRON, true);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/************************************************************************************
|
||||||
|
* Name: stm32_setup_overcurrent
|
||||||
|
*
|
||||||
|
* Description:
|
||||||
|
* Setup to receive an interrupt-level callback if an overcurrent condition is
|
||||||
|
* detected.
|
||||||
|
*
|
||||||
|
* Input paramter:
|
||||||
|
* handler - New overcurrent interrupt handler
|
||||||
|
*
|
||||||
|
* Returned value:
|
||||||
|
* Old overcurrent interrupt handler
|
||||||
|
*
|
||||||
|
************************************************************************************/
|
||||||
|
|
||||||
|
#ifdef CONFIG_USBHOST
|
||||||
|
xcpt_t stm32_setup_overcurrent(xcpt_t handler)
|
||||||
|
{
|
||||||
|
return stm32_gpiosetevent(GPIO_OTGFS_OVER, true, true, true, handler);
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
/************************************************************************************
|
/************************************************************************************
|
||||||
* Name: stm32_usbsuspend
|
* Name: stm32_usbsuspend
|
||||||
*
|
*
|
||||||
|
@ -96,8 +191,12 @@ void stm32_usbinitialize(void)
|
||||||
*
|
*
|
||||||
************************************************************************************/
|
************************************************************************************/
|
||||||
|
|
||||||
|
#ifdef CONFIG_USBDEV
|
||||||
void stm32_usbsuspend(FAR struct usbdev_s *dev, bool resume)
|
void stm32_usbsuspend(FAR struct usbdev_s *dev, bool resume)
|
||||||
{
|
{
|
||||||
ulldbg("resume: %d\n", resume);
|
ulldbg("resume: %d\n", resume);
|
||||||
}
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /* CONFIG_STM32_OTGFS */
|
||||||
|
|
|
@ -75,7 +75,7 @@
|
||||||
* PLLM : 25 (STM32_PLLCFG_PLLM)
|
* PLLM : 25 (STM32_PLLCFG_PLLM)
|
||||||
* PLLN : 336 (STM32_PLLCFG_PLLN)
|
* PLLN : 336 (STM32_PLLCFG_PLLN)
|
||||||
* PLLP : 2 (STM32_PLLCFG_PLLP)
|
* PLLP : 2 (STM32_PLLCFG_PLLP)
|
||||||
* PLLQ : 7 (STM32_PLLCFG_PPQ)
|
* PLLQ : 7 (STM32_PLLCFG_PLLQ)
|
||||||
* Main regulator output voltage : Scale1 mode Needed for high speed SYSCLK
|
* Main regulator output voltage : Scale1 mode Needed for high speed SYSCLK
|
||||||
* Flash Latency(WS) : 5
|
* Flash Latency(WS) : 5
|
||||||
* Prefetch Buffer : OFF
|
* Prefetch Buffer : OFF
|
||||||
|
@ -114,7 +114,7 @@
|
||||||
#define STM32_PLLCFG_PLLM RCC_PLLCFG_PLLM(25)
|
#define STM32_PLLCFG_PLLM RCC_PLLCFG_PLLM(25)
|
||||||
#define STM32_PLLCFG_PLLN RCC_PLLCFG_PLLN(336)
|
#define STM32_PLLCFG_PLLN RCC_PLLCFG_PLLN(336)
|
||||||
#define STM32_PLLCFG_PLLP RCC_PLLCFG_PLLP_2
|
#define STM32_PLLCFG_PLLP RCC_PLLCFG_PLLP_2
|
||||||
#define STM32_PLLCFG_PPQ RCC_PLLCFG_PLLQ(7)
|
#define STM32_PLLCFG_PLLQ RCC_PLLCFG_PLLQ(7)
|
||||||
|
|
||||||
#define STM32_SYSCLK_FREQUENCY 168000000ul
|
#define STM32_SYSCLK_FREQUENCY 168000000ul
|
||||||
|
|
||||||
|
|
|
@ -68,7 +68,7 @@
|
||||||
* PLLM : 8 (STM32_PLLCFG_PLLM)
|
* PLLM : 8 (STM32_PLLCFG_PLLM)
|
||||||
* PLLN : 336 (STM32_PLLCFG_PLLN)
|
* PLLN : 336 (STM32_PLLCFG_PLLN)
|
||||||
* PLLP : 2 (STM32_PLLCFG_PLLP)
|
* PLLP : 2 (STM32_PLLCFG_PLLP)
|
||||||
* PLLQ : 7 (STM32_PLLCFG_PPQ)
|
* PLLQ : 7 (STM32_PLLCFG_PLLQ)
|
||||||
* Main regulator output voltage : Scale1 mode Needed for high speed SYSCLK
|
* Main regulator output voltage : Scale1 mode Needed for high speed SYSCLK
|
||||||
* Flash Latency(WS) : 5
|
* Flash Latency(WS) : 5
|
||||||
* Prefetch Buffer : OFF
|
* Prefetch Buffer : OFF
|
||||||
|
@ -107,7 +107,7 @@
|
||||||
#define STM32_PLLCFG_PLLM RCC_PLLCFG_PLLM(8)
|
#define STM32_PLLCFG_PLLM RCC_PLLCFG_PLLM(8)
|
||||||
#define STM32_PLLCFG_PLLN RCC_PLLCFG_PLLN(336)
|
#define STM32_PLLCFG_PLLN RCC_PLLCFG_PLLN(336)
|
||||||
#define STM32_PLLCFG_PLLP RCC_PLLCFG_PLLP_2
|
#define STM32_PLLCFG_PLLP RCC_PLLCFG_PLLP_2
|
||||||
#define STM32_PLLCFG_PPQ RCC_PLLCFG_PLLQ(7)
|
#define STM32_PLLCFG_PLLQ RCC_PLLCFG_PLLQ(7)
|
||||||
|
|
||||||
#define STM32_SYSCLK_FREQUENCY 168000000ul
|
#define STM32_SYSCLK_FREQUENCY 168000000ul
|
||||||
|
|
||||||
|
|
Loading…
Reference in New Issue