forked from Archive/PX4-Autopilot
[BACKPORT] MR-CANHUBK3 ADAP board support, add ADC support
This commit is contained in:
Peter van der Perk
Daniel Agar
parent
3cf205c4a6
commit
d9fd67be3b
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@ -1,20 +1,25 @@
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# CONFIG_BOARD_ROMFSROOT is not set
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CONFIG_BOARD_SERIAL_GPS1="/dev/ttyS1"
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CONFIG_BOARD_SERIAL_GPS2="/dev/ttyS4"
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CONFIG_BOARD_SERIAL_RC="/dev/ttyS5"
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CONFIG_BOARD_SERIAL_TEL1="/dev/ttyS2"
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CONFIG_BOARD_SERIAL_TEL4="/dev/ttyS3"
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CONFIG_BOARD_UAVCAN_INTERFACES=1
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CONFIG_COMMON_LIGHT=y
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CONFIG_CYPHAL_BMS_SUBSCRIBER=y
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CONFIG_DRIVERS_ADC_BOARD_ADC=y
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CONFIG_DRIVERS_CYPHAL=y
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CONFIG_DRIVERS_GPS=y
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CONFIG_DRIVERS_IRLOCK=y
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CONFIG_DRIVERS_MAGNETOMETER_ISENTEK_IST8310=y
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CONFIG_DRIVERS_MAGNETOMETER_LIS3MDL=y
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CONFIG_DRIVERS_RC_INPUT=y
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CONFIG_DRIVERS_SAFETY_BUTTON=y
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CONFIG_DRIVERS_UAVCAN=y
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CONFIG_EXAMPLES_FAKE_GPS=y
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CONFIG_MODULES_AIRSPEED_SELECTOR=y
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CONFIG_MODULES_ATTITUDE_ESTIMATOR_Q=y
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CONFIG_MODULES_BATTERY_STATUS=y
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CONFIG_MODULES_CAMERA_FEEDBACK=y
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CONFIG_MODULES_COMMANDER=y
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CONFIG_MODULES_ESC_BATTERY=y
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@ -17,6 +17,17 @@ param set-default MAV_1_UDP_PRT 14550
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param set-default SENS_EXT_I2C_PRB 0
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param set-default CYPHAL_ENABLE 0
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if ver hwtypecmp MR-CANHUBK3-ADAP
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then
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param set-default GPS_1_CONFIG 202
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param set-default RC_PORT_CONFIG 104
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param set-default SENS_INT_BARO_EN 0
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param set-default SYS_HAS_BARO 0
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# MR-CANHUBK3-ADAP voltage divider
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param set-default BAT1_V_DIV 13.158
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safety_button start
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fi
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if param greater -s UAVCAN_ENABLE 0
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then
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ifup can0
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@ -2,22 +2,31 @@
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#
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# NXP MR-CANHUBK3 specific board sensors init
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#------------------------------------------------------------------------------
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if ver hwtypecmp MR-CANHUBK3-ADAP
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then
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icm42688p -c 2 -b 3 -R 0 -S -f 15000 start
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# Internal magnetometer on I2c on ADAP
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bmm150 -X -a 18 start
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ist8310 -X -b 1 -R 10 start
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# ADC for voltage input sensing
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board_adc start
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#board_adc start FIXME no ADC drivers
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# External SPI bus ICM20649
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icm20649 -b 4 -S -R 10 start
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#FMUv5Xbase board orientation
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# External SPI bus ICM42688p
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icm42688p -c 1 -b 3 -R 10 -S -f 15000 start
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else
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bmm150 -X start
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# External compass on GPS1/I2C1 (the 3rd external bus): standard Holybro Pixhawk 4 or CUAV V5 GPS/compass puck (with lights, safety button, and buzzer)
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ist8310 -X -b 2 -R 10 start
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# Internal SPI bus ICM20649
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icm20649 -s -R 6 start
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# External SPI bus ICM20649
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icm20649 -b 4 -S -R 6 start
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# Internal SPI bus ICM42688p
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icm42688p -R 6 -s start
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# Internal magnetometer on I2c
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bmm150 -I start
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# External compass on GPS1/I2C1 (the 3rd external bus): standard Holybro Pixhawk 4 or CUAV V5 GPS/compass puck (with lights, safety button, and buzzer)
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ist8310 -X -b 2 -R 10 start
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# External SPI bus ICM42688p
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icm42688p -c 1 -b 3 -R 6 -S -f 15000 start
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fi
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# External compass on GPS1/I2C1 (the 3rd external bus): Drotek RTK GPS with LIS3MDL Compass
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lis3mdl -X -b 2 -R 2 start
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@ -25,5 +34,5 @@ lis3mdl -X -b 2 -R 2 start
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# Disable startup of internal baros if param is set to false
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if param compare SENS_INT_BARO_EN 1
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then
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bmp388 -I -a 0x77 start
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bmp388 -X -a 0x77 start
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fi
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@ -152,6 +152,18 @@
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#define PIN_LPUART1_RX (PIN_LPUART1_RX_3 | PIN_INPUT_PULLUP) /* PTC6 */
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#define PIN_LPUART1_TX PIN_LPUART1_TX_3 /* PTC7 */
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/* LPUART4 /dev/ttyS3 P8B 3X7 Pin 3 Single wire RC UART */
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#define PIN_LPUART4_RX PIN_LPUART4_TX_3 /* Dummy since it's Single Wire TX-only */
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#define PIN_LPUART4_TX PIN_LPUART4_TX_3 /* PTE11 */
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/* LPUART7 /dev/ttyS4 P8B 3X7 Pin 3 and Pin 8 */
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#define PIN_LPUART7_RX (PIN_LPUART7_RX_3 | PIN_INPUT_PULLUP) /* PTE0 */
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#define PIN_LPUART7_TX PIN_LPUART7_TX_3 /* PTE1 */
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/* LPUART9 P24 UART connector */
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#define PIN_LPUART9_RX (PIN_LPUART9_RX_1 | PIN_INPUT_PULLUP) /* PTB2 */
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@ -209,7 +221,8 @@
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#define PIN_LPSPI4_PCS0 PIN_LPSPI4_PCS0_1 /* PTB8 */
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#define PIN_LPSPI4_PCS3 PIN_LPSPI4_PCS3_1 /* PTA16 */
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#define PIN_LPSPI4_PCS (PIN_PTA16 | GPIO_LOWDRIVE | GPIO_OUTPUT_ONE) /* PTA16 */
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#define PIN_LPSPI4_CS_P26 (PIN_PTA16 | GPIO_LOWDRIVE | GPIO_OUTPUT_ONE) /* PTA16 */
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#define PIN_LPSPI4_CS_P8B (PIN_PTB8 | GPIO_LOWDRIVE | GPIO_OUTPUT_ONE) /* PTB8 */
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/* LPSPI5 P26 external IMU connector */
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@ -245,6 +245,8 @@ CONFIG_S32K3XX_LPUART13=y
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CONFIG_S32K3XX_LPUART14=y
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CONFIG_S32K3XX_LPUART1=y
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CONFIG_S32K3XX_LPUART2=y
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CONFIG_S32K3XX_LPUART4=y
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CONFIG_S32K3XX_LPUART7=y
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CONFIG_S32K3XX_LPUART9=y
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CONFIG_S32K3XX_LPUART_INVERT=y
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CONFIG_S32K3XX_LPUART_SINGLEWIRE=y
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@ -38,6 +38,7 @@ if("${PX4_BOARD_LABEL}" STREQUAL "canbootloader")
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clockconfig.c
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periphclocks.c
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timer_config.cpp
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hw_rev_ver_canhubk3.c
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)
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target_link_libraries(drivers_board
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@ -65,6 +66,8 @@ else()
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spi.cpp
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timer_config.cpp
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s32k3xx_userleds.c
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hw_rev_ver_canhubk3.c
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manifest.c
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)
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target_link_libraries(drivers_board
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@ -88,7 +88,7 @@ __BEGIN_DECLS
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#define DIRECT_PWM_OUTPUT_CHANNELS 8
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#define RC_SERIAL_PORT "/dev/ttyS5"
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#define RC_SERIAL_SINGLEWIRE
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#define RC_SERIAL_SINGLEWIRE_FORCE
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#define RC_SERIAL_INVERT_RX_ONLY
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#define BOARD_ENABLE_CONSOLE_BUFFER
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@ -110,6 +110,40 @@ __BEGIN_DECLS
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/* Reboot and ulog we store on a wear-level filesystem */
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#define HARDFAULT_REBOOT_PATH "/mnt/progmem/reboot"
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/* To detect MR-CANHUBK3-ADAP board */
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#define BOARD_HAS_HW_VERSIONING 1
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#define CANHUBK3_ADAP_DETECT (PIN_PTA12 | GPIO_INPUT | GPIO_PULLUP)
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/*
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* ADC channels
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*
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* These are the channel numbers of the ADCs of the microcontroller that can be used by the Px4
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* Firmware in the adc driver. ADC1 has 32 channels, with some a/b selection overlap
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* in the AD4-AD7 range on the same ADC.
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*
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* Only ADC1 is used
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* Bits 31:0 are ADC1 channels 31:0
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*/
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#define ADC1_CH(c) (((c) & 0x1f)) /* Define ADC number Channel number */
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/* ADC defines to be used in sensors.cpp to read from a particular channel */
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#define ADC_BATTERY_VOLTAGE_CHANNEL ADC1_CH(0) /* BAT_VSENS 85 PTB4 ADC1_SE10 */
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#define ADC_BATTERY_CURRENT_CHANNEL ADC1_CH(1) /* Non-existant but needed for compilation */
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/* Mask use to initialize the ADC driver */
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#define ADC_CHANNELS ((1 << ADC_BATTERY_VOLTAGE_CHANNEL))
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/* Safety Switch
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* TBD
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*/
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#define GPIO_LED_SAFETY (PIN_PTE26 | GPIO_OUTPUT | GPIO_OUTPUT_ZERO)
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#define GPIO_BTN_SAFETY (PIN_PTA11 | GPIO_INPUT | GPIO_PULLDOWN)
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/****************************************************************************
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* Public Data
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****************************************************************************/
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@ -0,0 +1,142 @@
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/****************************************************************************
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*
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* Copyright (C) 2023 PX4 Development Team. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name PX4 nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/**
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* @file hw_rev_ver_canhubk3.c
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* CANHUBK3 Hardware Revision and Version ID API
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*/
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#include <drivers/drv_adc.h>
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#include <px4_arch/adc.h>
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#include <px4_platform_common/micro_hal.h>
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#include <px4_platform_common/px4_config.h>
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#include <px4_platform/board_determine_hw_info.h>
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#include <stdio.h>
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#include <board_config.h>
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#include <systemlib/px4_macros.h>
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#if defined(BOARD_HAS_HW_VERSIONING)
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#define HW_INFO_SIZE HW_INFO_VER_DIGITS + HW_INFO_REV_DIGITS
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/****************************************************************************
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* Private Data
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****************************************************************************/
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static int is_adap_connected = 0;
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/************************************************************************************
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* Name: board_get_hw_type
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*
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* Description:
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* Optional returns a 0 terminated string defining the HW type.
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*
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* Input Parameters:
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* None
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*
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* Returned Value:
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* a 0 terminated string defining the HW type. This my be a 0 length string ""
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*
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************************************************************************************/
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__EXPORT const char *board_get_hw_type_name()
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{
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if (is_adap_connected) {
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return (const char *)"MR-CANHUBK3-ADAP";
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} else {
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return (const char *)"MR-CANHUBK344";
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}
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}
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/************************************************************************************
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* Name: board_get_hw_version
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*
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* Description:
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* Optional returns a integer HW version
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*
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* Input Parameters:
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* None
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*
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* Returned Value:
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* An integer value of this boards hardware version.
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* A value of -1 is the default for boards not supporting the BOARD_HAS_VERSIONING API.
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* A value of 0 is the default for boards supporting the API but not having version.
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*
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************************************************************************************/
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__EXPORT int board_get_hw_version()
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{
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return 0;
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}
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/************************************************************************************
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* Name: board_get_hw_revision
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*
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* Description:
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* Optional returns a integer HW revision
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*
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* Input Parameters:
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* None
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*
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* Returned Value:
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* An integer value of this boards hardware revision.
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* A value of -1 is the default for boards not supporting the BOARD_HAS_VERSIONING API.
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* A value of 0 is the default for boards supporting the API but not having revision.
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*
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************************************************************************************/
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__EXPORT int board_get_hw_revision()
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{
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return 0;
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}
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/************************************************************************************
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* Name: board_determine_hw_info
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*
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* Description:
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* Uses GPIO to detect MR-CANHUBK3-ADAP
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*
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************************************************************************************/
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int board_determine_hw_info()
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{
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s32k3xx_pinconfig(CANHUBK3_ADAP_DETECT);
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is_adap_connected = !s32k3xx_gpioread(CANHUBK3_ADAP_DETECT);
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return 0;
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}
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#endif
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@ -34,6 +34,6 @@
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#include <px4_arch/i2c_hw_description.h>
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constexpr px4_i2c_bus_t px4_i2c_buses[I2C_BUS_MAX_BUS_ITEMS] = {
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initI2CBusInternal(PX4_BUS_NUMBER_TO_PX4(0)),
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initI2CBusExternal(PX4_BUS_NUMBER_TO_PX4(1)),
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initI2CBusExternal(PX4_BUS_NUMBER_TO_PX4(0)),
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initI2CBusInternal(PX4_BUS_NUMBER_TO_PX4(1)),
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};
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@ -44,6 +44,7 @@
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#include "board_config.h"
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#include <px4_platform_common/init.h>
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#include <px4_platform/board_determine_hw_info.h>
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#if defined(CONFIG_S32K3XX_LPSPI1) && defined(CONFIG_MMCSD)
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#include <nuttx/mmcsd.h>
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@ -96,6 +97,8 @@ __EXPORT int board_app_initialize(uintptr_t arg)
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int rv;
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board_determine_hw_info();
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#if defined(CONFIG_S32K3XX_LPSPI1) && defined(CONFIG_MMCSD)
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/* LPSPI1 *****************************************************************/
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|
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@ -0,0 +1,79 @@
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/****************************************************************************
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*
|
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* Copyright (c) 2023 PX4 Development Team. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name PX4 nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
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****************************************************************************/
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/**
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* @file manifest.c
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*
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* This module supplies the interface to the manifest of hardware that is
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* optional and dependent on the HW REV and HW VER IDs
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*
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* The manifest allows the system to know whether a hardware option
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* say for example the PX4IO is an no-pop option vs it is broken.
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*
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*/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <px4_platform_common/px4_config.h>
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#include <stdbool.h>
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#include <syslog.h>
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#include "systemlib/px4_macros.h"
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#include "px4_log.h"
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/****************************************************************************
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* Pre-Processor Definitions
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****************************************************************************/
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/************************************************************************************
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* Name: board_query_manifest
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*
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* Description:
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* Optional returns manifest item.
|
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*
|
||||
* Input Parameters:
|
||||
* manifest_id - the ID for the manifest item to retrieve
|
||||
*
|
||||
* Returned Value:
|
||||
* 0 - item is not in manifest => assume legacy operations
|
||||
* pointer to a manifest item
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
__EXPORT px4_hw_mft_item board_query_manifest(px4_hw_mft_item_id_t id)
|
||||
{
|
||||
return px4_hw_mft_unsupported;
|
||||
}
|
||||
|
|
@ -107,6 +107,9 @@ int s32k3xx_bringup(void)
|
|||
s32k3xx_spidev_initialize();
|
||||
#endif
|
||||
|
||||
s32k3xx_pinconfig(GPIO_LED_SAFETY);
|
||||
s32k3xx_pinconfig(GPIO_BTN_SAFETY);
|
||||
|
||||
#ifdef CONFIG_INPUT_BUTTONS
|
||||
/* Register the BUTTON driver */
|
||||
|
||||
|
|
|
|||
|
|
@ -168,6 +168,22 @@ const struct peripheral_clock_config_s g_peripheral_clockconfig0[] = {
|
|||
.clkgate = true,
|
||||
#else
|
||||
.clkgate = false,
|
||||
#endif
|
||||
},
|
||||
{
|
||||
.clkname = LPUART4_CLK,
|
||||
#ifdef CONFIG_S32K3XX_LPUART4
|
||||
.clkgate = true,
|
||||
#else
|
||||
.clkgate = false,
|
||||
#endif
|
||||
},
|
||||
{
|
||||
.clkname = LPUART7_CLK,
|
||||
#ifdef CONFIG_S32K3XX_LPUART7
|
||||
.clkgate = true,
|
||||
#else
|
||||
.clkgate = false,
|
||||
#endif
|
||||
},
|
||||
{
|
||||
|
|
@ -258,6 +274,10 @@ const struct peripheral_clock_config_s g_peripheral_clockconfig0[] = {
|
|||
.clkname = EMIOS0_CLK,
|
||||
.clkgate = true,
|
||||
},
|
||||
{
|
||||
.clkname = ADC2_CLK,
|
||||
.clkgate = true,
|
||||
}
|
||||
};
|
||||
|
||||
unsigned int const num_of_peripheral_clocks_0 =
|
||||
|
|
|
|||
|
|
@ -70,11 +70,12 @@ constexpr px4_spi_bus_t px4_spi_buses[SPI_BUS_MAX_BUS_ITEMS] = {
|
|||
initSPIBus(SPI::Bus::SPI3, { // SPI3 is ignored only used for FS26 by a NuttX driver
|
||||
initSPIDevice(SPIDEV_FLASH(0), SPI::CS{GPIO::PortD, GPIO::Pin17})
|
||||
}),
|
||||
initSPIBus(SPI::Bus::SPI4, {
|
||||
initSPIDevice(DRV_IMU_DEVTYPE_ICM42688P, SPI::CS{GPIO::PortA, GPIO::Pin16}, SPI::DRDY{PIN_WKPU20})
|
||||
initSPIBusExternal(SPI::Bus::SPI4, {
|
||||
initSPIConfigExternal(SPI::CS{GPIO::PortA, GPIO::Pin16}, SPI::DRDY{PIN_WKPU20}),
|
||||
initSPIConfigExternal(SPI::CS{GPIO::PortB, GPIO::Pin8}, SPI::DRDY{PIN_WKPU56})
|
||||
}),
|
||||
initSPIBus(SPI::Bus::SPI5, {
|
||||
initSPIDevice(DRV_IMU_DEVTYPE_ICM20649, SPI::CS{GPIO::PortA, GPIO::Pin14}, SPI::DRDY{PIN_WKPU4})
|
||||
initSPIBusExternal(SPI::Bus::SPI5, {
|
||||
initSPIConfigExternal(SPI::CS{GPIO::PortA, GPIO::Pin14}, SPI::DRDY{PIN_WKPU4})
|
||||
}),
|
||||
};
|
||||
|
||||
|
|
@ -337,7 +338,14 @@ void s32k3xx_lpspi4select(FAR struct spi_dev_s *dev, uint32_t devid,
|
|||
spiinfo("devid: %" PRId32 ", CS: %s\n", devid,
|
||||
selected ? "assert" : "de-assert");
|
||||
|
||||
s32k3xx_gpiowrite(PIN_LPSPI4_PCS, !selected);
|
||||
devid = ((devid) & 0xF);
|
||||
|
||||
if (devid == 0) {
|
||||
s32k3xx_gpiowrite(PIN_LPSPI4_CS_P26, !selected);
|
||||
|
||||
} else if (devid == 1) {
|
||||
s32k3xx_gpiowrite(PIN_LPSPI4_CS_P8B, !selected);
|
||||
}
|
||||
}
|
||||
|
||||
uint8_t s32k3xx_lpspi4status(FAR struct spi_dev_s *dev, uint32_t devid)
|
||||
|
|
|
|||
|
|
@ -440,6 +440,8 @@ __BEGIN_DECLS
|
|||
|
||||
#if defined(RC_SERIAL_SINGLEWIRE)
|
||||
static inline bool board_rc_singlewire(const char *device) { return strcmp(device, RC_SERIAL_PORT) == 0; }
|
||||
#elif defined(RC_SERIAL_SINGLEWIRE_FORCE)
|
||||
static inline bool board_rc_singlewire(const char *device) { return true; }
|
||||
#else
|
||||
static inline bool board_rc_singlewire(const char *device) { return false; }
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -38,144 +38,76 @@
|
|||
|
||||
#include <nuttx/analog/adc.h>
|
||||
|
||||
#include <hardware/s32k1xx_sim.h>
|
||||
|
||||
//todo S32K add ADC fior now steal the kinetis one
|
||||
#include <kinetis.h>
|
||||
#include <hardware/kinetis_adc.h>
|
||||
|
||||
|
||||
#define _REG(_addr) (*(volatile uint32_t *)(_addr))
|
||||
|
||||
/* ADC register accessors */
|
||||
|
||||
#define REG(a, _reg) _REG(KINETIS_ADC##a##_BASE + (_reg))
|
||||
|
||||
#define rSC1A(adc) REG(adc, KINETIS_ADC_SC1A_OFFSET) /* ADC status and control registers 1 */
|
||||
#define rSC1B(adc) REG(adc, KINETIS_ADC_SC1B_OFFSET) /* ADC status and control registers 1 */
|
||||
#define rCFG1(adc) REG(adc, KINETIS_ADC_CFG1_OFFSET) /* ADC configuration register 1 */
|
||||
#define rCFG2(adc) REG(adc, KINETIS_ADC_CFG2_OFFSET) /* Configuration register 2 */
|
||||
#define rRA(adc) REG(adc, KINETIS_ADC_RA_OFFSET) /* ADC data result register */
|
||||
#define rRB(adc) REG(adc, KINETIS_ADC_RB_OFFSET) /* ADC data result register */
|
||||
#define rCV1(adc) REG(adc, KINETIS_ADC_CV1_OFFSET) /* Compare value registers */
|
||||
#define rCV2(adc) REG(adc, KINETIS_ADC_CV2_OFFSET) /* Compare value registers */
|
||||
#define rSC2(adc) REG(adc, KINETIS_ADC_SC2_OFFSET) /* Status and control register 2 */
|
||||
#define rSC3(adc) REG(adc, KINETIS_ADC_SC3_OFFSET) /* Status and control register 3 */
|
||||
#define rOFS(adc) REG(adc, KINETIS_ADC_OFS_OFFSET) /* ADC offset correction register */
|
||||
#define rPG(adc) REG(adc, KINETIS_ADC_PG_OFFSET) /* ADC plus-side gain register */
|
||||
#define rMG(adc) REG(adc, KINETIS_ADC_MG_OFFSET) /* ADC minus-side gain register */
|
||||
#define rCLPD(adc) REG(adc, KINETIS_ADC_CLPD_OFFSET) /* ADC plus-side general calibration value register */
|
||||
#define rCLPS(adc) REG(adc, KINETIS_ADC_CLPS_OFFSET) /* ADC plus-side general calibration value register */
|
||||
#define rCLP4(adc) REG(adc, KINETIS_ADC_CLP4_OFFSET) /* ADC plus-side general calibration value register */
|
||||
#define rCLP3(adc) REG(adc, KINETIS_ADC_CLP3_OFFSET) /* ADC plus-side general calibration value register */
|
||||
#define rCLP2(adc) REG(adc, KINETIS_ADC_CLP2_OFFSET) /* ADC plus-side general calibration value register */
|
||||
#define rCLP1(adc) REG(adc, KINETIS_ADC_CLP1_OFFSET) /* ADC plus-side general calibration value register */
|
||||
#define rCLP0(adc) REG(adc, KINETIS_ADC_CLP0_OFFSET) /* ADC plus-side general calibration value register */
|
||||
#define rCLMD(adc) REG(adc, KINETIS_ADC_CLMD_OFFSET) /* ADC minus-side general calibration value register */
|
||||
#define rCLMS(adc) REG(adc, KINETIS_ADC_CLMS_OFFSET) /* ADC minus-side general calibration value register */
|
||||
#define rCLM4(adc) REG(adc, KINETIS_ADC_CLM4_OFFSET) /* ADC minus-side general calibration value register */
|
||||
#define rCLM3(adc) REG(adc, KINETIS_ADC_CLM3_OFFSET) /* ADC minus-side general calibration value register */
|
||||
#define rCLM2(adc) REG(adc, KINETIS_ADC_CLM2_OFFSET) /* ADC minus-side general calibration value register */
|
||||
#define rCLM1(adc) REG(adc, KINETIS_ADC_CLM1_OFFSET) /* ADC minus-side general calibration value register */
|
||||
#define rCLM0(adc) REG(adc, KINETIS_ADC_CLM0_OFFSET) /* ADC minus-side general calibration value register */
|
||||
#include <hardware/s32k3xx_adc.h>
|
||||
#include <hardware/s32k344_pinmux.h>
|
||||
|
||||
int px4_arch_adc_init(uint32_t base_address)
|
||||
{
|
||||
/* Input is Buss Clock 56 Mhz We will use /8 for 7 Mhz */
|
||||
uint32_t regval;
|
||||
|
||||
irqstate_t flags = px4_enter_critical_section();
|
||||
/* Configure and perform calibration */
|
||||
putreg32(ADC_MCR_ADCLKSEL_DIV4, S32K3XX_ADC2_MCR);
|
||||
|
||||
_REG(KINETIS_SIM_SCGC3) |= SIM_SCGC3_ADC1;
|
||||
rCFG1(1) = ADC_CFG1_ADICLK_BUSCLK | ADC_CFG1_MODE_1213BIT | ADC_CFG1_ADIV_DIV8;
|
||||
rCFG2(1) = 0;
|
||||
rSC2(1) = ADC_SC2_REFSEL_DEFAULT;
|
||||
regval = getreg32(S32K3XX_ADC2_AMSIO);
|
||||
regval |= ADC_AMSIO_HSEN_MASK;
|
||||
putreg32(regval, S32K3XX_ADC2_AMSIO);
|
||||
|
||||
px4_leave_critical_section(flags);
|
||||
regval = getreg32(S32K3XX_ADC2_CAL2);
|
||||
regval &= ~ADC_CAL2_ENX;
|
||||
putreg32(regval, S32K3XX_ADC2_CAL2);
|
||||
|
||||
/* Clear the CALF and begin the calibration */
|
||||
regval = getreg32(S32K3XX_ADC2_CALBISTREG);
|
||||
regval &= ~(ADC_CALBISTREG_TEST_EN | ADC_CALBISTREG_AVG_EN | ADC_CALBISTREG_NR_SMPL_MASK |
|
||||
ADC_CALBISTREG_CALSTFUL | ADC_CALBISTREG_TSAMP_MASK | ADC_CALBISTREG_RESN_MASK);
|
||||
regval |= ADC_CALBISTREG_TEST_EN | ADC_CALBISTREG_AVG_EN | ADC_CALBISTREG_NR_SMPL_4SMPL |
|
||||
ADC_CALBISTREG_CALSTFUL | ADC_CALBISTREG_RESN_14BIT;
|
||||
putreg32(regval, S32K3XX_ADC2_CALBISTREG);
|
||||
|
||||
rSC3(1) = ADC_SC3_CAL | ADC_SC3_CALF;
|
||||
while (getreg32(S32K3XX_ADC2_CALBISTREG) & ADC_CALBISTREG_C_T_BUSY) {};
|
||||
|
||||
while ((rSC1A(1) & ADC_SC1_COCO) == 0) {
|
||||
usleep(100);
|
||||
putreg32(ADC_MCR_PWDN, S32K3XX_ADC2_MCR);
|
||||
|
||||
if (rSC3(1) & ADC_SC3_CALF) {
|
||||
return -1;
|
||||
}
|
||||
}
|
||||
putreg32(22, S32K3XX_ADC2_CTR0);
|
||||
|
||||
/* dummy read to clear COCO of calibration */
|
||||
putreg32(22, S32K3XX_ADC2_CTR1);
|
||||
|
||||
int32_t r = rRA(1);
|
||||
putreg32(0, S32K3XX_ADC2_DMAE);
|
||||
|
||||
/* Check the state of CALF at the end of calibration */
|
||||
putreg32(ADC_MCR_ADCLKSEL_DIV4 | ADC_MCR_AVGS_32CONV | ADC_MCR_AVGEN | ADC_MCR_BCTU_MODE | ADC_MCR_MODE,
|
||||
S32K3XX_ADC2_MCR);
|
||||
|
||||
if (rSC3(1) & ADC_SC3_CALF) {
|
||||
return -1;
|
||||
}
|
||||
putreg32(0x10, S32K3XX_ADC2_NCMR0);
|
||||
|
||||
/* Calculate the calibration values for single ended positive */
|
||||
putreg32(0x10, S32K3XX_ADC2_NCMR1);
|
||||
|
||||
r = rCLP0(1) + rCLP1(1) + rCLP2(1) + rCLP3(1) + rCLP4(1) + rCLPS(1) ;
|
||||
r = 0x8000U | (r >> 1U);
|
||||
rPG(1) = r;
|
||||
regval = getreg32(S32K3XX_ADC2_MCR);
|
||||
|
||||
/* Calculate the calibration values for double ended Negitive */
|
||||
regval |= ADC_MCR_NSTART;
|
||||
|
||||
r = rCLM0(1) + rCLM1(1) + rCLM2(1) + rCLM3(1) + rCLM4(1) + rCLMS(1) ;
|
||||
r = 0x8000U | (r >> 1U);
|
||||
rMG(1) = r;
|
||||
|
||||
/* kick off a sample and wait for it to complete */
|
||||
hrt_abstime now = hrt_absolute_time();
|
||||
|
||||
rSC1A(1) = ADC_SC1_ADCH(ADC_SC1_ADCH_TEMP);
|
||||
|
||||
while (!(rSC1A(1) & ADC_SC1_COCO)) {
|
||||
|
||||
/* don't wait for more than 500us, since that means something broke - should reset here if we see this */
|
||||
if ((hrt_absolute_time() - now) > 500) {
|
||||
return -1;
|
||||
}
|
||||
}
|
||||
putreg32(regval, S32K3XX_ADC2_MCR);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
void px4_arch_adc_uninit(uint32_t base_address)
|
||||
{
|
||||
irqstate_t flags = px4_enter_critical_section();
|
||||
_REG(KINETIS_SIM_SCGC3) &= ~SIM_SCGC3_ADC1;
|
||||
px4_leave_critical_section(flags);
|
||||
}
|
||||
|
||||
uint32_t px4_arch_adc_sample(uint32_t base_address, unsigned channel)
|
||||
{
|
||||
irqstate_t flags = px4_enter_critical_section();
|
||||
uint32_t result = 0;
|
||||
|
||||
/* clear any previous COCC */
|
||||
rRA(1);
|
||||
if (channel == 0) {
|
||||
result = getreg32(S32K3XX_ADC2_PCDR4);
|
||||
|
||||
/* run a single conversion right now - should take about 35 cycles (5 microseconds) max */
|
||||
rSC1A(1) = ADC_SC1_ADCH(channel);
|
||||
if ((result & ADC_PCDR_VALID) == ADC_PCDR_VALID) {
|
||||
result = result & 0xFFFF;
|
||||
|
||||
/* wait for the conversion to complete */
|
||||
const hrt_abstime now = hrt_absolute_time();
|
||||
|
||||
while (!(rSC1A(1) & ADC_SC1_COCO)) {
|
||||
|
||||
/* don't wait for more than 10us, since that means something broke - should reset here if we see this */
|
||||
if ((hrt_absolute_time() - now) > 10) {
|
||||
px4_leave_critical_section(flags);
|
||||
return 0xffff;
|
||||
} else {
|
||||
result = 0;
|
||||
}
|
||||
}
|
||||
|
||||
/* read the result and clear EOC */
|
||||
uint32_t result = rRA(1);
|
||||
|
||||
px4_leave_critical_section(flags);
|
||||
|
||||
return result;
|
||||
}
|
||||
|
||||
|
|
@ -186,10 +118,10 @@ float px4_arch_adc_reference_v()
|
|||
|
||||
uint32_t px4_arch_adc_temp_sensor_mask()
|
||||
{
|
||||
return 1 << (ADC_SC1_ADCH_TEMP >> ADC_SC1_ADCH_SHIFT);
|
||||
return 0; // No temp sensor
|
||||
}
|
||||
|
||||
uint32_t px4_arch_adc_dn_fullcount()
|
||||
{
|
||||
return 1 << 12; // 12 bit ADC
|
||||
return 1 << 15; // 15 bit conversion data
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in New Issue