forked from Archive/PX4-Autopilot
Some ENC28J60-related fixes
git-svn-id: https://nuttx.svn.sourceforge.net/svnroot/nuttx/trunk@5154 7fd9a85b-ad96-42d3-883c-3090e2eb8679
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@ -16,6 +16,7 @@ config EXAMPLES_XMLRPC
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config EXAMPLES_XMLRPC_BUFFERSIZE
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int "HTTP buffer size"
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default 1024
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depends on EXAMPLES_XMLRPC
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config EXAMPLES_XMLRPC_DHCPC
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bool "DHCP Client"
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@ -164,6 +164,7 @@ int nsh_netinit(void)
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dhcpc_close(handle);
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}
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#endif
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return OK;
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}
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@ -260,7 +260,7 @@ CONFIG_SDCLONE_DISABLE=y
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CONFIG_SCHED_WORKQUEUE=y
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CONFIG_SCHED_WORKPRIORITY=192
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CONFIG_SCHED_WORKPERIOD=50000
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CONFIG_SCHED_WORKSTACKSIZE=1024
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CONFIG_SCHED_WORKSTACKSIZE=2048
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CONFIG_SIG_SIGWORK=4
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# CONFIG_SCHED_LPWORK is not set
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CONFIG_SCHED_WAITPID=y
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@ -115,23 +115,23 @@
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#define LED_STARTED_ON_SETBITS (0)
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#define LED_STARTED_ON_CLRBITS ((FIRE_LED1|FIRE_LED2|FIRE_LED3) << ON_CLRBITS_SHIFT)
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#define LED_STARTED_OFF_SETBITS LED_STARTED_ON_SETBITS
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#define LED_STARTED_OFF_CLRBITS LED_STARTED_ON_CLRBITS
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#define LED_STARTED_OFF_SETBITS (0)
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#define LED_STARTED_OFF_CLRBITS ((FIRE_LED1|FIRE_LED2|FIRE_LED3) << OFF_CLRBITS_SHIFT)
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#define LED_HEAPALLOCATE_ON_SETBITS ((FIRE_LED1) << ON_SETBITS_SHIFT)
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#define LED_HEAPALLOCATE_ON_CLRBITS ((FIRE_LED2|FIRE_LED3) << ON_CLRBITS_SHIFT)
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#define LED_HEAPALLOCATE_OFF_SETBITS LED_STARTED_ON_SETBITS
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#define LED_HEAPALLOCATE_OFF_CLRBITS LED_STARTED_ON_CLRBITS
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#define LED_HEAPALLOCATE_OFF_SETBITS (0)
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#define LED_HEAPALLOCATE_OFF_CLRBITS ((FIRE_LED1|FIRE_LED2|FIRE_LED3) << OFF_CLRBITS_SHIFT)
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#define LED_IRQSENABLED_ON_SETBITS ((FIRE_LED2) << ON_SETBITS_SHIFT)
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#define LED_IRQSENABLED_ON_CLRBITS ((FIRE_LED1|FIRE_LED3) << ON_CLRBITS_SHIFT)
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#define LED_IRQSENABLED_OFF_SETBITS LED_HEAPALLOCATE_ON_SETBITS
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#define LED_IRQSENABLED_OFF_CLRBITS LED_HEAPALLOCATE_ON_CLRBITS
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#define LED_IRQSENABLED_OFF_SETBITS ((FIRE_LED1) << OFF_SETBITS_SHIFT)
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#define LED_IRQSENABLED_OFF_CLRBITS ((FIRE_LED1|FIRE_LED2|FIRE_LED3) << OFF_CLRBITS_SHIFT)
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#define LED_STACKCREATED_ON_SETBITS (0)
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#define LED_STACKCREATED_ON_CLRBITS ((FIRE_LED1|FIRE_LED2|FIRE_LED3) << ON_CLRBITS_SHIFT)
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#define LED_STACKCREATED_OFF_SETBITS LED_IRQSENABLED_ON_SETBITS
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#define LED_STACKCREATED_OFF_CLRBITS LED_IRQSENABLED_ON_CLRBITS
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#define LED_STACKCREATED_OFF_SETBITS ((FIRE_LED2) << OFF_SETBITS_SHIFT)
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#define LED_STACKCREATED_OFF_CLRBITS ((FIRE_LED1|FIRE_LED3) << OFF_CLRBITS_SHIFT)
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#define LED_FLASH_ON_SETBITS ((FIRE_LED3) << ON_SETBITS_SHIFT)
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#define LED_FLASH_ON_CLRBITS ((0) << ON_CLRBITS_SHIFT)
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@ -157,12 +157,12 @@ static void up_enable(FAR const struct enc_lower_s *lower)
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FAR struct stm32_lower_s *priv = (FAR struct stm32_lower_s *)lower;
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DEBUGASSERT(priv->handler);
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(void)stm32_gpiosetevent(GPIO_ENC28J60_INTR, true, true, true, priv->handler);
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(void)stm32_gpiosetevent(GPIO_ENC28J60_INTR, false, true, true, priv->handler);
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}
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static void up_disable(FAR const struct enc_lower_s *lower)
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{
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(void)stm32_gpiosetevent(GPIO_ENC28J60_INTR, true, true, true, NULL);
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(void)stm32_gpiosetevent(GPIO_ENC28J60_INTR, false, true, true, NULL);
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}
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/****************************************************************************
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@ -1383,7 +1383,14 @@ static void enc_worker(FAR void *arg)
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DEBUGASSERT(priv);
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/* Disable further interrupts by clearing the global interrup enable bit */
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/* Disable further interrupts by clearing the global interrupt enable bit.
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* "After an interrupt occurs, the host controller should clear the global
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* enable bit for the interrupt pin before servicing the interrupt. Clearing
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* the enable bit will cause the interrupt pin to return to the non-asserted
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* state (high). Doing so will prevent the host controller from missing a
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* falling edge should another interrupt occur while the immediate interrupt
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* is being serviced."
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*/
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enc_bfcgreg(priv, ENC_EIE, EIE_INTIE);
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@ -1551,12 +1558,17 @@ static void enc_worker(FAR void *arg)
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enc_rxerif(priv); /* Handle the RX error */
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enc_bfcgreg(priv, ENC_EIR, EIR_RXERIF); /* Clear the RXERIF interrupt */
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}
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}
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/* Enable Ethernet interrupts */
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enc_bfsgreg(priv, ENC_EIE, EIE_INTIE);
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/* Enable GPIO interrupts if they were disbled in enc_interrupt */
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#ifndef CONFIG_SPI_OWNBUS
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priv->lower->enable(priv->lower);
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#endif
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}
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/****************************************************************************
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@ -1596,6 +1608,14 @@ static int enc_interrupt(int irq, FAR void *context)
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* a good thing to do in any event.
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*/
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DEBUGASSERT(work_available(&priv->work));
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/* Notice that further GPIO interrupts are disabled until the work is
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* actually performed. This is to prevent overrun of the worker thread.
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* Interrupts are re-enabled in enc_worker() when the work is completed.
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*/
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priv->lower->disable(priv->lower);
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return work_queue(HPWORK, &priv->work, enc_worker, (FAR void *)priv, 0);
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#endif
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}
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@ -85,6 +85,22 @@ struct enc_stats_s
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/* The ENC28J60 normal provides interrupts to the MCU via a GPIO pin. The
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* following structure provides an MCU-independent mechanixm for controlling
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* the ENC28J60 GPIO interrupt.
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*
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* The ENC32J60 interrupt is an active low, *level* interrupt. "When an
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* interrupt occurs, the interrupt flag is set. If the interrupt is enabled
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* in the EIE register and the INTIE global interrupt enable bit is set, the
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* INT pin will be driven low"
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*
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* "When an enabled interrupt occurs, the interrupt pin will remain low until
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* all flags which are causing the interrupt are cleared or masked off
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* (enable bit is cleared) by the host controller." However, the interrupt
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* will behave like a falling edge interrupt because "After an interrupt
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* occurs, the host controller [clears] the global enable bit for the
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* interrupt pin before servicing the interrupt. Clearing the enable bit
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* will cause the interrupt pin to return to the non-asserted state (high).
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* Doing so will prevent the host controller from missing a falling edge
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* should another interrupt occur while the immediate interrupt is being
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* serviced."
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*/
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struct enc_lower_s
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