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changes added for SPI CS defines as requested for BMI055 driver integration (e.g. GPIO_SPI1_CS_PORTE_PIN15 for bmi055 gyro) to avoid double declaration of same chip select pin

This commit is contained in:
Sergej Scheiermann 2017-02-28 00:35:47 +01:00 committed by Lorenz Meier
parent dad5224206
commit c5e841256a
2 changed files with 47 additions and 42 deletions
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17
src/drivers/boards/px4fmu-v4/board_config.h
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@ -82,12 +82,17 @@
/* The BMI160 sensor replaces the MPU9250 on some boards. Only one is actually present and connected
* to the second GPIO pin on port C. The wrong driver will fail during start becaus of an incorrect WHO_AM_I register.*/
#define GPIO_SPI_CS_BMI160 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_SET|GPIO_PORTC|GPIO_PIN2)
#define GPIO_SPI1_CS_PORTC_PIN2 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_SET|GPIO_PORTC|GPIO_PIN2)
#define GPIO_SPI_CS_FRAM (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_SET|GPIO_PORTD|GPIO_PIN10)
#define GPIO_SPI_CS_BMI055_ACC (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_SET|GPIO_PORTC|GPIO_PIN15)
#define GPIO_SPI_CS_BMI055_GYR (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN15)
/* The BMI055 acceleration sensor replaces the ICM20608G on some boards. Only one is actually present and connected
* to the second GPIO pin on port C. The wrong driver will fail during start becaus of an incorrect WHO_AM_I register.*/
#define GPIO_SPI1_CS_PORTC_PIN15 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_SET|GPIO_PORTC|GPIO_PIN15)
/* The BMI055 gyroscope sensor replaces the LIS3MDL, HMC5983 on some boards. Only one is actually present and connected
* to the second GPIO pin on port E. The wrong driver will fail during start becaus of an incorrect WHO_AM_I register.*/
#define GPIO_SPI1_CS_PORTE_PIN15 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN15)
/* Define the Ready interrupts */
@ -108,9 +113,9 @@
#define GPIO_SPI_CS_OFF_LIS3MDL _PIN_OFF(GPIO_SPI_CS_LIS3MDL)
#define GPIO_SPI_CS_OFF_MS5611 _PIN_OFF(GPIO_SPI_CS_MS5611)
#define GPIO_SPI_CS_OFF_ICM_2060X _PIN_OFF(GPIO_SPI_CS_ICM_2060X)
#define GPIO_SPI_CS_OFF_BMI160 _PIN_OFF(GPIO_SPI_CS_BMI160)
#define GPIO_SPI_CS_OFF_BMI055_ACC _PIN_OFF(GPIO_SPI_CS_BMI055_ACC)
#define GPIO_SPI_CS_OFF_BMI055_GYR _PIN_OFF(GPIO_SPI_CS_BMI055_GYR)
#define GPIO_SPI_CS_OFF_BMI160 _PIN_OFF(GPIO_SPI1_CS_PORTC_PIN2)
#define GPIO_SPI_CS_OFF_BMI055_ACC _PIN_OFF(GPIO_SPI1_CS_PORTC_PIN15)
#define GPIO_SPI_CS_OFF_BMI055_GYR _PIN_OFF(GPIO_SPI1_CS_PORTE_PIN15)
#define GPIO_DRDY_OFF_MPU9250 _PIN_OFF(GPIO_DRDY_MPU9250)
#define GPIO_DRDY_OFF_ICM_2060X _PIN_OFF(GPIO_DRDY_ICM_2060X)

72
src/drivers/boards/px4fmu-v4/px4fmu_spi.c
View File

@ -76,9 +76,9 @@ __EXPORT void stm32_spiinitialize(void)
px4_arch_configgpio(GPIO_SPI_CS_HMC5983);
px4_arch_configgpio(GPIO_SPI_CS_MS5611);
px4_arch_configgpio(GPIO_SPI_CS_ICM_2060X);
px4_arch_configgpio(GPIO_SPI_CS_BMI160);
px4_arch_configgpio(GPIO_SPI_CS_BMI055_ACC);
px4_arch_configgpio(GPIO_SPI_CS_BMI055_GYR);
px4_arch_configgpio(GPIO_SPI1_CS_PORTC_PIN2); //BMI160
px4_arch_configgpio(GPIO_SPI1_CS_PORTC_PIN15); //BMI055 ACC
px4_arch_configgpio(GPIO_SPI1_CS_PORTE_PIN15); //BMI055 GYRO
/* De-activate all peripherals,
* required for some peripheral
@ -88,9 +88,9 @@ __EXPORT void stm32_spiinitialize(void)
px4_arch_gpiowrite(GPIO_SPI_CS_HMC5983, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_MS5611, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_ICM_2060X, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_BMI160, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_BMI055_ACC, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_BMI055_GYR, 1);
px4_arch_gpiowrite(GPIO_SPI1_CS_PORTC_PIN2, 1);
px4_arch_gpiowrite(GPIO_SPI1_CS_PORTC_PIN15, 1);
px4_arch_gpiowrite(GPIO_SPI1_CS_PORTE_PIN15, 1);
px4_arch_configgpio(GPIO_DRDY_MPU9250);
px4_arch_configgpio(GPIO_DRDY_HMC5983);
@ -116,9 +116,9 @@ __EXPORT void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
/* intended fallthrough */
case PX4_SPIDEV_ICM_20608:
/* Making sure the other peripherals are not selected */
px4_arch_gpiowrite(GPIO_SPI_CS_BMI160, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_BMI055_ACC, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_BMI055_GYR, 1);
px4_arch_gpiowrite(GPIO_SPI1_CS_PORTC_PIN2, 1);
px4_arch_gpiowrite(GPIO_SPI1_CS_PORTC_PIN15, 1);
px4_arch_gpiowrite(GPIO_SPI1_CS_PORTE_PIN15, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_MPU9250, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_HMC5983, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_MS5611, 1);
@ -131,9 +131,9 @@ __EXPORT void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
case PX4_SPIDEV_BARO:
/* Making sure the other peripherals are not selected */
px4_arch_gpiowrite(GPIO_SPI_CS_BMI160, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_BMI055_ACC, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_BMI055_GYR, 1);
px4_arch_gpiowrite(GPIO_SPI1_CS_PORTC_PIN2, 1); //BMI160
px4_arch_gpiowrite(GPIO_SPI1_CS_PORTC_PIN15, 1); //BMI055 ACC
px4_arch_gpiowrite(GPIO_SPI1_CS_PORTE_PIN15, 1); //BMI055 GYRO
px4_arch_gpiowrite(GPIO_SPI_CS_MPU9250, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_HMC5983, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_MS5611, !selected);
@ -142,9 +142,9 @@ __EXPORT void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
case PX4_SPIDEV_HMC:
/* Making sure the other peripherals are not selected */
px4_arch_gpiowrite(GPIO_SPI_CS_BMI160, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_BMI055_ACC, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_BMI055_GYR, 1);
px4_arch_gpiowrite(GPIO_SPI1_CS_PORTC_PIN2, 1); //BMI160
px4_arch_gpiowrite(GPIO_SPI1_CS_PORTC_PIN15, 1); //BMI055 ACC
px4_arch_gpiowrite(GPIO_SPI1_CS_PORTE_PIN15, 1); //BMI055 GYRO
px4_arch_gpiowrite(GPIO_SPI_CS_MPU9250, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_HMC5983, !selected);
px4_arch_gpiowrite(GPIO_SPI_CS_MS5611, 1);
@ -153,9 +153,9 @@ __EXPORT void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
case PX4_SPIDEV_MPU:
/* Making sure the other peripherals are not selected */
px4_arch_gpiowrite(GPIO_SPI_CS_BMI160, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_BMI055_ACC, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_BMI055_GYR, 1);
px4_arch_gpiowrite(GPIO_SPI1_CS_PORTC_PIN2, 1); //BMI160
px4_arch_gpiowrite(GPIO_SPI1_CS_PORTC_PIN15, 1); //BMI055 ACC
px4_arch_gpiowrite(GPIO_SPI1_CS_PORTE_PIN15, 1); //BMI055 GYRO
px4_arch_gpiowrite(GPIO_SPI_CS_MPU9250, !selected);
px4_arch_gpiowrite(GPIO_SPI_CS_HMC5983, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_MS5611, 1);
@ -168,9 +168,9 @@ __EXPORT void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
px4_arch_gpiowrite(GPIO_SPI_CS_HMC5983, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_MS5611, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_ICM_2060X, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_BMI055_ACC, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_BMI055_GYR, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_BMI160, !selected);
px4_arch_gpiowrite(GPIO_SPI1_CS_PORTC_PIN15, 1); //BMI055 ACC
px4_arch_gpiowrite(GPIO_SPI1_CS_PORTE_PIN15, 1); //BMI055 GYRO
px4_arch_gpiowrite(GPIO_SPI1_CS_PORTC_PIN2, !selected); //BMI160
break;
case PX4_SPIDEV_BMI055_ACC:
@ -179,9 +179,9 @@ __EXPORT void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
px4_arch_gpiowrite(GPIO_SPI_CS_HMC5983, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_MS5611, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_ICM_2060X, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_BMI160, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_BMI055_GYR, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_BMI055_ACC, !selected);
px4_arch_gpiowrite(GPIO_SPI1_CS_PORTC_PIN2, 1); //BMI160
px4_arch_gpiowrite(GPIO_SPI1_CS_PORTE_PIN15, 1); //BMI055 GYRO
px4_arch_gpiowrite(GPIO_SPI1_CS_PORTC_PIN15, !selected); //BMI055 ACC
break;
case PX4_SPIDEV_BMI055_GYR:
@ -190,9 +190,9 @@ __EXPORT void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
px4_arch_gpiowrite(GPIO_SPI_CS_HMC5983, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_MS5611, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_ICM_2060X, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_BMI160, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_BMI055_ACC, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_BMI055_GYR, !selected);
px4_arch_gpiowrite(GPIO_SPI1_CS_PORTC_PIN2, 1); //BMI160
px4_arch_gpiowrite(GPIO_SPI1_CS_PORTC_PIN15, 1); //BMI055 ACC
px4_arch_gpiowrite(GPIO_SPI1_CS_PORTE_PIN15, !selected); //BMI055 GYRO
break;
default:
@ -243,17 +243,17 @@ __EXPORT void board_spi_reset(int ms)
px4_arch_configgpio(GPIO_SPI_CS_OFF_HMC5983);
px4_arch_configgpio(GPIO_SPI_CS_OFF_MS5611);
px4_arch_configgpio(GPIO_SPI_CS_OFF_ICM_2060X);
px4_arch_configgpio(GPIO_SPI_CS_OFF_BMI160);
px4_arch_configgpio(GPIO_SPI_CS_OFF_BMI055_ACC);
px4_arch_configgpio(GPIO_SPI_CS_OFF_BMI055_GYR);
px4_arch_configgpio(GPIO_SPI_CS_OFF_BMI160); // BMI160
px4_arch_configgpio(GPIO_SPI_CS_OFF_BMI055_ACC); // BMI055 ACC
px4_arch_configgpio(GPIO_SPI_CS_OFF_BMI055_GYR); // BMI055 GYRO
px4_arch_gpiowrite(GPIO_SPI_CS_OFF_MPU9250, 0);
px4_arch_gpiowrite(GPIO_SPI_CS_OFF_HMC5983, 0);
px4_arch_gpiowrite(GPIO_SPI_CS_OFF_MS5611, 0);
px4_arch_gpiowrite(GPIO_SPI_CS_OFF_ICM_2060X, 0);
px4_arch_gpiowrite(GPIO_SPI_CS_OFF_BMI160, 0);
px4_arch_gpiowrite(GPIO_SPI_CS_OFF_BMI055_ACC, 0);
px4_arch_gpiowrite(GPIO_SPI_CS_OFF_BMI055_GYR, 0);
px4_arch_gpiowrite(GPIO_SPI_CS_OFF_BMI160, 0); // BMI160
px4_arch_gpiowrite(GPIO_SPI_CS_OFF_BMI055_ACC, 0); // BMI055 ACC
px4_arch_gpiowrite(GPIO_SPI_CS_OFF_BMI055_GYR, 0); // BMI055 GYRO
stm32_configgpio(GPIO_SPI1_SCK_OFF);
stm32_configgpio(GPIO_SPI1_MISO_OFF);
@ -293,9 +293,9 @@ __EXPORT void board_spi_reset(int ms)
px4_arch_configgpio(GPIO_SPI_CS_HMC5983);
px4_arch_configgpio(GPIO_SPI_CS_MS5611);
px4_arch_configgpio(GPIO_SPI_CS_ICM_2060X);
px4_arch_configgpio(GPIO_SPI_CS_BMI160);
px4_arch_configgpio(GPIO_SPI_CS_BMI055_ACC);
px4_arch_configgpio(GPIO_SPI_CS_BMI055_GYR);
px4_arch_configgpio(GPIO_SPI_CS_OFF_BMI160); // BMI160
px4_arch_configgpio(GPIO_SPI_CS_OFF_BMI055_ACC); // BMI055 ACC
px4_arch_configgpio(GPIO_SPI_CS_OFF_BMI055_GYR); // BMI055 GYRO
stm32_configgpio(GPIO_SPI1_SCK);
stm32_configgpio(GPIO_SPI1_MISO);