boards: Update modalai fcv2 board support (#21653)

* Removed obsolete voxl2-io directory
* Updated support for ModalAI FC v2 board
* Added UAVCAN back in and removed local position estimator and attitude estimator Q that are no longer supported.
* Removed unneeded IMU drivers
This commit is contained in:
Eric Katzfey 2023-06-05 09:42:46 -07:00 committed by GitHub
parent 5233b33242
commit c468266b27
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
18 changed files with 1920 additions and 745 deletions

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@ -14,10 +14,10 @@ CONFIG_COMMON_DIFFERENTIAL_PRESSURE=y
CONFIG_COMMON_DISTANCE_SENSOR=y
CONFIG_DRIVERS_DSHOT=y
CONFIG_DRIVERS_GPS=y
CONFIG_DRIVERS_IMU_BOSCH_BMI088=y
CONFIG_DRIVERS_IMU_INVENSENSE_ICM20602=y
CONFIG_DRIVERS_IMU_INVENSENSE_ICM20649=y
CONFIG_DRIVERS_IMU_INVENSENSE_ICM20948=y
# CONFIG_DRIVERS_IMU_BOSCH_BMI088=y
# CONFIG_DRIVERS_IMU_INVENSENSE_ICM20602=y
# CONFIG_DRIVERS_IMU_INVENSENSE_ICM20649=y
# CONFIG_DRIVERS_IMU_INVENSENSE_ICM20948=y
CONFIG_DRIVERS_IMU_INVENSENSE_ICM42688P=y
CONFIG_DRIVERS_IRLOCK=y
CONFIG_COMMON_LIGHT=y
@ -29,11 +29,13 @@ CONFIG_DRIVERS_POWER_MONITOR_INA226=y
CONFIG_DRIVERS_POWER_MONITOR_VOXLPM=y
CONFIG_DRIVERS_PWM_OUT=y
CONFIG_DRIVERS_RC_INPUT=y
CONFIG_DRIVERS_RPM=y
CONFIG_COMMON_TELEMETRY=y
CONFIG_DRIVERS_UAVCAN=y
CONFIG_BOARD_UAVCAN_INTERFACES=1
CONFIG_BOARD_UAVCAN_TIMER_OVERRIDE=2
CONFIG_MODULES_AIRSPEED_SELECTOR=y
# CONFIG_MODULES_ATTITUDE_ESTIMATOR_Q=y
CONFIG_MODULES_CAMERA_FEEDBACK=y
CONFIG_MODULES_COMMANDER=y
CONFIG_MODULES_CONTROL_ALLOCATOR=y
@ -52,6 +54,7 @@ CONFIG_MODULES_GYRO_FFT=y
CONFIG_MODULES_LAND_DETECTOR=y
CONFIG_MODULES_LANDING_TARGET_ESTIMATOR=y
CONFIG_MODULES_LOAD_MON=y
# CONFIG_MODULES_LOCAL_POSITION_ESTIMATOR=y
CONFIG_MODULES_LOGGER=y
CONFIG_MODULES_MAG_BIAS_ESTIMATOR=y
CONFIG_MODULES_MANUAL_CONTROL=y
@ -70,6 +73,7 @@ CONFIG_MODULES_TEMPERATURE_COMPENSATION=y
CONFIG_MODULES_UXRCE_DDS_CLIENT=y
CONFIG_MODULES_VTOL_ATT_CONTROL=y
CONFIG_SYSTEMCMDS_ACTUATOR_TEST=y
CONFIG_SYSTEMCMDS_BL_UPDATE=y
CONFIG_SYSTEMCMDS_BSONDUMP=y
CONFIG_SYSTEMCMDS_DMESG=y
CONFIG_SYSTEMCMDS_GPIO=y

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@ -20,8 +20,8 @@ icm42688p -s -b 1 -R 12 start
# Internal SPI2 ICM-42688
icm42688p -s -b 2 -R 12 start
# Internal I2C mag
bmm150 -I start
# Don't start Internal I2C mag
# bmm150 -I start
# Internal I2C baro
icp201xx -I start

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@ -68,4 +68,18 @@ else()
nuttx_drivers # sdio
px4_layer
)
set(COMMON_MODALAI_SRC_DIR ${PX4_SOURCE_DIR}/boards/modalai/src)
set(MODALAI_SYSTEMCMD_SRC_DIR ${COMMON_MODALAI_SRC_DIR}/systemcmds/modalai)
px4_add_module(
MODULE systemcmds__modalai
MAIN modalai
COMPILE_FLAGS
SRCS
${MODALAI_SYSTEMCMD_SRC_DIR}/modalai_fc-v2.c
${MODALAI_SYSTEMCMD_SRC_DIR}/modalai_fc-v1.c
${MODALAI_SYSTEMCMD_SRC_DIR}/modalai.c
DEPENDS
)
endif()

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@ -91,6 +91,12 @@
# define GPIO_nLED_GREEN /* PE4 */ (GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN4)
# define GPIO_nLED_BLUE /* PE5 */ (GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN5)
// GPIO_nLED_2_RED/ GPIO_nLED_2_GREEN /GPIO_nLED_2_BLUE are for v1 LED tests
# define GPIO_nLED_2_RED /* PI0 */ (GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTI|GPIO_PIN0)
# define GPIO_nLED_2_GREEN /* PH11 */ (GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTH|GPIO_PIN11)
# define GPIO_nLED_2_BLUE /* PA2 */ (GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTA|GPIO_PIN2)
# define BOARD_HAS_CONTROL_STATUS_LEDS 1
# define BOARD_OVERLOAD_LED LED_RED
# define BOARD_ARMED_STATE_LED LED_BLUE
@ -208,6 +214,12 @@
#define CAN1_SILENT /* PD15 */ (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTD|GPIO_PIN15)
/* For primary/backup signaling with VOXL, 2 pins on J4 are exposed */
// GPIO_VOXL_STATUS_OUT/ GPIO_VOXL_STATUS_IN are for v1 Spare MSS Communications Interface and J4 tests
#define GPIO_VOXL_STATUS_OUT /* PE4 */ (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTE|GPIO_PIN4)
#define GPIO_VOXL_STATUS_IN /* PE3 */ (GPIO_INPUT|GPIO_FLOAT|GPIO_PORTE|GPIO_PIN3)
/* Define True logic Power Control in arch agnostic form */
#define VDD_3V3_SPEKTRUM_POWER_EN(on_true) px4_arch_gpiowrite(GPIO_VDD_3V3_SPEKTRUM_POWER_EN, (on_true))
@ -338,8 +350,8 @@
#define BOARD_NUM_IO_TIMERS 5
// J1 / TELEM1 / USART7
#define MODAL_IO_DEFAULT_PORT "/dev/ttyS6"
// J5 USART5 TELEM2 Port next to PWM connector
#define MODAL_IO_DEFAULT_PORT "/dev/ttyS4"
__BEGIN_DECLS

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@ -0,0 +1,131 @@
#include <px4_platform_common/module.h>
#include "chip.h"
#include "stm32_gpio.h"
#include "board_config.h"
#include <nuttx/board.h>
#include <arch/board/board.h>
// v2
#ifdef CONFIG_ARCH_CHIP_STM32H753II // chip on M0087
#include "modalai_fc-v2.h"
#define MODALAI_FC_V2 1
#else
#include "modalai_fc-v1.h"
#endif
__EXPORT int modalai_main(int argc, char *argv[]);
int modalai_main(int argc, char *argv[])
{
int hw_rev = board_get_hw_revision();
int hw_ver = board_get_hw_version();
eHW_TYPE hw_type = eHwNone;
#ifdef MODALAI_FC_V2
if (hw_rev == 0 && hw_ver == 3) { // (should be hw_rev == 1 && hw_ver == 3) eventually...
hw_type = eM0087;
} else if (hw_rev == 0 && hw_ver == 3) {
hw_type = eM0079;
} else {
return -1;
}
#else
if (hw_rev == 6 && hw_ver == 0) {
hw_type = eM0018;
} else if (hw_rev == 0 && hw_ver == 1) {
hw_type = eM0019;
} else if (hw_rev == 0 && hw_ver == 2) {
hw_type = eM0051;
} else {
return -1;
}
#endif
if (argc <= 1) {
#ifdef MODALAI_FC_V2
modalai_print_usage_v2();
#else
modalai_print_usage_v1();
#endif
return 1;
}
if (!strcmp(argv[1], "led")) {
#ifdef MODALAI_FC_V2
return modalai_led_test_v2();
#else
return modalai_led_test_v1();
#endif
} else if (!strcmp(argv[1], "con")) {
if (argc <= 2) {
PRINT_MODULE_USAGE_COMMAND("con");
PRINT_MODULE_USAGE_ARG("<1,4,5,6,7,9,10,12,13>", "Connector ID", false);
PRINT_MODULE_USAGE_ARG("<uint>", "Pin Number", false);
PRINT_MODULE_USAGE_ARG("0 | 1", "<output state> (defaults to 0)", false);
return 1;
}
uint8_t con = 0;
uint8_t pin = 0;
bool state = false;
if (argc > 2) {
con = atoi(argv[2]);
}
if (argc > 3) {
pin = atoi(argv[3]);
}
if (argc > 4) {
state = atoi(argv[4]);
}
#ifdef MODALAI_FC_V2
return modalai_con_gpio_test_v2(con, pin, state);
#else
return modalai_con_gpio_test_v1(con, pin, state);
#endif
} else if (!strcmp(argv[1], "buzz")) {
#ifdef MODALAI_FC_V2
return modalai_buzz_test_v2(hw_type);
#else
return modalai_buzz_test_v1(hw_type);
#endif
} else if (!strcmp(argv[1], "detect")) {
#ifdef MODALAI_FC_V2
modalai_hw_detect_v2(hw_type);
#else
modalai_hw_detect_v1(hw_type);
#endif
return 0;
}
#ifdef MODALAI_FC_V2
modalai_print_usage_v2();
#else
modalai_print_usage_v1();
#endif
return -EINVAL;
}

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@ -0,0 +1,913 @@
#include <px4_platform_common/module.h>
#include "chip.h"
#include "stm32_gpio.h"
#include "board_config.h"
#include <nuttx/board.h>
#include <arch/board/board.h>
// v1
#ifndef CONFIG_ARCH_CHIP_STM32H743ZI
#include "modalai_fc-v1.h"
void modalai_print_usage_v1(void)
{
PRINT_MODULE_DESCRIPTION("ModalAI Test utility\n");
PRINT_MODULE_USAGE_NAME_SIMPLE("modalai", "command");
PRINT_MODULE_USAGE_COMMAND_DESCR("led", "LED Test");
PRINT_MODULE_USAGE_COMMAND_DESCR("con", "Connector Output Test (as GPIO)");
PRINT_MODULE_USAGE_COMMAND_DESCR("buzz", "Automated buzz out test");
PRINT_MODULE_USAGE_COMMAND_DESCR("detect", "Detect board type");
}
void modalai_print_usage_con_gpio_test_v1(void)
{
PRINT_MODULE_USAGE_NAME_SIMPLE("modalai con", "command");
PRINT_MODULE_USAGE_COMMAND_DESCR("1", "W<3,6> R<2,6>, <0-1>");
PRINT_MODULE_USAGE_COMMAND_DESCR("4", "W<2-4,6-7> R<8>, <0-1>");
PRINT_MODULE_USAGE_COMMAND_DESCR("5", "W<2-5>, <0-1>");
PRINT_MODULE_USAGE_COMMAND_DESCR("6", "W<2-5>, <0-1>");
PRINT_MODULE_USAGE_COMMAND_DESCR("7", "W<2-9>, <0-1>");
PRINT_MODULE_USAGE_COMMAND_DESCR("9", "R<2>");
PRINT_MODULE_USAGE_COMMAND_DESCR("10", "W<2-5>, <0-1>");
PRINT_MODULE_USAGE_COMMAND_DESCR("12", "W<1-3>, <0-1>");
PRINT_MODULE_USAGE_COMMAND_DESCR("13", "W<3-5>, <0-1>");
}
int modalai_led_test_v1(void)
{
PX4_INFO("Running led test");
stm32_configgpio(GPIO_nLED_RED);
stm32_configgpio(GPIO_nLED_GREEN);
stm32_configgpio(GPIO_nLED_BLUE);
int i = 0;
stm32_configgpio(GPIO_nLED_2_RED);
stm32_configgpio(GPIO_nLED_2_GREEN);
stm32_configgpio(GPIO_nLED_2_BLUE);
for (i = 0; i < 3; i++) {
usleep(1000 * 100);
stm32_gpiowrite(GPIO_nLED_RED, false);
stm32_gpiowrite(GPIO_nLED_2_RED, false);
usleep(1000 * 100);
stm32_gpiowrite(GPIO_nLED_RED, true);
stm32_gpiowrite(GPIO_nLED_2_RED, true);
usleep(1000 * 100);
stm32_gpiowrite(GPIO_nLED_GREEN, false);
stm32_gpiowrite(GPIO_nLED_2_GREEN, false);
usleep(1000 * 100);
stm32_gpiowrite(GPIO_nLED_GREEN, true);
stm32_gpiowrite(GPIO_nLED_2_GREEN, true);
usleep(1000 * 100);
stm32_gpiowrite(GPIO_nLED_BLUE, false);
stm32_gpiowrite(GPIO_nLED_2_BLUE, false);
usleep(1000 * 100);
stm32_gpiowrite(GPIO_nLED_BLUE, true);
stm32_gpiowrite(GPIO_nLED_2_BLUE, true);
}
return OK;
}
int modalai_con_gpio_test_v1(uint8_t con, uint8_t pin, bool state)
{
// validate
switch (con) {
// Primary MSS Communications Interface
case 1:
switch (pin) {
case 2:
stm32_configgpio(J1_PIN2_IN);
state = stm32_gpioread(J1_PIN2_IN);
break;
case 3:
stm32_configgpio(J1_PIN3);
stm32_gpiowrite(J1_PIN3, state);
break;
case 4:
stm32_configgpio(J1_PIN4);
stm32_gpiowrite(J1_PIN4, state);
break;
case 6:
stm32_configgpio(J1_PIN6_IN);
state = stm32_gpioread(J1_PIN6_IN);
break;
default:
modalai_print_usage_con_gpio_test_v1();
return -1;
}
break;
// STM JTAG Programming Header
case 2:
modalai_print_usage_con_gpio_test_v1();
return -1;
// USB 2.0 Full-Speed Downstream Device Port
case 3:
modalai_print_usage_con_gpio_test_v1();
return -1;
// Spare MSS Communications Interface
case 4:
switch (pin) {
case 2:
stm32_configgpio(J4_PIN2);
stm32_gpiowrite(J4_PIN2, state);
break;
case 3:
stm32_configgpio(J4_PIN3);
stm32_gpiowrite(J4_PIN3, state);
break;
case 4:
stm32_configgpio(J4_PIN4);
stm32_gpiowrite(J4_PIN4, state);
break;
case 6:
stm32_configgpio(J4_PIN6);
stm32_gpiowrite(J4_PIN6, state);
break;
case 7:
stm32_configgpio(J4_PIN7);
stm32_gpiowrite(J4_PIN7, state);
break;
case 8:
stm32_configgpio(J4_PIN8);
state = stm32_gpioread(J4_PIN8);
break;
default:
modalai_print_usage_con_gpio_test_v1();
return -1;
}
break;
// TELEMETRY CONNECTOR
case 5:
switch (pin) {
case 2:
stm32_configgpio(J5_PIN2);
stm32_gpiowrite(J5_PIN2, state);
break;
case 3:
stm32_configgpio(J5_PIN3);
stm32_gpiowrite(J5_PIN3, state);
break;
case 4:
stm32_configgpio(J5_PIN4);
stm32_gpiowrite(J5_PIN4, state);
break;
case 5:
stm32_configgpio(J5_PIN5);
stm32_gpiowrite(J5_PIN5, state);
break;
default:
modalai_print_usage_con_gpio_test_v1();
return -1;
}
break;
// EXPANSION CONNECTOR
case 6:
switch (pin) {
case 2:
stm32_configgpio(J6_PIN2);
stm32_gpiowrite(J6_PIN2, state);
break;
case 3:
stm32_configgpio(J6_PIN3);
stm32_gpiowrite(J6_PIN3, state);
break;
case 4:
stm32_configgpio(J6_PIN4);
stm32_gpiowrite(J6_PIN4, state);
break;
case 5:
stm32_configgpio(J6_PIN5);
stm32_gpiowrite(J6_PIN5, state);
break;
default:
modalai_print_usage_con_gpio_test_v1();
return -1;
}
break;
// PWM Output Connector
case 7:
switch (pin) {
case 2:
stm32_configgpio(J7_PIN2);
stm32_gpiowrite(J7_PIN2, state);
break;
case 3:
stm32_configgpio(J7_PIN3);
stm32_gpiowrite(J7_PIN3, state);
break;
case 4:
stm32_configgpio(J7_PIN4);
stm32_gpiowrite(J7_PIN4, state);
break;
case 5:
stm32_configgpio(J7_PIN5);
stm32_gpiowrite(J7_PIN5, state);
break;
case 6:
stm32_configgpio(J7_PIN6);
stm32_gpiowrite(J7_PIN6, state);
break;
case 7:
stm32_configgpio(J7_PIN7);
stm32_gpiowrite(J7_PIN7, state);
break;
case 8:
stm32_configgpio(J7_PIN8);
stm32_gpiowrite(J7_PIN8, state);
break;
case 9:
stm32_configgpio(J7_PIN9);
stm32_gpiowrite(J7_PIN9, state);
break;
default:
modalai_print_usage_con_gpio_test_v1();
return -1;
}
break;
// CAN 1 Peripheral Connector
case 8:
modalai_print_usage_con_gpio_test_v1();
return -1;
// PPM (RC) IN
case 9:
switch (pin) {
case 2:
stm32_configgpio(J9_PIN2_IN);
state = stm32_gpioread(J9_PIN2_IN);
break;
default:
modalai_print_usage_con_gpio_test_v1();
return -1;
}
break;
// GPS CONNECTOR
case 10:
switch (pin) {
case 2:
stm32_configgpio(J10_PIN2);
stm32_gpiowrite(J10_PIN2, state);
break;
case 3:
stm32_configgpio(J10_PIN3);
stm32_gpiowrite(J10_PIN3, state);
break;
case 4:
stm32_configgpio(J10_PIN4);
stm32_gpiowrite(J10_PIN4, state);
break;
case 5:
stm32_configgpio(J10_PIN5);
stm32_gpiowrite(J10_PIN5, state);
break;
default:
modalai_print_usage_con_gpio_test_v1();
return -1;
}
break;
// Micro SD Card Slot
case 11:
modalai_print_usage_con_gpio_test_v1();
return -1;
// Spektrum RC Input Connector
case 12:
switch (pin) {
case 1:
VDD_3V3_SPEKTRUM_POWER_EN(state);
break;
case 2:
__asm("nop");
stm32_configgpio(J12_PIN2);
stm32_gpiowrite(J12_PIN2, state);
//state = stm32_gpioread(J12_PIN2);
__asm("nop");
break;
case 3:
stm32_configgpio(J12_PIN3);
stm32_gpiowrite(J12_PIN3, state);
break;
default:
modalai_print_usage_con_gpio_test_v1();
return -1;
}
break;
// I2C DISPLAY / SPARE SENSOR CONNECTOR
case 13:
switch (pin) {
case 3:
stm32_configgpio(J13_PIN3);
stm32_gpiowrite(J13_PIN3, state);
break;
case 4:
stm32_configgpio(J13_PIN4);
stm32_gpiowrite(J13_PIN4, state);
break;
case 5:
stm32_configgpio(J13_PIN5);
stm32_gpiowrite(J13_PIN5, state);
break;
default:
modalai_print_usage_con_gpio_test_v1();
return -1;
}
break;
}
printf("GPIO - Con: %d, Pin: %d, State: %d\n", con, pin, state);
return OK;
}
bool test_pair(uint32_t output_pin, uint32_t input_pin)
{
bool state = false;
stm32_gpiowrite(output_pin, true);
usleep(1000 * 10);
state = stm32_gpioread(input_pin);
if (state != true) {
return false;
}
usleep(1000 * 10);
stm32_gpiowrite(output_pin, false);
usleep(1000 * 10);
state = stm32_gpioread(input_pin);
if (state != false) {
return false;
}
return true;
}
bool modalai_test_pair(uint32_t output_pin, uint32_t input_pin)
{
bool state = false;
stm32_gpiowrite(output_pin, true);
usleep(1000 * 10);
state = stm32_gpioread(input_pin);
if (state != true) {
return false;
}
usleep(1000 * 10);
stm32_gpiowrite(output_pin, false);
usleep(1000 * 10);
state = stm32_gpioread(input_pin);
if (state != false) {
return false;
}
return true;
}
int modalai_buzz_test_v1(eHW_TYPE hw_type)
{
PX4_INFO("test: buzz");
usleep(1000 * 100 * 10);
if (hw_type == eM0018) {
PX4_INFO("Using Flight Core Config");
} else if (hw_type == eM0019) {
PX4_INFO("Using VOXL-Flight Config");
} else if (hw_type == eM0051) {
PX4_INFO("Using M0051 Config");
} else {
return -1;
}
if (hw_type == eM0018) {
PX4_INFO(">> Testing J1");
stm32_configgpio(J1_PIN2_IN); // 2 [in] to 4 [out]
stm32_configgpio(J1_PIN3); // 3 [out] to 6 [in]
stm32_configgpio(J1_PIN4); // 4 [out] to 2 [in]
stm32_configgpio(J1_PIN6_IN); // 6 [in] to 3 [out]
if (test_pair(J1_PIN4, J1_PIN2_IN)) {
PX4_INFO("PASS: J1P4-J1P2");
} else {
PX4_ERR("FAIL: J1P4-J1P2 ----------------------------------------");
}
if (test_pair(J1_PIN3, J1_PIN6_IN)) {
PX4_INFO("PASS: J1P3-J1P6");
} else {
PX4_ERR("FAIL: J1P3-J1P6 ----------------------------------------");
}
} else if (hw_type == eM0019) {
// NA on VOXL-Flight (internally routed)
}
if (hw_type == eM0018) {
PX4_INFO(">> Testing J4");
stm32_configgpio(J4_PIN2); // 2 [out] 6 [in]
stm32_configgpio(J4_PIN3); // 3 [out] 7 [in]
stm32_configgpio(J4_PIN4); // 4 [out] 8 [in]
stm32_configgpio(J4_PIN6_IN); // 2 [out] 6 [in]
stm32_configgpio(J4_PIN7_IN); // 3 [out] 7 [in]
stm32_configgpio(J4_PIN8_IN); // 4 [out] 8 [in]
if (test_pair(J4_PIN2, J4_PIN6_IN)) {
PX4_INFO("PASS: J4P2-J4P6");
} else {
PX4_ERR("FAIL: J4P2-J4P6 ----------------------------------------");
}
if (test_pair(J4_PIN3, J4_PIN7_IN)) {
PX4_INFO("PASS: J4P3-J4P7");
} else {
PX4_ERR("FAIL: J4P3-J4P7 ----------------------------------------");
}
if (test_pair(J4_PIN4, J4_PIN8_IN)) {
PX4_INFO("PASS: J4P4-J4P8");
} else {
PX4_ERR("FAIL: J4P4-J4P8 ----------------------------------------");
}
} else if (hw_type == eM0019) {
PX4_INFO(">> Testing J1002");
stm32_configgpio(J1002_PIN2); // 2 [out] 4 [in]
stm32_configgpio(J1002_PIN3); // 3 [out] 6 [in]
stm32_configgpio(J1002_PIN4_IN); // 2 [out] 4 [in]
stm32_configgpio(J1002_PIN6_IN); // 3 [out] 6 [in]
if (test_pair(J1002_PIN2, J1002_PIN4_IN)) {
PX4_INFO("PASS: J1002P2-J1002P4");
} else {
PX4_ERR("FAIL: J1002P2-J1002P4 ----------------------------------------");
}
if (test_pair(J1002_PIN3, J1002_PIN6_IN)) {
PX4_INFO("PASS: J1002P3-J1002P6");
} else {
PX4_ERR("FAIL: J1002P3-J1002P6 ----------------------------------------");
}
}
if (hw_type == eM0018) {
PX4_INFO(">> Testing J5");
stm32_configgpio(J5_PIN2); // 2 [out] 4 [in]
stm32_configgpio(J5_PIN3); // 3 [out] 5 [in]
stm32_configgpio(J5_PIN4_IN); // 4 [in] 2 [out]
stm32_configgpio(J5_PIN5_IN); // 5 [in] 3 [out]
if (test_pair(J5_PIN2, J5_PIN4_IN)) {
PX4_INFO("PASS: J5P2-J5P4");
} else {
PX4_ERR("FAIL: J5P2-J5P4 ----------------------------------------");
}
if (test_pair(J5_PIN3, J5_PIN5_IN)) {
PX4_INFO("PASS: J5P3-J5P5");
} else {
PX4_ERR("FAIL: J5P3-J5P5 ----------------------------------------");
}
} else if (hw_type == eM0019) {
PX4_INFO(">> Testing J1010");
stm32_configgpio(J1010_PIN2); // 2 [out] 4 [in]
stm32_configgpio(J1010_PIN3); // 3 [out] 5 [in]
stm32_configgpio(J1010_PIN4_IN); // 4 [in] 2 [out]
stm32_configgpio(J1010_PIN5_IN); // 5 [in] 3 [out]
if (test_pair(J1010_PIN2, J1010_PIN4_IN)) {
PX4_INFO("PASS: J1010P2-J1010P4");
} else {
PX4_ERR("FAIL: J1010P2-J1010P4 ----------------------------------------");
}
if (test_pair(J1010_PIN3, J1010_PIN5_IN)) {
PX4_INFO("PASS: J1010P3-J1010P5");
} else {
PX4_ERR("FAIL: J1010P3-J1010P5 ----------------------------------------");
}
}
if (hw_type == eM0018) {
PX4_INFO(">> Testing J6");
stm32_configgpio(J6_PIN2); // 2 [out] 4 [in]
stm32_configgpio(J6_PIN3); // 3 [out] 5 [in]
stm32_configgpio(J6_PIN4_IN); // 4 [in] 2 [out]
stm32_configgpio(J6_PIN5_IN); // 5 [in] 3 [out]
if (test_pair(J6_PIN2, J6_PIN4_IN)) {
PX4_INFO("PASS: J6P2-J6P4");
} else {
PX4_ERR("FAIL: J6P2-J6P4 ----------------------------------------");
}
if (test_pair(J6_PIN3, J6_PIN5_IN)) {
PX4_INFO("PASS: J6P3-J6P5");
} else {
PX4_ERR("FAIL: J6P3-J6P5 ----------------------------------------");
}
} else if (hw_type == eM0019) {
PX4_INFO(">> Testing J1009");
stm32_configgpio(J1009_PIN2); // 2 [out] 4 [in]
stm32_configgpio(J1009_PIN3); // 3 [out] 5 [in]
stm32_configgpio(J1009_PIN4_IN); // 4 [in] 2 [out]
stm32_configgpio(J1009_PIN5_IN); // 5 [in] 3 [out]
if (test_pair(J1009_PIN2, J1009_PIN4_IN)) {
PX4_INFO("PASS: J1009P2-J1009P4");
} else {
PX4_ERR("FAIL: J1009P2-J1009P4 ----------------------------------------");
}
if (test_pair(J1009_PIN3, J1009_PIN5_IN)) {
PX4_INFO("PASS: J1009P3-J1009P5");
} else {
PX4_ERR("FAIL: J1009P3-J1009P5 ----------------------------------------");
}
}
if (hw_type == eM0018) {
PX4_INFO(">> Testing J7");
stm32_configgpio(J7_PIN2); // 2 [out] 6 [in]
stm32_configgpio(J7_PIN3); // 3 [out] 7 [in]
stm32_configgpio(J7_PIN4); // 4 [out] 8 [in]
stm32_configgpio(J7_PIN5); // 5 [out] 9 [in]
stm32_configgpio(J7_PIN6_IN); // 6 [in] 2 [out]
stm32_configgpio(J7_PIN7_IN); // 7 [in] 3 [out]
stm32_configgpio(J7_PIN8_IN); // 8 [in] 4 [out]
stm32_configgpio(J7_PIN9_IN); // 9 [in] 5 [out]
if (test_pair(J7_PIN2, J7_PIN6_IN)) {
PX4_INFO("PASS: J7P2-J7P6");
} else {
PX4_ERR("FAIL: J7P2-J7P6 ----------------------------------------");
}
if (test_pair(J7_PIN3, J7_PIN7_IN)) {
PX4_INFO("PASS: J7P3-J7P7");
} else {
PX4_ERR("FAIL: J7P3-J7P7 ----------------------------------------");
}
if (test_pair(J7_PIN4, J7_PIN8_IN)) {
PX4_INFO("PASS: J7P4-J7P8");
} else {
PX4_ERR("FAIL: J7P4-J7P8 ----------------------------------------");
}
if (test_pair(J7_PIN5, J7_PIN9_IN)) {
PX4_INFO("PASS: J7P5-J7P9");
} else {
PX4_ERR("FAIL: J7P5-J7P9 ----------------------------------------");
}
} else if (hw_type == eM0019) {
PX4_INFO(">> Testing J1007");
stm32_configgpio(J1007_PIN2); // 2 [out] 6 [in]
stm32_configgpio(J1007_PIN3); // 3 [out] 7 [in]
stm32_configgpio(J1007_PIN4); // 4 [out] 8 [in]
stm32_configgpio(J1007_PIN5); // 5 [out] 9 [in]
stm32_configgpio(J1007_PIN6_IN); // 6 [in] 2 [out]
stm32_configgpio(J1007_PIN7_IN); // 7 [in] 3 [out]
stm32_configgpio(J1007_PIN8_IN); // 8 [in] 4 [out]
stm32_configgpio(J1007_PIN9_IN); // 9 [in] 5 [out]
if (test_pair(J1007_PIN2, J1007_PIN6_IN)) {
PX4_INFO("PASS: J1007P2-J1007P6");
} else {
PX4_ERR("FAIL: J1007P2-J1007P6 ----------------------------------------");
}
if (test_pair(J1007_PIN3, J1007_PIN7_IN)) {
PX4_INFO("PASS: J1007P3-J1007P7");
} else {
PX4_ERR("FAIL: J1007P3-J1007P7 ----------------------------------------");
}
if (test_pair(J1007_PIN4, J1007_PIN8_IN)) {
PX4_INFO("PASS: J1007P4-J1007P8");
} else {
PX4_ERR("FAIL: J1007P4-J1007P8 ----------------------------------------");
}
if (test_pair(J1007_PIN5, J1007_PIN9_IN)) {
PX4_INFO("PASS: J1007P5-J1007P9");
} else {
PX4_ERR("FAIL: J1007P5-J1007P9 ----------------------------------------");
}
} else if (hw_type == eM0051) {
PX4_INFO(">> Testing M0051 J13");
stm32_configgpio(M0051J13_PIN2); // 2 [out] 6 [in]
stm32_configgpio(M0051J13_PIN3); // 3 [out] 7 [in]
stm32_configgpio(M0051J13_PIN4); // 4 [out] 8 [in]
stm32_configgpio(M0051J13_PIN5); // 5 [out] 9 [in]
stm32_configgpio(M0051J13_PIN6_IN); // 6 [in] 2 [out]
stm32_configgpio(M0051J13_PIN7_IN); // 7 [in] 3 [out]
stm32_configgpio(M0051J13_PIN8_IN); // 8 [in] 4 [out]
stm32_configgpio(M0051J13_PIN9_IN); // 9 [in] 5 [out]
if (test_pair(M0051J13_PIN2, M0051J13_PIN6_IN)) {
PX4_INFO("PASS: J13_P2-J13_P6");
} else {
PX4_ERR("FAIL: J13_P2-J13_P6 ----------------------------------------");
}
if (test_pair(M0051J13_PIN3, M0051J13_PIN7_IN)) {
PX4_INFO("PASS: JJ13_P3-J13_P7");
} else {
PX4_ERR("FAIL: J13_P3-J13_7P7 ----------------------------------------");
}
if (test_pair(M0051J13_PIN4, M0051J13_PIN8_IN)) {
PX4_INFO("PASS: J13_P4-J13_P8");
} else {
PX4_ERR("FAIL: J13_P4-J13_P8 ----------------------------------------");
}
if (test_pair(M0051J13_PIN5, M0051J13_PIN9_IN)) {
PX4_INFO("PASS: J13_P5-J13_P9");
} else {
PX4_ERR("FAIL: J13_P5-J13_P9 ----------------------------------------");
}
}
if (hw_type == eM0018) {
PX4_INFO(">> Testing J10");
stm32_configgpio(J10_PIN2); // 2 [out] 4 [in]
stm32_configgpio(J10_PIN3); // 3 [out] 5 [in]
stm32_configgpio(J10_PIN4_IN); // 4 [in] 2 [out]
stm32_configgpio(J10_PIN5_IN); // 5 [in] 3 [out]
if (test_pair(J10_PIN2, J10_PIN4_IN)) {
PX4_INFO("PASS: J10P2-J10P4");
} else {
PX4_ERR("FAIL: J10P2-J10P4 --------------------------------------");
}
if (test_pair(J10_PIN3, J10_PIN5_IN)) {
PX4_INFO("PASS: J10P3-J10P5");
} else {
PX4_ERR("FAIL: J10P3-J10P5 --------------------------------------");
}
} else if (hw_type == eM0019) {
PX4_INFO(">> Testing J1012");
stm32_configgpio(J1012_PIN2); // 2 [out] 4 [in]
stm32_configgpio(J1012_PIN3); // 3 [out] 5 [in]
stm32_configgpio(J1012_PIN4_IN); // 4 [in] 2 [out]
stm32_configgpio(J1012_PIN5_IN); // 5 [in] 3 [out]
if (test_pair(J1012_PIN2, J1012_PIN4_IN)) {
PX4_INFO("PASS: J1012P2-J1120P4");
} else {
PX4_ERR("FAIL: J1012P2-J1012P4 --------------------------------------");
}
if (test_pair(J1012_PIN3, J1012_PIN5_IN)) {
PX4_INFO("PASS: J1012P3-J1012P5");
} else {
PX4_ERR("FAIL: J1012P3-J1012P5 --------------------------------------");
}
} else if (hw_type == eM0051) {
PX4_INFO(">> Testing M0051 J15");
stm32_configgpio(M0051J15_PIN2); // 2 [out] 4 [in]
stm32_configgpio(M0051J15_PIN3); // 3 [out] 5 [in]
stm32_configgpio(M0051J15_PIN4_IN); // 4 [in] 2 [out]
stm32_configgpio(M0051J15_PIN5_IN); // 5 [in] 3 [out]
if (test_pair(M0051J15_PIN2, M0051J15_PIN4_IN)) {
PX4_INFO("PASS: J15_P2-J15_P4");
} else {
PX4_ERR("FAIL: J15_P2-JJ15_P4 --------------------------------------");
}
if (test_pair(M0051J15_PIN3, M0051J15_PIN5_IN)) {
PX4_INFO("PASS: J15_P3-J15_P5");
} else {
PX4_ERR("FAIL: J15_P3-J15_P5 --------------------------------------");
}
}
if (hw_type == eM0018) {
PX4_INFO(">> Testing J9/J12/J13");
stm32_configgpio(J9_PIN2_IN); // J9-2 [in] J13-5 [out]
stm32_configgpio(J12_PIN2_IN); // J12-2 [in] J13-3 [out]
stm32_configgpio(J12_PIN3_IN); // J12-3 [in] J13-4 [out]
stm32_configgpio(J13_PIN3); // J13-3 [out] J12-2 [in]
stm32_configgpio(J13_PIN4); // J13-4 [out] J12-3 [in]
stm32_configgpio(J13_PIN5); // J13-5 [out] J9-2 [in]
if (test_pair(J13_PIN3, J12_PIN2_IN)) {
PX4_INFO("PASS: J13P3-J12P2");
} else {
PX4_ERR("FAIL: J13P3-J12P2 --------------------------------------");
}
if (test_pair(J13_PIN4, J12_PIN3_IN)) {
PX4_INFO("PASS: J13P4-J12P3");
} else {
PX4_ERR("FAIL: J13P4-J12P3 --------------------------------------");
}
if (test_pair(J13_PIN5, J9_PIN2_IN)) {
PX4_INFO("PASS: J13P5-J9P2");
} else {
PX4_ERR("FAIL: J13P5-J9P2 --------------------------------------");
}
} else if (hw_type == eM0019) {
PX4_INFO(">> Testing J1003/J1004/J1011");
stm32_configgpio(J1003_PIN2_IN); // J1003-2 [in] J13-5 [out]
stm32_configgpio(J1004_PIN2_IN); // J1004-2 [in] J13-3 [out]
stm32_configgpio(J1004_PIN3_IN); // J1004-3 [in] J13-4 [out]
stm32_configgpio(J1011_PIN3); // J1011-3 [out] J12-2 [in]
stm32_configgpio(J1011_PIN4); // J1011-4 [out] J12-3 [in]
stm32_configgpio(J1011_PIN5); // J1011-5 [out] J9-2 [in]
if (test_pair(J1011_PIN3, J1004_PIN2_IN)) {
PX4_INFO("PASS: J1011P3-J1004P2");
} else {
PX4_ERR("FAIL: J1011P3-J1004P2 --------------------------------------");
}
if (test_pair(J1011_PIN4, J1004_PIN3_IN)) {
PX4_INFO("PASS: J1011P4-J1004P3");
} else {
PX4_ERR("FAIL: J1011P4-J1004P3 --------------------------------------");
}
if (test_pair(J1011_PIN5, J1003_PIN2_IN)) {
PX4_INFO("PASS: J1011P5-J1011P5");
} else {
PX4_ERR("FAIL: J1011P5-J1011P5 --------------------------------------");
}
} else if (hw_type == eM0051) {
PX4_INFO(">> Testing M0051 J14");
stm32_configgpio(M0051J14_PIN2); // J14-2 [out] J14-3 [in]
stm32_configgpio(M0051J14_PIN3_IN); // J14-3 [in] J14-2 [out]
if (test_pair(M0051J14_PIN2, M0051J14_PIN3_IN)) {
PX4_INFO("PASS: J14_P2-J14_P3");
} else {
PX4_ERR("FAIL: J14_P2-J14_P3 --------------------------------------");
}
}
return 0;
}
int modalai_hw_detect_v1(eHW_TYPE hw_type)
{
int result = 0;
if (hw_type == eM0018) {
PX4_INFO("V106 - Flight Core");
} else if (hw_type == eM0019) {
PX4_INFO("V110 - VOXL-Flight");
} else if (hw_type == eM0051) {
PX4_INFO("V120 - M0051");
} else {
PX4_ERR("Unknown hardware");
result = -1;
}
return result;
}
#endif //CONFIG_ARCH_CHIP_STM32H743ZI

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#ifndef MODALAI_FC_V1_H_
#define MODALAI_FC_V1_H_
typedef enum {
eHwUnknown = -1,
eHwNone = 0,
eM0018, // Flight Core
eM0019, // VOXL Flight
eM0051
} eHW_TYPE;
#define _MK_GPIO_INPUT(def) (((def) & (GPIO_PORT_MASK | GPIO_PIN_MASK)) | (GPIO_INPUT|GPIO_PULLUP))
#define _MK_GPIO_OUTPUT(def) (((def) & (GPIO_PORT_MASK | GPIO_PIN_MASK)) | (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR))
//
// Flight Core - J1 - Primary MSS Communications Interface
// VOXL Flight - NA
//
#define J1_PIN2_IN _MK_GPIO_INPUT(GPIO_UART5_RX)
#define J1_PIN3 _MK_GPIO_OUTPUT(GPIO_UART5_TX)
#define J1_PIN4 _MK_GPIO_OUTPUT(GPIO_UART5_RTS)
#define J1_PIN6_IN _MK_GPIO_INPUT(GPIO_UART5_CTS)
//
// STM JTAG Programming Header
// Flight Core - J2
// VOXL Flight - J1001
//
//
// USB 2.0 Full-Speed Downstream Device Port
// Flight Core - J
// VOXL Flight - J1006
//
//
// Spare MSS Comms
// Flight Core - J4
// VOXL Flight - J1002
//
#define J4_PIN2 _MK_GPIO_OUTPUT(GPIO_USART2_RX)
#define J1002_PIN2 J4_PIN2
#define J4_PIN3 _MK_GPIO_OUTPUT(GPIO_USART2_TX)
#define J1002_PIN3 J4_PIN3
#define J4_PIN4 _MK_GPIO_OUTPUT(GPIO_USART2_RTS)
#define J1002_PIN4 J4_PIN4
#define J4_PIN4_IN _MK_GPIO_INPUT(GPIO_USART2_RTS)
#define J1002_PIN4_IN J4_PIN4_IN
#define J4_PIN6 _MK_GPIO_OUTPUT(GPIO_USART2_CTS)
#define J4_PIN6_IN _MK_GPIO_INPUT(GPIO_USART2_CTS)
#define J1002_PIN6_IN J4_PIN6_IN
#define J4_PIN7 _MK_GPIO_OUTPUT(GPIO_VOXL_STATUS_OUT)
#define J4_PIN7_IN _MK_GPIO_INPUT(GPIO_VOXL_STATUS_OUT)
#define J4_PIN8 _MK_GPIO_OUTPUT(GPIO_VOXL_STATUS_IN)
#define J4_PIN8_IN _MK_GPIO_INPUT(GPIO_VOXL_STATUS_IN)
//
// TELEMETRY CONNECTOR
// Flight Core - J5
// VOXL Flight - J1010
//
#define J5_PIN2 _MK_GPIO_OUTPUT(GPIO_UART7_TX)
#define J1010_PIN2 J5_PIN2
#define J5_PIN3 _MK_GPIO_OUTPUT(GPIO_UART7_RX)
#define J1010_PIN3 J5_PIN3
#define J5_PIN4 _MK_GPIO_OUTPUT(GPIO_UART7_CTS)
#define J1010_PIN4 J5_PIN4
#define J5_PIN4_IN _MK_GPIO_INPUT(GPIO_UART7_CTS)
#define J1010_PIN4_IN J5_PIN4_IN
#define J5_PIN5 _MK_GPIO_OUTPUT(GPIO_UART7_RTS)
#define J1010_PIN5 J5_PIN5
#define J5_PIN5_IN _MK_GPIO_INPUT(GPIO_UART7_RTS)
#define J1010_PIN5_IN J5_PIN5_IN
//
// EXPANSION CONNECTOR
// Flight Core - J6
// VOXL Flight - J1009
//
#define J6_PIN2 _MK_GPIO_OUTPUT(GPIO_UART4_TX_5)
#define J1009_PIN2 J6_PIN2
#define J6_PIN3 _MK_GPIO_OUTPUT(GPIO_UART4_RX_5)
#define J1009_PIN3 J6_PIN3
#define J6_PIN4 _MK_GPIO_OUTPUT(GPIO_I2C3_SCL_2)
#define J1009_PIN4 J6_PIN4
#define J6_PIN4_IN _MK_GPIO_INPUT(GPIO_I2C3_SCL_2)
#define J1009_PIN4_IN J6_PIN4_IN
#define J6_PIN5 _MK_GPIO_OUTPUT(GPIO_I2C3_SDA_2)
#define J1009_PIN5 J6_PIN5
#define J6_PIN5_IN _MK_GPIO_INPUT(GPIO_I2C3_SDA_2)
#define J1009_PIN5_IN J6_PIN5_IN
//
// Flight Core - J7 - PWM Output Connector
// VOXL Flight - J1007
// M0051 - J13
//
#define J7_PIN2 _MK_GPIO_OUTPUT(GPIO_TIM1_CH4OUT_2)
#define J1007_PIN2 J7_PIN2
#define M0051J13_PIN2 J7_PIN2
#define J7_PIN3 _MK_GPIO_OUTPUT(GPIO_TIM1_CH3OUT_1)
#define J1007_PIN3 J7_PIN3
#define M0051J13_PIN3 J7_PIN3
#define J7_PIN4 _MK_GPIO_OUTPUT(GPIO_TIM1_CH2OUT_2)
#define J1007_PIN4 J7_PIN4
#define M0051J13_PIN4 J7_PIN4
#define J7_PIN5 _MK_GPIO_OUTPUT(GPIO_TIM1_CH1OUT_1)
#define J1007_PIN5 J7_PIN5
#define M0051J13_PIN5 J7_PIN5
#define J7_PIN6 _MK_GPIO_OUTPUT(GPIO_TIM4_CH2OUT_2)
#define J1007_PIN6 J7_PIN6
#define M0051J13_PIN6 J7_PIN6
#define J7_PIN6_IN _MK_GPIO_INPUT(GPIO_TIM4_CH2OUT_2)
#define J1007_PIN6_IN J7_PIN6_IN
#define M0051J13_PIN6_IN J7_PIN6_IN
#define J7_PIN7 _MK_GPIO_OUTPUT(GPIO_TIM4_CH3OUT_2)
#define J1007_PIN7 J7_PIN7
#define M0051J13_PIN7 J7_PIN7
#define J7_PIN7_IN _MK_GPIO_INPUT(GPIO_TIM4_CH3OUT_2)
#define J1007_PIN7_IN J7_PIN7_IN
#define M0051J13_PIN7_IN J7_PIN7_IN
#define J7_PIN8 _MK_GPIO_OUTPUT(GPIO_TIM4_CH1OUT_2)
#define J1007_PIN8 J7_PIN8
#define M0051J13_PIN8 J7_PIN8
#define J7_PIN8_IN _MK_GPIO_INPUT(GPIO_TIM4_CH1OUT_2)
#define J1007_PIN8_IN J7_PIN8_IN
#define M0051J13_PIN8_IN J7_PIN8_IN
#define J7_PIN9 _MK_GPIO_OUTPUT(GPIO_TIM4_CH4OUT_2)
#define J1007_PIN9 J7_PIN9
#define M0051J13_PIN9 J7_PIN9
#define J7_PIN9_IN _MK_GPIO_INPUT(GPIO_TIM4_CH4OUT_2)
#define J1007_PIN9_IN J7_PIN9_IN
#define M0051J13_PIN9_IN J7_PIN9_IN
//
// CAN 1 Peripheral Connector
// Flight Core - J8
// VOXL Flight - J1008
//
//#define J8_PIN2 _MK_GPIO_OUTPUT()
//#define J8_PIN3 _MK_GPIO_OUTPUT()
// PPM (RC) IN
// Flight Core - J9
// VOXL Flight - J1003
//
#define J9_PIN2_IN _MK_GPIO_INPUT(GPIO_TIM8_CH1IN_2)
#define J1003_PIN2_IN J9_PIN2_IN
//
// GPS CONNECTOR
// Flight Core - J10
// VOXL Flight - J1012
// M0051 - J15
//
#define J10_PIN2 _MK_GPIO_OUTPUT(GPIO_USART1_TX_3)
#define J1012_PIN2 J10_PIN2
#define M0051J15_PIN2 J10_PIN2
#define J10_PIN3 _MK_GPIO_OUTPUT(GPIO_USART1_RX_3)
#define J1012_PIN3 J10_PIN3
#define M0051J15_PIN3 J10_PIN3
#define J10_PIN4 _MK_GPIO_OUTPUT(GPIO_I2C1_SCL_2)
#define J1012_PIN4 J10_PIN4
#define M0051J15_PIN4 J10_PIN4
#define J10_PIN4_IN _MK_GPIO_INPUT(GPIO_I2C1_SCL_2)
#define J1012_PIN4_IN J10_PIN4_IN
#define M0051J15_PIN4_IN J10_PIN4_IN
#define J10_PIN5 _MK_GPIO_OUTPUT(GPIO_I2C1_SDA_1)
#define J1012_PIN5 J10_PIN5
#define M0051J15_PIN5 J10_PIN5
#define J10_PIN5_IN _MK_GPIO_INPUT(GPIO_I2C1_SDA_1)
#define J1012_PIN5_IN J10_PIN5_IN
#define M0051J15_PIN5_IN J10_PIN5_IN
//
// Spektrum RC Input Connector
// Flight Core - J12
// VOXL Flight - J1004
// M0051 - J14
//
#define J12_PIN1 GPIO_VDD_3V3_SPEKTRUM_POWER_EN
#define J1004_PIN1 J12_PIN1
#define M0051J14_PIN1 J12_PIN1
#define J12_PIN2 _MK_GPIO_OUTPUT(GPIO_USART6_TX_1)
#define J1004_PIN2 J12_PIN2
#define M0051J14_PIN2 J12_PIN2
#define J12_PIN2_IN _MK_GPIO_INPUT(GPIO_USART6_TX_1)
#define J1004_PIN2_IN J12_PIN2_IN
#define M0051J14_PIN2_IN J12_PIN2_IN
#define J12_PIN3 _MK_GPIO_OUTPUT(GPIO_USART6_RX_1)
#define J1004_PIN3 J12_PIN3
#define M0051J14_PIN3 J12_PIN3
#define J12_PIN3_IN _MK_GPIO_INPUT(GPIO_USART6_RX_1)
#define J1004_PIN3_IN J12_PIN3_IN
#define M0051J14_PIN3_IN J12_PIN3_IN
//
// I2C Display / Spare Sensor Connector
// Flight Core - J13
// VOXL Flight - J1011
//
#define J13_PIN3 _MK_GPIO_OUTPUT(GPIO_I2C2_SDA_2)
#define J1011_PIN3 J13_PIN3
#define J13_PIN4 _MK_GPIO_OUTPUT(GPIO_I2C2_SCL_2)
#define J1011_PIN4 J13_PIN4
#define J13_PIN5 _MK_GPIO_OUTPUT(GPIO_PF3_EVENTOUT)
#define J1011_PIN5 J13_PIN5
void modalai_print_usage_v1(void);
void modalai_print_usage_con_gpio_test_v1(void);
int modalai_con_gpio_test_v1(uint8_t con, uint8_t pin, bool state);
int modalai_led_test_v1(void);
int modalai_buzz_test_v1(eHW_TYPE type);
int modalai_hw_detect_v1(eHW_TYPE type);
#endif //MODALAI_FC_V1_H_

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#include <px4_platform_common/module.h>
#include "chip.h"
#include "stm32_gpio.h"
#include "board_config.h"
#include <nuttx/board.h>
#include <arch/board/board.h>
// v2
#ifdef CONFIG_ARCH_CHIP_STM32H753II // chip on M0087
#include "modalai_fc-v2.h"
void modalai_print_usage_v2(void)
{
PRINT_MODULE_DESCRIPTION("ModalAI Test utility\n");
PRINT_MODULE_USAGE_NAME_SIMPLE("modalai", "command");
PRINT_MODULE_USAGE_COMMAND_DESCR("led", "LED Test");
PRINT_MODULE_USAGE_COMMAND_DESCR("con", "Connector Output Test (as GPIO)");
PRINT_MODULE_USAGE_COMMAND_DESCR("buzz", "Automated buzz out test");
PRINT_MODULE_USAGE_COMMAND_DESCR("detect", "Detect board type");
return;
}
void modalai_print_usage_con_gpio_test_v2(void)
{
return;
}
int modalai_con_gpio_test_v2(uint8_t con, uint8_t pin, bool state)
{
return 0;
}
int modalai_led_test_v2(void)
{
PX4_INFO("Running led test");
stm32_configgpio(GPIO_nLED_RED);
stm32_configgpio(GPIO_nLED_GREEN);
stm32_configgpio(GPIO_nLED_BLUE);
int i = 0;
for (i = 0; i < 3; i++) {
usleep(1000 * 100);
stm32_gpiowrite(GPIO_nLED_RED, false);
usleep(1000 * 100);
stm32_gpiowrite(GPIO_nLED_RED, true);
usleep(1000 * 100);
stm32_gpiowrite(GPIO_nLED_GREEN, false);
usleep(1000 * 100);
stm32_gpiowrite(GPIO_nLED_GREEN, true);
usleep(1000 * 100);
stm32_gpiowrite(GPIO_nLED_BLUE, false);
usleep(1000 * 100);
stm32_gpiowrite(GPIO_nLED_BLUE, true);
}
return 0;
}
bool test_pair(uint32_t output_pin, uint32_t input_pin)
{
bool state = false;
stm32_gpiowrite(output_pin, true);
usleep(1000 * 10);
state = stm32_gpioread(input_pin);
if (state != true) {
return false;
}
usleep(1000 * 10);
stm32_gpiowrite(output_pin, false);
usleep(1000 * 10);
state = stm32_gpioread(input_pin);
if (state != false) {
return false;
}
return true;
}
int modalai_buzz_test_v2(eHW_TYPE hw_type)
{
PX4_INFO("test: buzz");
usleep(1000 * 100 * 10);
if (hw_type == eM0079) {
PX4_INFO("Using M0079 config");
} else if (hw_type == eM0087) {
PX4_INFO("Using M0087 config");
} else {
return -1;
}
if (hw_type == eM0079) {
//
//
//
PX4_INFO(">> Testing J1");
stm32_configgpio(M0079_J1_PIN_2_OUT); // 2-3
stm32_configgpio(M0079_J1_PIN_3_IN); // 3-2
stm32_configgpio(M0079_J1_PIN_4_OUT); // 4-5
stm32_configgpio(M0079_J1_PIN_5_IN); // 5-4
if (test_pair(M0079_J1_PIN_2_OUT, M0079_J1_PIN_3_IN)) {
PX4_INFO("PASS: M0079_J1_PIN_2_OUT M0079_J1_PIN_3_IN");
} else {
PX4_ERR("FAIL: M0079_J1_PIN_2_OUT M0079_J1_PIN_3_IN");
}
if (test_pair(M0079_J1_PIN_4_OUT, M0079_J1_PIN_5_IN)) {
PX4_INFO("PASS: M0079_J1_PIN_4_OUT M0079_J1_PIN_5_IN");
} else {
PX4_ERR("FAIL: M0079_J1_PIN_4_OUT M0079_J1_PIN_5_IN");
}
//
//
//
PX4_INFO(">> Testing J5");
stm32_configgpio(M0079_J5_PIN_2_OUT); // 2-4
stm32_configgpio(M0079_J5_PIN_3_OUT); // 3-5
stm32_configgpio(M0079_J5_PIN_4_IN); // 4-2
stm32_configgpio(M0079_J5_PIN_5_IN); // 5-3
if (test_pair(M0079_J5_PIN_2_OUT, M0079_J5_PIN_4_IN)) {
PX4_INFO("PASS: M0079_J5_PIN_2_OUT M0079_J5_PIN_4_IN");
} else {
PX4_ERR("FAIL: M0079_J5_PIN_2_OUT M0079_J5_PIN_4_IN");
}
if (test_pair(M0079_J5_PIN_3_OUT, M0079_J5_PIN_5_IN)) {
PX4_INFO("PASS: M0079_J5_PIN_3_OUT M0079_J5_PIN_5_IN");
} else {
PX4_ERR("FAIL: M0079_J5_PIN_3_OUT M0079_J5_PIN_5_IN");
}
//
//
//
PX4_INFO(">> Testing J7");
stm32_configgpio(M0079_J7_PIN_2_OUT); // 2-6
stm32_configgpio(M0079_J7_PIN_3_OUT); // 3-7
stm32_configgpio(M0079_J7_PIN_4_OUT); // 4-8
stm32_configgpio(M0079_J7_PIN_5_OUT); // 5-9
stm32_configgpio(M0079_J7_PIN_6_IN); // 6-2
stm32_configgpio(M0079_J7_PIN_7_IN); // 7-3
stm32_configgpio(M0079_J7_PIN_8_IN); // 8-4
stm32_configgpio(M0079_J7_PIN_9_IN); // 9-5
if (test_pair(M0079_J7_PIN_2_OUT, M0079_J7_PIN_6_IN)) {
PX4_INFO("PASS: M0079_J7_PIN_2_OUT M0079_J7_PIN_6_IN");
} else {
PX4_ERR("FAIL: M0079_J7_PIN_2_OUT M0079_J7_PIN_6_IN");
}
if (test_pair(M0079_J7_PIN_3_OUT, M0079_J7_PIN_7_IN)) {
PX4_INFO("PASS: M0079_J7_PIN_3_OUT M0079_J7_PIN_7_IN");
} else {
PX4_ERR("FAIL: M0079_J7_PIN_3_OUT M0079_J7_PIN_7_IN");
}
if (test_pair(M0079_J7_PIN_4_OUT, M0079_J7_PIN_8_IN)) {
PX4_INFO("PASS: M0079_J7_PIN_4_OUT M0079_J7_PIN_8_IN");
} else {
PX4_ERR("FAIL: M0079_J7_PIN_4_OUT M0079_J7_PIN_8_IN");
}
if (test_pair(M0079_J7_PIN_5_OUT, M0079_J7_PIN_9_IN)) {
PX4_INFO("PASS: M0079_J7_PIN_5_OUT M0079_J7_PIN_9_IN");
} else {
PX4_ERR("FAIL: M0079_J7_PIN_5_OUT M0079_J7_PIN_9_IN");
}
//
//
//
PX4_INFO(">> Testing J10");
stm32_configgpio(M0079_J10_PIN_2_OUT); // 2-4
stm32_configgpio(M0079_J10_PIN_3_OUT); // 3-5
stm32_configgpio(M0079_J10_PIN_4_IN); // 4-2
stm32_configgpio(M0079_J10_PIN_5_IN); // 5-3
if (test_pair(M0079_J10_PIN_2_OUT, M0079_J10_PIN_4_IN)) {
PX4_INFO("PASS: M0079_J10_PIN_2_OUT M0079_J10_PIN_4_IN");
} else {
PX4_ERR("FAIL: M0079_J10_PIN_2_OUT M0079_J10_PIN_4_IN");
}
if (test_pair(M0079_J10_PIN_3_OUT, M0079_J10_PIN_5_IN)) {
PX4_INFO("PASS: M0079_J10_PIN_3_OUT M0079_J10_PIN_5_IN");
} else {
PX4_ERR("FAIL: M0079_J10_PIN_3_OUT M0079_J10_PIN_5_IN");
}
//
//
//
PX4_INFO(">> Testing J13");
stm32_configgpio(M0079_J12_PIN_2_OUT); // 2-3
stm32_configgpio(M0079_J12_PIN_3_IN); // 3-2
if (test_pair(M0079_J12_PIN_2_OUT, M0079_J12_PIN_3_IN)) {
PX4_INFO("PASS: M0079_J12_PIN_2 M0079_J12_PIN_3");
} else {
PX4_ERR("FAIL: M0079_J12_PIN_2 M0079_J12_PIN_3");
}
} else if (hw_type == eM0087) {
//
//
//
PX4_INFO(">> Testing J1");
stm32_configgpio(M0087_J1_PIN_2_IN); // 2-4
stm32_configgpio(M0087_J1_PIN_3_OUT); // 3-5
stm32_configgpio(M0087_J1_PIN_4_OUT); // 4-2
stm32_configgpio(M0087_J1_PIN_5_IN); // 5-3
if (test_pair(M0087_J1_PIN_4_OUT, M0087_J1_PIN_2_IN)) {
PX4_INFO("PASS: M0087_J1_PIN_4_OUT M0087_J1_PIN_2_IN");
} else {
PX4_ERR("FAIL: M0087_J1_PIN_4_OUT M0087_J1_PIN_2_IN");
}
if (test_pair(M0087_J1_PIN_3_OUT, M0087_J1_PIN_5_IN)) {
PX4_INFO("PASS: M0087_J1_PIN_3_OUT M0087_J1_PIN_5_IN");
} else {
PX4_ERR("FAIL: M0087_J1_PIN_3_OUT M0087_J1_PIN_5_IN");
}
//
//
//
PX4_INFO(">> Testing J5");
stm32_configgpio(M0087_J5_PIN_2_OUT); // 2-4
stm32_configgpio(M0087_J5_PIN_3_OUT); // 3-5
stm32_configgpio(M0087_J5_PIN_4_IN); // 4-2
stm32_configgpio(M0087_J5_PIN_5_IN); // 5-3
if (test_pair(M0087_J5_PIN_2_OUT, M0087_J5_PIN_4_IN)) {
PX4_INFO("PASS: M0087_J5_PIN_2_OUT M0087_J5_PIN_4_IN");
} else {
PX4_ERR("FAIL: M0087_J5_PIN_2_OUT M0087_J5_PIN_4_IN");
}
if (test_pair(M0087_J5_PIN_3_OUT, M0087_J5_PIN_5_IN)) {
PX4_INFO("PASS: M0087_J5_PIN_3_OUT M0087_J5_PIN_5_IN");
} else {
PX4_ERR("FAIL: M0087_J5_PIN_3_OUT M0087_J5_PIN_5_IN");
}
//
//
//
PX4_INFO(">> Testing J7");
stm32_configgpio(M0087_J7_PIN_2_OUT); // 2-6
stm32_configgpio(M0087_J7_PIN_3_OUT); // 3-7
stm32_configgpio(M0087_J7_PIN_4_OUT); // 4-8
stm32_configgpio(M0087_J7_PIN_5_OUT); // 5-9
stm32_configgpio(M0087_J7_PIN_6_IN); // 6-2
stm32_configgpio(M0087_J7_PIN_7_IN); // 7-3
stm32_configgpio(M0087_J7_PIN_8_IN); // 8-4
stm32_configgpio(M0087_J7_PIN_9_IN); // 9-5
if (test_pair(M0087_J7_PIN_2_OUT, M0087_J7_PIN_6_IN)) {
PX4_INFO("PASS: M0087_J7_PIN_2_OUT M0087_J7_PIN_6_IN");
} else {
PX4_ERR("FAIL: M0087_J7_PIN_2_OUT M0087_J7_PIN_6_IN");
}
if (test_pair(M0087_J7_PIN_3_OUT, M0087_J7_PIN_7_IN)) {
PX4_INFO("PASS: M0087_J7_PIN_3_OUT M0087_J7_PIN_7_IN");
} else {
PX4_ERR("FAIL: M0087_J7_PIN_3_OUT M0087_J7_PIN_7_IN");
}
if (test_pair(M0087_J7_PIN_4_OUT, M0087_J7_PIN_8_IN)) {
PX4_INFO("PASS: M0087_J7_PIN_4_OUT M0087_J7_PIN_8_IN");
} else {
PX4_ERR("FAIL: M0087_J7_PIN_4_OUT M0087_J7_PIN_8_IN");
}
if (test_pair(M0087_J7_PIN_5_OUT, M0087_J7_PIN_9_IN)) {
PX4_INFO("PASS: M0087_J7_PIN_5_OUT M0087_J7_PIN_9_IN");
} else {
PX4_ERR("FAIL: M0087_J7_PIN_5_OUT M0087_J7_PIN_9_IN");
}
//
//
//
PX4_INFO(">> Testing J10");
stm32_configgpio(M0087_J10_PIN_2_OUT); // 2-4
stm32_configgpio(M0087_J10_PIN_3_OUT); // 3-5
stm32_configgpio(M0087_J10_PIN_4_IN); // 4-2
stm32_configgpio(M0087_J10_PIN_5_IN); // 5-3
if (test_pair(M0087_J10_PIN_2_OUT, M0087_J10_PIN_4_IN)) {
PX4_INFO("PASS: M0087_J10_PIN_2_OUT M0087_J10_PIN_4_IN");
} else {
PX4_ERR("FAIL: M0087_J10_PIN_2_OUT M0087_J10_PIN_4_IN");
}
if (test_pair(M0087_J10_PIN_3_OUT, M0087_J10_PIN_5_IN)) {
PX4_INFO("PASS: M0087_J10_PIN_3_OUT M0087_J10_PIN_5_IN");
} else {
PX4_ERR("FAIL: M0087_J10_PIN_3_OUT M0087_J10_PIN_5_IN");
}
//
//
//
PX4_INFO(">> Testing J12");
stm32_configgpio(M0087_J12_PIN_2_OUT); // 2-3
stm32_configgpio(M0087_J12_PIN_3_IN); // 3-2
if (test_pair(M0087_J12_PIN_2_OUT, M0087_J12_PIN_3_IN)) {
PX4_INFO("PASS: M0087_J12_PIN_2_OUT M0087_J12_PIN_3_IN");
} else {
PX4_ERR("FAIL: M0087_J12_PIN_2_OUT M0087_J12_PIN_3_IN");
}
//
//
//
PX4_INFO(">> Testing J14");
stm32_configgpio(M0087_J14_PIN_2_OUT);
stm32_configgpio(M0087_J14_PIN_3_OUT);
stm32_configgpio(M0087_J14_PIN_4_OUT);
stm32_configgpio(M0087_J14_PIN_5_OUT);
stm32_configgpio(M0087_J14_PIN_6_OUT);
stm32_configgpio(M0087_J14_PIN_7_IN);
stm32_configgpio(M0087_J14_PIN_8_IN);
stm32_configgpio(M0087_J14_PIN_9_IN);
stm32_configgpio(M0087_J14_PIN_10_IN);
stm32_configgpio(M0087_J14_PIN_11_IN);
if (test_pair(M0087_J14_PIN_2_OUT, M0087_J14_PIN_7_IN)) {
PX4_INFO("PASS: M0087_J14_PIN_2_OUT M0087_J14_PIN_7_IN");
} else {
PX4_ERR("FAIL: M0087_J14_PIN_2_OUT M0087_J14_PIN_7_IN");
}
if (test_pair(M0087_J14_PIN_3_OUT, M0087_J14_PIN_8_IN)) {
PX4_INFO("PASS: M0087_J14_PIN_3_OUT M0087_J14_PIN_8_IN");
} else {
PX4_ERR("FAIL: M0087_J14_PIN_3_OUT M0087_J14_PIN_8_IN");
}
if (test_pair(M0087_J14_PIN_4_OUT, M0087_J14_PIN_9_IN)) {
PX4_INFO("PASS: M0087_J14_PIN_4_OUT M0087_J14_PIN_9_IN");
} else {
PX4_ERR("FAIL: M0087_J14_PIN_4_OUT M0087_J14_PIN_9_IN");
}
if (test_pair(M0087_J14_PIN_5_OUT, M0087_J14_PIN_10_IN)) {
PX4_INFO("PASS: M0087_J14_PIN_5_OUT M0087_J14_PIN_10_IN");
} else {
PX4_ERR("FAIL: M0087_J14_PIN_5_OUT M0087_J14_PIN_10_IN");
}
if (test_pair(M0087_J14_PIN_6_OUT, M0087_J14_PIN_11_IN)) {
PX4_INFO("PASS: M0087_J14_PIN_6_OUT M0087_J14_PIN_11_IN");
} else {
PX4_ERR("FAIL: M0087_J14_PIN_6_OUT M0087_J14_PIN_11_IN");
}
}
return 0;
}
int modalai_hw_detect_v2(eHW_TYPE hw_type)
{
int result = -1;
if (hw_type == eM0079) {
PX4_INFO("V230 - M0079");
result = 0;
} else if (hw_type == eM0087) {
PX4_INFO("V230 - M0087");
result = 0;
} else {
PX4_ERR("Unknown hardware");
}
return result;
}
#endif //CONFIG_ARCH_CHIP_STM32H753II

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@ -0,0 +1,183 @@
#ifndef MODALAI_FC_V2_H_
#define MODALAI_FC_V2_H_
typedef enum {
eHwUnknown = -1,
eHwNone = 0,
eM0079, //FCv2
eM0087 //FCv2 Pro
} eHW_TYPE;
#define _MK_GPIO_INPUT(def) (((def) & (GPIO_PORT_MASK | GPIO_PIN_MASK)) | (GPIO_INPUT|GPIO_PULLUP))
#define _MK_GPIO_OUTPUT(def) (((def) & (GPIO_PORT_MASK | GPIO_PIN_MASK)) | (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR))
/* M0079 Pins */
//
// TELEM1
// M0079- J1
// PF6 PIN2 - out
// PE8 PIN3 - in
// PF8 PIN4 - out
// PE10 PIN4 - in
//
#define M0079_J1_PIN_2_OUT _MK_GPIO_OUTPUT(GPIO_PORTF|GPIO_PIN6)
#define M0079_J1_PIN_3_IN _MK_GPIO_INPUT(GPIO_PORTE|GPIO_PIN8)
#define M0079_J1_PIN_4_OUT _MK_GPIO_OUTPUT(GPIO_PORTF|GPIO_PIN8)
#define M0079_J1_PIN_5_IN _MK_GPIO_INPUT(GPIO_PORTE|GPIO_PIN10)
//
// TELEM2
// M0079- J5
// PC12 PIN2 - out
// PD2 PIN3 - out
// PC9 PIN4 - in
// PC8 PIN4 - in
//
#define M0079_J5_PIN_2_OUT _MK_GPIO_OUTPUT(GPIO_PORTC|GPIO_PIN12)
#define M0079_J5_PIN_3_OUT _MK_GPIO_OUTPUT(GPIO_PORTD|GPIO_PIN2)
#define M0079_J5_PIN_4_IN _MK_GPIO_INPUT(GPIO_PORTC|GPIO_PIN9)
#define M0079_J5_PIN_5_IN _MK_GPIO_INPUT(GPIO_PORTC|GPIO_PIN8)
//
// PWM Output
// M0079- J7
// PI0 PIN2 - out
// PH12 PIN3 - out
// PH11 PIN4 - out
// PH10 PIN5 - out
//
// PD13 PIN6 - in
// PD14 PIN7 - in
// PH6 PIN8 - in
// PH9 PIN9 - in
//
#define M0079_J7_PIN_2_OUT _MK_GPIO_OUTPUT(GPIO_PORTI|GPIO_PIN0)
#define M0079_J7_PIN_3_OUT _MK_GPIO_OUTPUT(GPIO_PORTH|GPIO_PIN12)
#define M0079_J7_PIN_4_OUT _MK_GPIO_OUTPUT(GPIO_PORTH|GPIO_PIN11)
#define M0079_J7_PIN_5_OUT _MK_GPIO_OUTPUT(GPIO_PORTH|GPIO_PIN10)
#define M0079_J7_PIN_6_IN _MK_GPIO_INPUT(GPIO_PORTD|GPIO_PIN13)
#define M0079_J7_PIN_7_IN _MK_GPIO_INPUT(GPIO_PORTD|GPIO_PIN14)
#define M0079_J7_PIN_8_IN _MK_GPIO_INPUT(GPIO_PORTH|GPIO_PIN6)
#define M0079_J7_PIN_9_IN _MK_GPIO_INPUT(GPIO_PORTH|GPIO_PIN9)
//
// GPS/Mag
// M0079- J10
// PB6 PIN2 - out
// PB7 PIN3 - out
// PB8 PIN4 - in
// PB9 PIN4 - in
//
#define M0079_J10_PIN_2_OUT _MK_GPIO_OUTPUT(GPIO_PORTB|GPIO_PIN6)
#define M0079_J10_PIN_3_OUT _MK_GPIO_OUTPUT(GPIO_PORTB|GPIO_PIN7)
#define M0079_J10_PIN_4_IN _MK_GPIO_INPUT(GPIO_PORTB|GPIO_PIN8)
#define M0079_J10_PIN_5_IN _MK_GPIO_INPUT(GPIO_PORTB|GPIO_PIN9)
//
// Spektrum RC Input Connector
// M0079- J12
// PC6 PIN2 - out
// PC7 PIN3 - in
//
#define M0079_J12_PIN_2_OUT _MK_GPIO_OUTPUT(GPIO_PORTC|GPIO_PIN6)
#define M0079_J12_PIN_3_IN _MK_GPIO_INPUT(GPIO_PORTC|GPIO_PIN7)
/* M0087 Pins */
//
// TELEM1
// M0087- J1
// PF6 PIN2 - in
// PE8 PIN3 - out
// PF8 PIN4 - out
// PE10 PIN5 - in
//
#define M0087_J1_PIN_2_IN _MK_GPIO_INPUT(GPIO_PORTF|GPIO_PIN6)
#define M0087_J1_PIN_3_OUT _MK_GPIO_OUTPUT(GPIO_PORTE|GPIO_PIN8)
#define M0087_J1_PIN_4_OUT _MK_GPIO_OUTPUT(GPIO_PORTF|GPIO_PIN8)
#define M0087_J1_PIN_5_IN _MK_GPIO_INPUT(GPIO_PORTE|GPIO_PIN10)
//
// TELEM2
// M0087- J5
// PC12 PIN2 - out
// PD2 PIN3 - out
// PC9 PIN4 - in
// PC8 PIN5 - in
//
#define M0087_J5_PIN_2_OUT _MK_GPIO_OUTPUT(GPIO_PORTC|GPIO_PIN12)
#define M0087_J5_PIN_3_OUT _MK_GPIO_OUTPUT(GPIO_PORTD|GPIO_PIN2)
#define M0087_J5_PIN_4_IN _MK_GPIO_INPUT(GPIO_PORTC|GPIO_PIN9)
#define M0087_J5_PIN_5_IN _MK_GPIO_INPUT(GPIO_PORTC|GPIO_PIN8)
//
// PWM Output
// M0087- J7
// PI0 PIN2 - out
// PH12 PIN3 - out
// PH11 PIN4 - out
// PH10 PIN5 - out
//
// PD13 PIN6 - in
// PD14 PIN7 - in
// PH6 PIN8 - in
// PH9 PIN9 - in
//
#define M0087_J7_PIN_2_OUT _MK_GPIO_OUTPUT(GPIO_PORTI|GPIO_PIN0)
#define M0087_J7_PIN_3_OUT _MK_GPIO_OUTPUT(GPIO_PORTH|GPIO_PIN12)
#define M0087_J7_PIN_4_OUT _MK_GPIO_OUTPUT(GPIO_PORTH|GPIO_PIN11)
#define M0087_J7_PIN_5_OUT _MK_GPIO_OUTPUT(GPIO_PORTH|GPIO_PIN10)
#define M0087_J7_PIN_6_IN _MK_GPIO_INPUT(GPIO_PORTD|GPIO_PIN13)
#define M0087_J7_PIN_7_IN _MK_GPIO_INPUT(GPIO_PORTD|GPIO_PIN14)
#define M0087_J7_PIN_8_IN _MK_GPIO_INPUT(GPIO_PORTH|GPIO_PIN6)
#define M0087_J7_PIN_9_IN _MK_GPIO_INPUT(GPIO_PORTH|GPIO_PIN9)
//
// GPS/Mag
// M0087- J10
// PB6 PIN2 - out
// PB7 PIN3 - out
// PB8 PIN4 - in
// PB9 PIN5 - in
//
#define M0087_J10_PIN_2_OUT _MK_GPIO_OUTPUT(GPIO_PORTB|GPIO_PIN6)
#define M0087_J10_PIN_3_OUT _MK_GPIO_OUTPUT(GPIO_PORTB|GPIO_PIN7)
#define M0087_J10_PIN_4_IN _MK_GPIO_INPUT(GPIO_PORTB|GPIO_PIN8)
#define M0087_J10_PIN_5_IN _MK_GPIO_INPUT(GPIO_PORTB|GPIO_PIN9)
//
// Spektrum RC Input Connector
// M0087- J12
// PC6 PIN2 - out
// PC7 PIN3 - in
//
#define M0087_J12_PIN_2_OUT _MK_GPIO_OUTPUT(GPIO_PORTC|GPIO_PIN6)
#define M0087_J12_PIN_3_IN _MK_GPIO_INPUT(GPIO_PORTC|GPIO_PIN7)
//
// AVIATOR SPI/I2C/ADC EXPANSION CONNECTOR
// M0087- J14
// PC6 PIN2 - out
// PC7 PIN3 - in
//
#define M0087_J14_PIN_2_OUT _MK_GPIO_OUTPUT(GPIO_PORTA|GPIO_PIN6)
#define M0087_J14_PIN_3_OUT _MK_GPIO_OUTPUT(GPIO_PORTG|GPIO_PIN14)
#define M0087_J14_PIN_4_OUT _MK_GPIO_OUTPUT(GPIO_PORTB|GPIO_PIN3)
#define M0087_J14_PIN_5_OUT _MK_GPIO_OUTPUT(GPIO_PORTI|GPIO_PIN10)
#define M0087_J14_PIN_6_OUT _MK_GPIO_OUTPUT(GPIO_PORTF|GPIO_PIN0)
#define M0087_J14_PIN_7_IN _MK_GPIO_INPUT(GPIO_PORTF|GPIO_PIN1)
#define M0087_J14_PIN_8_IN _MK_GPIO_INPUT(GPIO_PORTF|GPIO_PIN12)
#define M0087_J14_PIN_9_IN _MK_GPIO_INPUT(GPIO_PORTB|GPIO_PIN0)
#define M0087_J14_PIN_10_IN _MK_GPIO_INPUT(GPIO_PORTA|GPIO_PIN0)
#define M0087_J14_PIN_11_IN _MK_GPIO_INPUT(GPIO_PORTA|GPIO_PIN4)
void modalai_print_usage_v2(void);
void modalai_print_usage_con_gpio_test_v2(void);
int modalai_con_gpio_test_v2(uint8_t con, uint8_t pin, bool state);
int modalai_led_test_v2(void);
int modalai_buzz_test_v2(eHW_TYPE type);
int modalai_hw_detect_v2(eHW_TYPE type);
#endif //MODALAI_FC_V2_H_

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@ -1,5 +0,0 @@
CONFIG_BOARD_TOOLCHAIN="arm-none-eabi"
CONFIG_BOARD_ARCHITECTURE="cortex-m3"
CONFIG_BOARD_ROMFSROOT=""
CONFIG_BOARD_CONSTRAINED_FLASH=y
CONFIG_MODULES_PX4IOFIRMWARE=y

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@ -1,13 +0,0 @@
{
"board_id": 41777,
"magic": "PX4FWv2",
"description": "Firmware for the voxl2-io board",
"image": "",
"build_time": 0,
"summary": "voxl2io",
"version": "2.0",
"image_size": 0,
"image_maxsize": 61440,
"git_identity": "",
"board_revision": 0
}

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@ -1,141 +0,0 @@
/************************************************************************************
* nuttx-configs/px4io/include/board.h
* include/arch/board/board.h
*
* Copyright (C) 2009 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
* Copyright (C) 2012 PX4 Development Team. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
#ifndef __ARCH_BOARD_BOARD_H
#define __ARCH_BOARD_BOARD_H
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#ifndef __ASSEMBLY__
# include <stdint.h>
#endif
#include <stm32.h>
/************************************************************************************
* Definitions
************************************************************************************/
/* Clocking *************************************************************************/
/* On-board crystal frequency is 24MHz (HSE) */
#define STM32_BOARD_XTAL 16000000ul
/* Use the HSE output as the system clock */
#define STM32_SYSCLK_SW RCC_CFGR_SW_HSE
#define STM32_SYSCLK_SWS RCC_CFGR_SWS_HSE
#define STM32_SYSCLK_FREQUENCY STM32_BOARD_XTAL
/* AHB clock (HCLK) is SYSCLK (24MHz) */
#define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK
#define STM32_HCLK_FREQUENCY STM32_SYSCLK_FREQUENCY
#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* same as above, to satisfy compiler */
/* APB2 clock (PCLK2) is HCLK (24MHz) */
#define STM32_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLK
#define STM32_PCLK2_FREQUENCY STM32_HCLK_FREQUENCY
#define STM32_APB2_CLKIN (STM32_PCLK2_FREQUENCY) /* Timers 2-4 */
/* APB2 timer 1 will receive PCLK2. */
#define STM32_APB2_TIM1_CLKIN (STM32_PCLK2_FREQUENCY)
#define STM32_APB2_TIM15_CLKIN (STM32_PCLK2_FREQUENCY)
#define STM32_APB2_TIM16_CLKIN (STM32_PCLK2_FREQUENCY)
#define STM32_APB2_TIM17_CLKIN (STM32_PCLK2_FREQUENCY)
/* APB1 clock (PCLK1) is HCLK (24MHz) */
#define STM32_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLK
#define STM32_PCLK1_FREQUENCY (STM32_HCLK_FREQUENCY)
/* All timers run off PCLK */
#define STM32_APB1_TIM2_CLKIN (STM32_PCLK1_FREQUENCY)
#define STM32_APB1_TIM3_CLKIN (STM32_PCLK1_FREQUENCY)
#define STM32_APB1_TIM4_CLKIN (STM32_PCLK1_FREQUENCY)
#define STM32_APB1_TIM5_CLKIN (STM32_PCLK1_FREQUENCY)
#define STM32_APB1_TIM6_CLKIN (STM32_PCLK1_FREQUENCY)
#define STM32_APB1_TIM7_CLKIN (STM32_PCLK1_FREQUENCY)
#define STM32_APB1_TIM12_CLKIN (STM32_PCLK1_FREQUENCY)
#define STM32_APB1_TIM13_CLKIN (STM32_PCLK1_FREQUENCY)
#define STM32_APB1_TIM14_CLKIN (STM32_PCLK1_FREQUENCY)
/* Timer Frequencies, if APBx is set to 1, frequency is same to APBx
* otherwise frequency is 2xAPBx.
* Note: TIM1, 15-17 are on APB2, others on APB1
*/
#define BOARD_TIM1_FREQUENCY STM32_APB2_TIM1_CLKIN
#define BOARD_TIM2_FREQUENCY STM32_APB1_TIM2_CLKIN
#define BOARD_TIM3_FREQUENCY STM32_APB1_TIM3_CLKIN
#define BOARD_TIM4_FREQUENCY STM32_APB1_TIM4_CLKIN
#define BOARD_TIM5_FREQUENCY STM32_APB1_TIM5_CLKIN
#define BOARD_TIM6_FREQUENCY STM32_APB1_TIM6_CLKIN
#define BOARD_TIM7_FREQUENCY STM32_APB1_TIM7_CLKIN
#define BOARD_TIM12_FREQUENCY STM32_APB1_TIM12_CLKIN
#define BOARD_TIM13_FREQUENCY STM32_APB1_TIM13_CLKIN
#define BOARD_TIM14_FREQUENCY STM32_APB1_TIM14_CLKIN
#define BOARD_TIM15_FREQUENCY STM32_APB2_TIM15_CLKIN
#define BOARD_TIM16_FREQUENCY STM32_APB2_TIM16_CLKIN
#define BOARD_TIM17_FREQUENCY STM32_APB2_TIM17_CLKIN
/*
* Some of the USART pins are not available; override the GPIO
* definitions with an invalid pin configuration.
*/
#undef GPIO_USART2_CTS
#define GPIO_USART2_CTS 0xffffffff
#undef GPIO_USART2_RTS
#define GPIO_USART2_RTS 0xffffffff
#undef GPIO_USART2_CK
#define GPIO_USART2_CK 0xffffffff
#undef GPIO_USART3_CK
#define GPIO_USART3_CK 0xffffffff
#undef GPIO_USART3_CTS
#define GPIO_USART3_CTS 0xffffffff
#undef GPIO_USART3_RTS
#define GPIO_USART3_RTS 0xffffffff
#endif /* __ARCH_BOARD_BOARD_H */

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@ -1,61 +0,0 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_DEV_NULL is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD_CUSTOM=y
CONFIG_ARCH_BOARD_CUSTOM_DIR="../../../../boards/modalai/voxl2-io/nuttx-config"
CONFIG_ARCH_BOARD_CUSTOM_DIR_RELPATH=y
CONFIG_ARCH_BOARD_CUSTOM_NAME="px4"
CONFIG_ARCH_CHIP="stm32"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32F100C8=y
CONFIG_ARMV7M_USEBASEPRI=y
CONFIG_ARM_MPU_EARLY_RESET=y
CONFIG_BOARD_LOOPSPERMSEC=2000
CONFIG_DEBUG_FULLOPT=y
CONFIG_DEBUG_SYMBOLS=y
CONFIG_DEFAULT_SMALL=y
CONFIG_DISABLE_MOUNTPOINT=y
CONFIG_FDCLONE_DISABLE=y
CONFIG_FDCLONE_STDIO=y
CONFIG_HAVE_CXX=y
CONFIG_HAVE_CXXINITIALIZE=y
CONFIG_IDLETHREAD_STACKSIZE=316
CONFIG_INIT_ENTRYPOINT="user_start"
CONFIG_INIT_STACKSIZE=1100
CONFIG_MM_FILL_ALLOCATIONS=y
CONFIG_MM_SMALL=y
CONFIG_NAME_MAX=12
CONFIG_PREALLOC_TIMERS=0
CONFIG_RAM_SIZE=8192
CONFIG_RAM_START=0x20000000
CONFIG_RAW_BINARY=y
CONFIG_SERIAL_TERMIOS=y
CONFIG_STACK_COLORATION=y
CONFIG_START_DAY=30
CONFIG_START_MONTH=11
CONFIG_STDIO_DISABLE_BUFFERING=y
CONFIG_STM32_ADC1=y
CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y
CONFIG_STM32_DMA1=y
CONFIG_STM32_JTAG_SW_ENABLE=y
CONFIG_STM32_USART1=y
CONFIG_STM32_USART2=y
CONFIG_STM32_USART3=y
CONFIG_STM32_USART_SINGLEWIRE=y
CONFIG_TASK_NAME_SIZE=0
CONFIG_USART1_RXBUFSIZE=64
CONFIG_USART1_RXDMA=y
CONFIG_USART1_SERIAL_CONSOLE=y
CONFIG_USART1_TXBUFSIZE=32
CONFIG_USART2_RXBUFSIZE=64
CONFIG_USART2_TXBUFSIZE=64
CONFIG_USART3_RXBUFSIZE=64
CONFIG_USART3_RXDMA=y
CONFIG_USART3_TXBUFSIZE=64
CONFIG_USEC_PER_TICK=1000

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@ -1,131 +0,0 @@
/****************************************************************************
* configs/px4io-v2/scripts/ld.script
*
* Copyright (C) 2009, 2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/* The STM32F100C8 has 64Kb of FLASH beginning at address 0x0800:0000 and
* 8Kb of SRAM beginning at address 0x2000:0000. When booting from FLASH,
* FLASH memory is aliased to address 0x0000:0000 where the code expects to
* begin execution by jumping to the entry point in the 0x0800:0000 address
* range.
*/
MEMORY
{
flash (rx) : ORIGIN = 0x08001000, LENGTH = 60K
sram (rwx) : ORIGIN = 0x20000000, LENGTH = 8K
}
OUTPUT_ARCH(arm)
ENTRY(__start) /* treat __start as the anchor for dead code stripping */
EXTERN(_vectors) /* force the vectors to be included in the output */
/*
* Ensure that abort() is present in the final object. The exception handling
* code pulled in by libgcc.a requires it (and that code cannot be easily avoided).
*/
EXTERN(abort)
SECTIONS
{
.text : {
_stext = ABSOLUTE(.);
*(.vectors)
*(.text .text.*)
*(.fixup)
*(.gnu.warning)
*(.rodata .rodata.*)
*(.gnu.linkonce.t.*)
*(.glue_7)
*(.glue_7t)
*(.got)
*(.gcc_except_table)
*(.gnu.linkonce.r.*)
_etext = ABSOLUTE(.);
} > flash
/*
* Init functions (static constructors and the like)
*/
.init_section : {
_sinit = ABSOLUTE(.);
KEEP(*(.init_array .init_array.*))
_einit = ABSOLUTE(.);
} > flash
.ARM.extab : {
*(.ARM.extab*)
} > flash
__exidx_start = ABSOLUTE(.);
.ARM.exidx : {
*(.ARM.exidx*)
} > flash
__exidx_end = ABSOLUTE(.);
_eronly = ABSOLUTE(.);
/* The STM32F100CB has 8Kb of SRAM beginning at the following address */
.data : {
_sdata = ABSOLUTE(.);
*(.data .data.*)
*(.gnu.linkonce.d.*)
CONSTRUCTORS
_edata = ABSOLUTE(.);
. = ALIGN(4);
} > sram AT > flash
.bss : {
_sbss = ABSOLUTE(.);
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
. = ALIGN(4);
_ebss = ABSOLUTE(.);
} > sram
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_info 0 : { *(.debug_info) }
.debug_line 0 : { *(.debug_line) }
.debug_pubnames 0 : { *(.debug_pubnames) }
.debug_aranges 0 : { *(.debug_aranges) }
}

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@ -1,42 +0,0 @@
############################################################################
#
# Copyright (c) 2015 PX4 Development Team. All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# 1. Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in
# the documentation and/or other materials provided with the
# distribution.
# 3. Neither the name PX4 nor the names of its contributors may be
# used to endorse or promote products derived from this software
# without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
############################################################################
add_library(drivers_board
init.c
timer_config.cpp
)
target_link_libraries(drivers_board
PRIVATE
nuttx_arch
)

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@ -1,157 +0,0 @@
/****************************************************************************
*
* Copyright (c) 2013, 2014 PX4 Development Team. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name PX4 nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/**
* @file board_config.h
*
* PX4IOV2 internal definitions
*/
#pragma once
/******************************************************************************
* Included Files
******************************************************************************/
#include <px4_platform_common/px4_config.h>
#include <nuttx/compiler.h>
#include <stdint.h>
/******************************************************************************
* Definitions
******************************************************************************/
/* Configuration **************************************************************/
/******************************************************************************
* Serial
******************************************************************************/
#define PX4FMU_SERIAL_BASE STM32_USART2_BASE
#define PX4FMU_SERIAL_VECTOR STM32_IRQ_USART2
#define PX4FMU_SERIAL_TX_GPIO GPIO_USART2_TX
#define PX4FMU_SERIAL_RX_GPIO GPIO_USART2_RX
#define PX4FMU_SERIAL_TX_DMA DMACHAN_USART2_TX
#define PX4FMU_SERIAL_RX_DMA DMACHAN_USART2_RX
#define PX4FMU_SERIAL_CLOCK STM32_PCLK1_FREQUENCY
#define PX4FMU_SERIAL_BITRATE 921600
/******************************************************************************
* GPIOS
******************************************************************************/
/* LEDS **********************************************************************/
#define GPIO_LED_BLUE (GPIO_OUTPUT|GPIO_CNF_OUTOD|GPIO_MODE_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN14)
#define GPIO_LED_AMBER (GPIO_OUTPUT|GPIO_CNF_OUTOD|GPIO_MODE_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN15)
#define GPIO_LED_SAFETY (GPIO_OUTPUT|GPIO_CNF_OUTOD|GPIO_MODE_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN13)
#define LED_BLUE(on_true) stm32_gpiowrite(GPIO_LED_BLUE, !(on_true))
#define LED_AMBER(on_true) stm32_gpiowrite(GPIO_LED_AMBER, !(on_true))
#define LED_SAFETY(on_true) stm32_gpiowrite(GPIO_LED_SAFETY, !(on_true))
//#define GPIO_LED4 (GPIO_OUTPUT|GPIO_CNF_OUTOD|GPIO_MODE_50MHz|GPIO_OUTPUT_SET|GPIO_PORTA|GPIO_PIN11)
//#define GPIO_HEATER_OFF 0 // (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN14)
#define GPIO_PC14 (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN14)
#define GPIO_PC15 (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN15)
#define GPIO_SENSE_PC14_DN (GPIO_INPUT|GPIO_CNF_INPULLDWN|GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN14)
#define GPIO_SENSE_PC15_UP (GPIO_INPUT|GPIO_CNF_INPULLUP|GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN15)
# define SENSE_PH1 0b10 /* Floating pulled as set */
# define SENSE_PH2 0b01 /* Driven as tied */
#define GPIO_USART1_RX_SPEKTRUM (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|GPIO_OUTPUT_SET|GPIO_PORTA|GPIO_PIN10)
/* Safety switch button *******************************************************/
/* CONNECTED TO TP8 - pulled down via SW */
#define GPIO_BTN_SAFETY (GPIO_INPUT|GPIO_CNF_INPULLDWN|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN5)
/* Power switch controls ******************************************************/
#define GPIO_SPEKTRUM_PWR_EN (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|GPIO_OUTPUT_SET|GPIO_PORTC|GPIO_PIN13)
#define SPEKTRUM_POWER(_on_true) px4_arch_gpiowrite(GPIO_SPEKTRUM_PWR_EN, (_on_true))
#define SPEKTRUM_OUT(_one_true) px4_arch_gpiowrite(GPIO_USART1_RX_SPEKTRUM, (_one_true))
#define SPEKTRUM_RX_AS_UART() px4_arch_configgpio(GPIO_USART1_RX)
#define SPEKTRUM_RX_AS_GPIO_OUTPUT() px4_arch_configgpio(GPIO_USART1_RX_SPEKTRUM)
#define GPIO_SERVO_FAULT_DETECT 0 // (GPIO_INPUT|GPIO_CNF_INPULLUP|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN15)
/* Analog inputs **************************************************************/
/* PWM pins **************************************************************/
#define GPIO_PWM1 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTA|GPIO_PIN0)
#define GPIO_PWM2 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTA|GPIO_PIN1)
#define GPIO_PWM3 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTB|GPIO_PIN8)
#define GPIO_PWM4 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTB|GPIO_PIN9)
#define GPIO_PWM5 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTA|GPIO_PIN6)
#define GPIO_PWM6 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTA|GPIO_PIN7)
#define GPIO_PWM7 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTB|GPIO_PIN0)
#define GPIO_PWM8 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTB|GPIO_PIN1)
#define DIRECT_PWM_OUTPUT_CHANNELS 8
#define BOARD_HAS_NO_CAPTURE
/* SBUS pins *************************************************************/
/* XXX these should be UART pins */
#define GPIO_SBUS_INPUT (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN11)
#define GPIO_SBUS_OUTPUT (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTB|GPIO_PIN10)
#define GPIO_SBUS_OENABLE 0 // (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN4)
/*
* High-resolution timer
*/
#define HRT_TIMER 1 /* use timer1 for the HRT */
#define HRT_TIMER_CHANNEL 2 /* use capture/compare channel 2 */
#define HRT_PPM_CHANNEL 1 /* use capture/compare channel 1 PA8 */
#define GPIO_PPM_IN (GPIO_ALT|GPIO_CNF_INPULLUP|GPIO_PORTA|GPIO_PIN8)
/* LED definitions ******************************************************************/
/* PX4 has two LEDs that we will encode as: */
#define LED_STARTED 0 /* LED? */
#define LED_HEAPALLOCATE 1 /* LED? */
#define LED_IRQSENABLED 2 /* LED? + LED? */
#define LED_STACKCREATED 3 /* LED? */
#define LED_INIRQ 4 /* LED? + LED? */
#define LED_SIGNAL 5 /* LED? + LED? */
#define LED_ASSERTION 6 /* LED? + LED? + LED? */
#define LED_PANIC 7 /* N/C + N/C + N/C + LED? */
#define BOARD_NUM_IO_TIMERS 3
#include <px4_platform_common/board_common.h>

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@ -1,133 +0,0 @@
/****************************************************************************
*
* Copyright (C) 2012 PX4 Development Team. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name PX4 nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/**
* @file init.c
*
* PX4FMU-specific early startup code. This file implements the
* stm32_boardinitialize() function that is called during cpu startup.
*
* Code here is run before the rcS script is invoked; it should start required
* subsystems and perform board-specific initialization.
*/
/****************************************************************************
* Included Files
****************************************************************************/
#include <px4_platform_common/px4_config.h>
#include <stdbool.h>
#include <stdio.h>
#include <debug.h>
#include <errno.h>
#include <syslog.h>
#include <nuttx/board.h>
#include <stm32.h>
#include "board_config.h"
#include <arch/board/board.h>
/****************************************************************************
* Pre-Processor Definitions
****************************************************************************/
/****************************************************************************
* Protected Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/************************************************************************************
* Name: stm32_boardinitialize
*
* Description:
* All STM32 architectures must provide the following entry point. This entry point
* is called early in the intitialization -- after all memory has been configured
* and mapped but before any devices have been initialized.
*
************************************************************************************/
__EXPORT void stm32_boardinitialize(void)
{
/* configure GPIOs */
/* Set up for sensing HW */
stm32_configgpio(GPIO_SENSE_PC14_DN);
stm32_configgpio(GPIO_SENSE_PC15_UP);
/* LEDS - default to off */
stm32_configgpio(GPIO_LED_BLUE);
stm32_configgpio(GPIO_LED_AMBER);
stm32_configgpio(GPIO_LED_SAFETY);
stm32_configgpio(GPIO_PC14);
stm32_configgpio(GPIO_PC15);
stm32_configgpio(GPIO_BTN_SAFETY);
/* spektrum power enable is active high - enable it by default */
stm32_configgpio(GPIO_SPEKTRUM_PWR_EN);
stm32_configgpio(GPIO_SBUS_INPUT); /* xxx alternate function */
stm32_configgpio(GPIO_SBUS_OUTPUT);
stm32_gpiowrite(GPIO_PWM1, true);
stm32_configgpio(GPIO_PWM1);
stm32_gpiowrite(GPIO_PWM2, true);
stm32_configgpio(GPIO_PWM2);
stm32_gpiowrite(GPIO_PWM3, true);
stm32_configgpio(GPIO_PWM3);
stm32_gpiowrite(GPIO_PWM4, true);
stm32_configgpio(GPIO_PWM4);
stm32_gpiowrite(GPIO_PWM5, true);
stm32_configgpio(GPIO_PWM5);
stm32_gpiowrite(GPIO_PWM6, true);
stm32_configgpio(GPIO_PWM6);
stm32_gpiowrite(GPIO_PWM7, true);
stm32_configgpio(GPIO_PWM7);
stm32_gpiowrite(GPIO_PWM8, true);
stm32_configgpio(GPIO_PWM8);
}

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@ -1,54 +0,0 @@
/****************************************************************************
*
* Copyright (C) 2012 PX4 Development Team. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name PX4 nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
#include <px4_arch/io_timer_hw_description.h>
constexpr io_timers_t io_timers[MAX_IO_TIMERS] = {
initIOTimer(Timer::Timer2),
initIOTimer(Timer::Timer3),
initIOTimer(Timer::Timer4),
};
constexpr timer_io_channels_t timer_io_channels[MAX_TIMER_IO_CHANNELS] = {
initIOTimerChannel(io_timers, {Timer::Timer2, Timer::Channel1}, {GPIO::PortA, GPIO::Pin0}),
initIOTimerChannel(io_timers, {Timer::Timer2, Timer::Channel2}, {GPIO::PortA, GPIO::Pin1}),
initIOTimerChannel(io_timers, {Timer::Timer4, Timer::Channel3}, {GPIO::PortB, GPIO::Pin8}),
initIOTimerChannel(io_timers, {Timer::Timer4, Timer::Channel4}, {GPIO::PortB, GPIO::Pin9}),
initIOTimerChannel(io_timers, {Timer::Timer3, Timer::Channel1}, {GPIO::PortA, GPIO::Pin6}),
initIOTimerChannel(io_timers, {Timer::Timer3, Timer::Channel2}, {GPIO::PortA, GPIO::Pin7}),
initIOTimerChannel(io_timers, {Timer::Timer3, Timer::Channel3}, {GPIO::PortB, GPIO::Pin0}),
initIOTimerChannel(io_timers, {Timer::Timer3, Timer::Channel4}, {GPIO::PortB, GPIO::Pin1}),
};
constexpr io_timers_channel_mapping_t io_timers_channel_mapping =
initIOTimerChannelMapping(io_timers, timer_io_channels);