forked from Archive/PX4-Autopilot
Definitions for ARMv7-M AIRCR register, Fixes for ADS7843 and SSD1289 driver, Missing build logic for examples/watchdog
git-svn-id: http://svn.code.sf.net/p/nuttx/code/trunk@5198 42af7a65-404d-4744-a932-0658087f49c3
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@ -345,3 +345,4 @@
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either the nuttx/ or the apps/ source trees. This kludge makes it
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possible to configure NxWidgets/NxWM without too much trouble (with
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the tradeoff being a kind ugly structure and some maintenance issues).
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* apps/examples/Make.defs: Missing support for apps/examples/watchdog.
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@ -218,6 +218,10 @@ ifeq ($(CONFIG_EXAMPLES_USBTERM),y)
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CONFIGURED_APPS += examples/usbterm
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endif
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ifeq ($(CONFIG_EXAMPLES_WATCHDOG),y)
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CONFIGURED_APPS += examples/watchdog
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endif
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ifeq ($(CONFIG_EXAMPLES_WGET),y)
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CONFIGURED_APPS += examples/wget
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endif
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@ -3419,4 +3419,10 @@
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on the Shenzhou board.
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* graphics/nxmu: Correct some bad parameter checking that caused
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failures when DEBUG was enabled.
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* arch/arm/src/armv7-m/nvic.h: Add bit definitions for the AIRCR
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register.
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* drivers/input/ads7843.c: Need semaphore protection in logic
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that samples the position.
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* drivers/lcd/ssd1289.c: On some platforms we are unable to
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read the device ID -- reason unknown; workaround in place.
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@ -500,6 +500,14 @@
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#define NVIC_SYSHCON_BUSFAULTENA (1 << 17) /* Bit 17: BusFault enabled */
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#define NVIC_SYSHCON_USGFAULTENA (1 << 18) /* Bit 18: UsageFault enabled */
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/* Application Interrupt and Reset Control Register (AIRCR) */
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/* Bit 0: Reserved */
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#define NVIC_AIRC_VECTCLRACTIVE (1 << 1) /* Bit 1: Reserved for debug use */
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#define NVIC_AIRC_SYSRESETREQ (1 << 2) /* Bit 2: System reset */
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/* Bits 3-14: Reserved */
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#define NVIC_AIRC_ENDIANNESS (1 << 15) /* Bit 15: 1=Big endian */
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/* Bits 16-31: Reserved */
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/* Debug Exception and Monitor Control Register (DEMCR) */
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#define NVIC_DEMCR_VCCORERESET (1 << 0) /* Bit 0: Reset Vector Catch */
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@ -555,6 +555,7 @@ static void ads7843e_worker(FAR void *arg)
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FAR struct ads7843e_dev_s *priv = (FAR struct ads7843e_dev_s *)arg;
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FAR struct ads7843e_config_s *config;
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bool pendown;
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int ret;
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ASSERT(priv != NULL);
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@ -565,10 +566,26 @@ static void ads7843e_worker(FAR void *arg)
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config = priv->config;
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DEBUGASSERT(config != NULL);
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/* Disable the watchdog timer */
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/* Disable the watchdog timer. This is safe because it is started only
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* by this function and this function is serialized on the worker thread.
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*/
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wd_cancel(priv->wdog);
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/* Get exclusive access to the driver data structure */
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do
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{
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ret = sem_wait(&priv->devsem);
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/* This should only fail if the wait was canceled by an signal
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* (and the worker thread will receive a lot of signals).
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*/
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DEBUGASSERT(ret == OK || errno == EINTR);
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}
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while (ret < 0);
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/* Check for pen up or down by reading the PENIRQ GPIO. */
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pendown = config->pendown(config);
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@ -645,6 +662,10 @@ static void ads7843e_worker(FAR void *arg)
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errout:
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(void)ads7843e_sendcmd(priv, ADS7843_CMD_ENABPINIRQ);
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config->enable(config, true);
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/* Release our lock on the state structure */
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sem_post(&priv->devsem);
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}
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/****************************************************************************
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@ -931,9 +931,27 @@ static inline int ssd1289_hwinitialize(FAR struct ssd1289_dev_s *priv)
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lcd->select(lcd);
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/* Read the device ID. Skip verification of the device ID is the LCD is
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* write-only. What choice do we have?
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*/
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#ifndef CONFIG_LCD_NOGETRUN
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id = ssd1289_readreg(lcd, SSD1289_DEVCODE);
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lcddbg("LCD ID: %04x\n", id);
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if (id != 0)
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{
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lcddbg("LCD ID: %04x\n", id);
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}
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/* If we could not get the ID, then let's just assume that this is an SSD1289.
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* Perhaps we have some early register access issues. This seems to happen.
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* But then perhaps we should not even bother to read the device ID at all?
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*/
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else
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{
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lcddbg("No LCD ID, assuming SSD1289\n");
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id = SSD1289_DEVCODE_VALUE;
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}
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/* Check if the ID is for the SSD1289 */
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