forked from Archive/PX4-Autopilot
Add configuration for the LM3S
git-svn-id: https://nuttx.svn.sourceforge.net/svnroot/nuttx/trunk@5095 7fd9a85b-ad96-42d3-883c-3090e2eb8679
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@ -3262,3 +3262,5 @@
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sendfile() (non-standard!)
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* Kconfig: Refactor serial settings (moved from chip to drivers/serial).
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AVR "teensy" now builds with Kconfig (contributed by Richard Cochran).
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* Kconfig: Add configuration settings for the LPC17xx
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* Kconfig: Add configuratino settings for the LM3S (from Richard Cochran).
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@ -10,61 +10,78 @@ choice
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config ARCH_CHIP_C5471
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bool "TMS320 C5471"
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select ARCH_ARM7TDMI
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---help---
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TI TMS320 C5471, A180, or DA180 (ARM7TDMI)
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config ARCH_CHIP_CALYPSO
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bool "Calypso"
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select ARCH_ARM7TDMI
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---help---
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TI Calypso-based cell phones (ARM7TDMI)
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config ARCH_CHIP_DM320
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bool "TMS320 DM320"
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select ARCH_ARM926EJS
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---help---
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TI DMS320 DM320 (ARM926EJS)
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config ARCH_CHIP_IMX
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bool "Freescale iMX"
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select ARCH_ARM920T
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---help---
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Freescale iMX architectures (ARM920T)
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config ARCH_CHIP_KINETIS
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bool "Freescale Kinetis"
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select ARCH_CORTEXM
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select ARCH_CORTEXM4
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---help---
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Freescale Kinetis Architectures (ARM Cortex-M4)
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config ARCH_CHIP_LM3S
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bool "TI Stellaris"
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select ARCH_CORTEXM
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select ARCH_CORTEXM3
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---help---
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TI Stellaris LMS3 architecutres (ARM Cortex-M3)
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config ARCH_CHIP_LPC17XX
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bool "NXP LPC17xx"
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select ARCH_CORTEXM
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select ARCH_CORTEXM3
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---help---
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NXP LPC17xx architectures (ARM Cortex-M3)
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config ARCH_CHIP_LPC214X
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bool "NXP LPC214x"
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select ARCH_ARM7TDMI
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---help---
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NXP LPC2145x architectures (ARM7TDMI)
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config ARCH_CHIP_LPC2378
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bool "NXP LPC2378"
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select ARCH_ARM7TDMI
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---help---
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NXP LPC2145x architectures (ARM7TDMI)
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config ARCH_CHIP_LPC31XX
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bool "NXP LPC31XX"
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select ARCH_ARM926EJS
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---help---
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NPX LPC31XX architectures (ARM926EJS).
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config ARCH_CHIP_LPC43XX
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bool "NXP LPC43XX"
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select ARCH_CORTEXM
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select ARCH_CORTEXM4
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---help---
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NPX LPC43XX architectures (ARM Cortex-M4).
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config ARCH_CHIP_SAM3U
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bool "Atmel AT91SAM3U"
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select ARCH_CORTEXM
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select ARCH_CORTEXM3
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---help---
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Atmel AT91SAM3U architectures (ARM Cortex-M3)
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@ -75,6 +92,7 @@ config ARCH_CHIP_STM32
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config ARCH_CHIP_STR71X
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bool "STMicro STR71x"
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select ARCH_ARM7TDMI
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---help---
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STMicro STR71x architectures (ARM7TDMI).
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@ -82,24 +100,30 @@ endchoice
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config ARCH_ARM7TDMI
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bool
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default y if ARCH_CHIP_C5471 || ARCH_CHIP_CALYPSO || ARCH_CHIP_LPC214X || ARCH_CHIP_LPC2378 || ARCH_CHIP_STR71X
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config ARCH_ARM926EJS
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bool
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default y if ARCH_CHIP_DM320 || ARCH_CHIP_LPC31XX
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config ARCH_ARM920T
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bool
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default y if ARCH_CHIP_IMX
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config ARCH_CORTEXM
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config ARCH_CORTEXM3
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bool
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default y if ARCH_CHIP_KINETIS || ARCH_CHIP_LM3S || ARCH_CHIP_LPC17XX || ARCH_CHIP_LPC43XX || ARCH_CHIP_SAM3U || ARCH_CHIP_STM32
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config ARCH_CORTEXM4
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bool
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config ARCH_FPU
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bool "FPU support"
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default y
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depends on ARCH_CORTEXM4
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---help---
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Build in support for the ARM Cortex-M4 FPU.
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config ARCH_FAMILY
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string
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default "arm" if ARCH_ARM7TDMI || ARCH_ARM926EJS || ARCH_ARM920T
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default "armv7-m" if ARCH_CORTEXM
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default "armv7-m" if ARCH_CORTEXM3 || ARCH_CORTEXM4
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config ARCH_CHIP
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string
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@ -134,7 +158,7 @@ config ARCH_INTERRUPTSTACK
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config ARCH_IRQPRIO
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bool "Interrupt priority"
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default y if ARCH_CORTEXM
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default y if ARCH_CORTEXM3 || ARCH_CORTEXM4
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---help---
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Select if your board supports interrupt prioritization.
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@ -2,3 +2,74 @@
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# For a description of the syntax of this configuration file,
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# see misc/tools/kconfig-language.txt.
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#
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choice
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prompt "LM3S Chip Selection"
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default ARCH_CHIP_LM3S6965
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depends on ARCH_CHIP_LM3S
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config ARCH_CHIP_LM3S6918
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bool "LM3S6918"
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config ARCH_CHIP_LM3S9B96
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bool "LM3S9B96"
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config ARCH_CHIP_LM3S6432
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bool "LM3S6432"
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config ARCH_CHIP_LM3S6965
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bool "LM3S6965"
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config ARCH_CHIP_LM3S8962
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bool "LM3S8962"
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endchoice
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choice
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prompt "Toolchain"
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default LM3S_BUILDROOT
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config LM3S_CODESOURCERYW
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bool "CodeSourcery GNU toolchain under Windows"
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config LM3S_CODESOURCERYL
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bool "CodeSourcery GNU toolchain under Linux"
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config LM3S_DEVKITARM
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bool "devkitARM GNU toolchain"
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config LM3S_BUILDROOT
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bool "Buildroot"
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endchoice
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config LM3S_DFU
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bool "DFU"
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default y
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config LM3S_DISABLE_GPIOA_IRQS
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bool "Disable GPIOA IRQs"
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config LM3S_DISABLE_GPIOB_IRQS
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bool "Disable GPIOB IRQs"
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config LM3S_DISABLE_GPIOC_IRQS
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bool "Disable GPIOC IRQs"
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config LM3S_DISABLE_GPIOD_IRQS
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bool "Disable GPIOD IRQs"
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config LM3S_DISABLE_GPIOE_IRQS
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bool "Disable GPIOE IRQs"
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config LM3S_DISABLE_GPIOF_IRQS
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bool "Disable GPIOF IRQs"
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config LM3S_DISABLE_GPIOG_IRQS
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bool "Disable GPIOG IRQs"
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config LM3S_DISABLE_GPIOH_IRQS
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bool "Disable GPIOH IRQs"
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config LM3S_DISABLE_GPIOJ_IRQS
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bool "Disable GPIOJ IRQs"
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@ -54,14 +54,6 @@ config ARCH_FAMILY_LPC176X
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bool
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default y if ARCH_CHIP_LPC1764 || ARCH_CHIP_LPC1765 || ARCH_CHIP_LPC1766 || ARCH_CHIP_LPC1767 || ARCH_CHIP_LPC1768 || ARCH_CHIP_LPC1769
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config ARCH_CORTEXM3
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bool
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default y if ARCH_CHIP_LPC17XX
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config ARCH_CORTEXM4
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bool
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default n
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menu "LPC17xx Peripheral Support"
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config LPC17_MAINOSC
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@ -85,21 +85,6 @@ config ARCH_FAMILY_LPC4357
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bool
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default y if ARCH_CHIP_LPC4357FET180 || ARCH_CHIP_LPC4357FBD208 || ARCH_CHIP_LPC4357FET256
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config ARCH_CORTEXM3
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bool
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default n if !ARCH_CHIP_LPC43XX
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config ARCH_CORTEXM4
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bool
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default y if ARCH_CHIP_LPC43XX
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config ARCH_FPU
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bool "FPU support"
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default y
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depends on ARCH_CORTEXM4
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---help---
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Build in support for the ARM Cortex-M4 FPU.
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choice
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prompt "LPC43XX Boot Configuration"
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default CONFIG_BOOT_SRAM
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@ -10,48 +10,63 @@ choice
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config ARCH_CHIP_STM32F103ZET6
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bool "STM32F103ZET6"
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select ARCH_CORTEXM3
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config ARCH_CHIP_STM32F103RET6
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bool "STM32F103RET6"
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select ARCH_CORTEXM3
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config ARCH_CHIP_STM32F103VCT6
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bool "STM32F103VCT6"
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select ARCH_CORTEXM3
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config ARCH_CHIP_STM32F105VBT7
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bool "STM32F105VBT7"
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select ARCH_CORTEXM3
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config ARCH_CHIP_STM32F107VC
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bool "STM32F107VC"
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select ARCH_CORTEXM3
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config ARCH_CHIP_STM32F207IG
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bool "STM32F207IG"
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select ARCH_CORTEXM3
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config ARCH_CHIP_STM32F405RG
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bool "STM32F405RG"
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select ARCH_CORTEXM3
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config ARCH_CHIP_STM32F405VG
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bool "STM32F405VG"
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select ARCH_CORTEXM3
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config ARCH_CHIP_STM32F405ZG
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bool "STM32F405ZG"
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select ARCH_CORTEXM3
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config ARCH_CHIP_STM32F407VE
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bool "STM32F407VE"
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select ARCH_CORTEXM3
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config ARCH_CHIP_STM32F407VG
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bool "STM32F407VG"
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select ARCH_CORTEXM3
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config ARCH_CHIP_STM32F407ZE
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bool "STM32F407ZE"
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select ARCH_CORTEXM4
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config ARCH_CHIP_STM32F407ZG
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bool "STM32F407ZG"
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select ARCH_CORTEXM4
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config ARCH_CHIP_STM32F407IE
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bool "STM32F407IE"
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select ARCH_CORTEXM4
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config ARCH_CHIP_STM32F407IG
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bool "STM32F407IG"
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select ARCH_CORTEXM4
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endchoice
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bool
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default y if ARCH_CHIP_STM32F405RG || ARCH_CHIP_STM32F405VG || ARCH_CHIP_STM32F405ZG || ARCH_CHIP_STM32F407VE || ARCH_CHIP_STM32F407VG || ARCH_CHIP_STM32F407ZE || ARCH_CHIP_STM32F407ZG || ARCH_CHIP_STM32F407IE || ARCH_CHIP_STM32F407IE
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config ARCH_CORTEXM3
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bool
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default y if !STM32_STM32F40XX
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config ARCH_CORTEXM4
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bool
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default y if STM32_STM32F40XX
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menu "STM32 Peripheral Support"
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config STM32_ADC1
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@ -528,14 +535,6 @@ config HEAP2_END
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---help---
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The end (+1) of the SRAM in the FSMC address space
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config ARCH_FPU
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bool "FPU support"
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default y
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depends on ARCH_CORTEXM4
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---help---
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Build in support for the ARM Cortex-M4 FPU. Only the STM3240xxx supports
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a floating point unit (FPU)
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config STM32_TIM1_PWM
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bool "TIM1 PWM"
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default n
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@ -39,6 +39,7 @@ CONFIG_ARCH="arm"
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CONFIG_ARCH_ARM=y
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CONFIG_ARCH_CORTEXM3=y
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CONFIG_ARCH_CHIP="lm3s"
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CONFIG_ARCH_CHIP_LM3S=y
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CONFIG_ARCH_CHIP_LM3S6965=y
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CONFIG_ARCH_BOARD="lm3s6965-ek"
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CONFIG_ARCH_BOARD_LM3S6965EK=y
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@ -39,6 +39,7 @@ CONFIG_ARCH="arm"
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CONFIG_ARCH_ARM=y
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CONFIG_ARCH_CORTEXM3=y
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CONFIG_ARCH_CHIP="lm3s"
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CONFIG_ARCH_CHIP_LM3S=y
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CONFIG_ARCH_CHIP_LM3S6965=y
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CONFIG_ARCH_BOARD="lm3s6965-ek"
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CONFIG_ARCH_BOARD_LM3S6965EK=y
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@ -39,6 +39,7 @@ CONFIG_ARCH="arm"
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CONFIG_ARCH_ARM=y
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CONFIG_ARCH_CORTEXM3=y
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CONFIG_ARCH_CHIP="lm3s"
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CONFIG_ARCH_CHIP_LM3S=y
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CONFIG_ARCH_CHIP_LM3S6965=y
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CONFIG_ARCH_BOARD="lm3s6965-ek"
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CONFIG_ARCH_BOARD_LM3S6965EK=y
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