From a5f5b0715843c457822cbdccaec06baf5aeb4c5f Mon Sep 17 00:00:00 2001 From: patacongo Date: Wed, 20 Jun 2012 20:27:00 +0000 Subject: [PATCH] Set Mirtoo clock configuration git-svn-id: https://nuttx.svn.sourceforge.net/svnroot/nuttx/trunk@4856 7fd9a85b-ad96-42d3-883c-3090e2eb8679 --- nuttx/configs/mirtoo/include/board.h | 12 ++++++------ nuttx/configs/mirtoo/ostest/ld.script | 2 +- 2 files changed, 7 insertions(+), 7 deletions(-) diff --git a/nuttx/configs/mirtoo/include/board.h b/nuttx/configs/mirtoo/include/board.h index ffea646d17..5890b00708 100644 --- a/nuttx/configs/mirtoo/include/board.h +++ b/nuttx/configs/mirtoo/include/board.h @@ -68,11 +68,11 @@ */ #define BOARD_PLL_INPUT BOARD_FRC_FREQ -#define BOARD_PLL_IDIV 2 /* PLL input divider */ -#define BOARD_PLL_MULT 20 /* PLL multiplier */ -#define BOARD_PLL_ODIV 1 /* PLL output divider */ +#define BOARD_PLL_IDIV 2 /* PLL input divider: Input = 4MHz */ +#define BOARD_PLL_MULT 20 /* PLL multiplier: PLL = 80MHz */ +#define BOARD_PLL_ODIV 2 /* PLL output divider: Output = 40MHz */ -#define BOARD_CPU_CLOCK 80000000 /* CPU clock (80MHz = 8MHz * 20 / 2) */ +#define BOARD_CPU_CLOCK 40000000 /* CPU clock 40MHz = (((8MHz / 2) * 20) / 2) */ /* USB PLL configuration. * USB_CLOCK = ((POSC_XTAL / IDIV) * 24) / 2 @@ -85,8 +85,8 @@ * PBCLOCK = CPU_CLOCK / PBDIV */ -#define BOARD_PBDIV 2 /* Peripheral clock divisor (PBDIV) */ -#define BOARD_PBCLOCK 40000000 /* Peripheral clock (PBCLK = 80MHz/2) */ +#define BOARD_PBDIV 1 /* Peripheral clock divisor (PBDIV) */ +#define BOARD_PBCLOCK 40000000 /* Peripheral clock (PBCLK = 40MHz/1) */ /* Watchdog pre-scaler (re-visit) */ diff --git a/nuttx/configs/mirtoo/ostest/ld.script b/nuttx/configs/mirtoo/ostest/ld.script index 7463754d73..afa76da1d0 100644 --- a/nuttx/configs/mirtoo/ostest/ld.script +++ b/nuttx/configs/mirtoo/ostest/ld.script @@ -76,7 +76,7 @@ MEMORY kseg1_intexcpt (rx) : ORIGIN = 0xbfc00400, LENGTH = 128 kseg1_dbgexcpt (rx) : ORIGIN = 0xbfc00480, LENGTH = 16 kseg0_bootmem (rx) : ORIGIN = 0x9fc00490, LENGTH = 3072-1168-16 - kseg1_devcfg (r) : ORIGIN = 0x1fc00bf0, LENGTH = 16 + kseg1_devcfg (r) : ORIGIN = 0xbfc00bf0, LENGTH = 16 /* The PIC32MX250F128D has 32Kb of data memory at physical address * 0x00000000. Since the PIC32MX has no data cache, this memory is