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Add z180 system timer 

git-svn-id: http://svn.code.sf.net/p/nuttx/code/trunk@5438 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo 2012-12-15 15:03:35 +00:00
parent 67b2e69b23
commit a202ca65d1
19 changed files with 341 additions and 165 deletions
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49
nuttx/arch/z80/Kconfig
View File

@ -10,6 +10,7 @@ choice
config ARCH_CHIP_Z80
bool "Classic z80"
select ARCH_NOINTC
---help---
Classic ZiLOG z80 chip
@ -17,6 +18,7 @@ config ARCH_CHIP_Z8018006VSG
bool "Z8018006VSG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z80180
select ARCH_NOINTC
select ADDRENV
select HAVE_LOWSERIALINIT
---help---
@ -26,6 +28,7 @@ config ARCH_CHIP_Z8018010VSG
bool "Z8018010VSG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z80180
select ARCH_NOINTC
select ADDRENV
select HAVE_LOWSERIALINIT
---help---
@ -35,6 +38,7 @@ config ARCH_CHIP_Z8018008VSG
bool "Z8018008VSG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z80180
select ARCH_NOINTC
select ADDRENV
select HAVE_LOWSERIALINIT
---help---
@ -44,6 +48,7 @@ config ARCH_CHIP_Z8018010FSG
bool "Z8018010FSG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z80180
select ARCH_NOINTC
select ADDRENV
select HAVE_LOWSERIALINIT
---help---
@ -53,6 +58,7 @@ config ARCH_CHIP_Z8018008VEG
bool "Z8018008VEG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z80180
select ARCH_NOINTC
select ADDRENV
select HAVE_LOWSERIALINIT
---help---
@ -62,6 +68,7 @@ config ARCH_CHIP_Z8018006VEG
bool "Z8018006VEG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z80180
select ARCH_NOINTC
select ADDRENV
select HAVE_LOWSERIALINIT
---help---
@ -71,6 +78,7 @@ config ARCH_CHIP_Z8018006PSG
bool "Z8018006PSG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z80180
select ARCH_NOINTC
select ADDRENV
select HAVE_LOWSERIALINIT
---help---
@ -80,6 +88,7 @@ config ARCH_CHIP_Z8018008FSG
bool "Z8018008FSG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z80180
select ARCH_NOINTC
select ADDRENV
select HAVE_LOWSERIALINIT
---help---
@ -89,6 +98,7 @@ config ARCH_CHIP_Z8018010PSG
bool "Z8018010PSG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z80180
select ARCH_NOINTC
select ADDRENV
select HAVE_LOWSERIALINIT
---help---
@ -98,6 +108,7 @@ config ARCH_CHIP_Z8018006PEG
bool "Z8018006PEG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z80180
select ARCH_NOINTC
select ADDRENV
select HAVE_LOWSERIALINIT
---help---
@ -107,6 +118,7 @@ config ARCH_CHIP_Z8018010VEG
bool "Z8018010VEG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z80180
select ARCH_NOINTC
select ADDRENV
select HAVE_LOWSERIALINIT
---help---
@ -116,6 +128,7 @@ config ARCH_CHIP_Z8018010PEG
bool "Z8018010PEG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z80180
select ARCH_NOINTC
select ADDRENV
select HAVE_LOWSERIALINIT
---help---
@ -125,6 +138,7 @@ config ARCH_CHIP_Z8018008PSG
bool "Z8018008PSG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z80180
select ARCH_NOINTC
select ADDRENV
select HAVE_LOWSERIALINIT
---help---
@ -134,6 +148,7 @@ config ARCH_CHIP_Z8018006FSG
bool "Z8018006FSG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z80180
select ARCH_NOINTC
select ADDRENV
select HAVE_LOWSERIALINIT
---help---
@ -143,6 +158,7 @@ config ARCH_CHIP_Z8018000XSO
bool "Z8018000XSO"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z80180
select ARCH_NOINTC
select ADDRENV
select HAVE_LOWSERIALINIT
@ -150,6 +166,7 @@ config ARCH_CHIP_Z8018010FEG
bool "Z8018010FEG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z80180
select ARCH_NOINTC
select ADDRENV
select HAVE_LOWSERIALINIT
@ -157,6 +174,7 @@ config ARCH_CHIP_Z8018000WSO
bool "Z8018000WSO"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z80180
select ARCH_NOINTC
select ADDRENV
select HAVE_LOWSERIALINIT
@ -164,6 +182,7 @@ config ARCH_CHIP_Z8018008PEG
bool "Z8018008PEG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z80180
select ARCH_NOINTC
select ADDRENV
select HAVE_LOWSERIALINIT
@ -171,6 +190,7 @@ config ARCH_CHIP_Z8018110FEG
bool "Z8018110FEG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z80181
select ARCH_NOINTC
select ADDRENV
select HAVE_LOWSERIALINIT
---help---
@ -180,6 +200,7 @@ config ARCH_CHIP_Z8018233FSG
bool "Z8018233FSG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z80182
select ARCH_NOINTC
select ADDRENV
select HAVE_LOWSERIALINIT
---help---
@ -189,6 +210,7 @@ config ARCH_CHIP_Z8018220AEG
bool "Z8018220AEG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z80182
select ARCH_NOINTC
select ADDRENV
select HAVE_LOWSERIALINIT
---help---
@ -198,6 +220,7 @@ config ARCH_CHIP_Z8018216FSG
bool "Z8018216FSG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z80182
select ARCH_NOINTC
select ADDRENV
select HAVE_LOWSERIALINIT
---help---
@ -207,6 +230,7 @@ config ARCH_CHIP_Z8018216ASG
bool "Z8018216ASG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z80182
select ARCH_NOINTC
select ADDRENV
select HAVE_LOWSERIALINIT
---help---
@ -216,6 +240,7 @@ config ARCH_CHIP_Z8018233ASG
bool "Z8018233ASG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z80182
select ARCH_NOINTC
select ADDRENV
select HAVE_LOWSERIALINIT
---help---
@ -225,6 +250,7 @@ config ARCH_CHIP_Z8019520FSG
bool "Z8019520FSG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z80195
select ARCH_NOINTC
select ADDRENV
select HAVE_LOWSERIALINIT
---help---
@ -234,6 +260,7 @@ config ARCH_CHIP_Z8019533FSG
bool "Z8019533FSG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z80195
select ARCH_NOINTC
select ADDRENV
select HAVE_LOWSERIALINIT
---help---
@ -243,6 +270,7 @@ config ARCH_CHIP_Z8L18020VSG
bool "Z8L18020VSG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z8L180
select ARCH_NOINTC
select ADDRENV
select HAVE_LOWSERIALINIT
---help---
@ -252,6 +280,7 @@ config ARCH_CHIP_Z8L18020FSG
bool "Z8L18020FSG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z8L180
select ARCH_NOINTC
select ADDRENV
select HAVE_LOWSERIALINIT
---help---
@ -261,6 +290,7 @@ config ARCH_CHIP_Z8L18020PSG
bool "Z8L18020PSG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z8L180
select ARCH_NOINTC
select ADDRENV
select HAVE_LOWSERIALINIT
@ -268,6 +298,7 @@ config ARCH_CHIP_Z8L18220ASG
bool "Z8L18220ASG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z8L182
select ARCH_NOINTC
select ADDRENV
select HAVE_LOWSERIALINIT
---help---
@ -277,6 +308,7 @@ config ARCH_CHIP_Z8L18220FSG
bool "Z8L18220FSG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z8L182
select ARCH_NOINTC
select ADDRENV
select HAVE_LOWSERIALINIT
---help---
@ -286,6 +318,7 @@ config ARCH_CHIP_Z8L18220AEG
bool "Z8L18220AEG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z8L182
select ARCH_NOINTC
select ADDRENV
select HAVE_LOWSERIALINIT
@ -293,6 +326,7 @@ config ARCH_CHIP_Z8S18020VSG
bool "Z8S18020VSG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z8S180
select ARCH_NOINTC
select ADDRENV
select HAVE_LOWSERIALINIT
---help---
@ -302,6 +336,7 @@ config ARCH_CHIP_Z8S18020VSG1960
bool "Z8S18020VSG1960"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z8S180
select ARCH_NOINTC
select ADDRENV
select HAVE_LOWSERIALINIT
---help---
@ -311,6 +346,7 @@ config ARCH_CHIP_Z8S18033VSG
bool "Z8S18033VSG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z8S180
select ARCH_NOINTC
select ADDRENV
select HAVE_LOWSERIALINIT
---help---
@ -320,6 +356,7 @@ config ARCH_CHIP_Z8S18010FSG
bool "Z8S18010FSG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z8S180
select ARCH_NOINTC
select ADDRENV
select HAVE_LOWSERIALINIT
---help---
@ -329,6 +366,7 @@ config ARCH_CHIP_Z8S18010VEG
bool "Z8S18010VEG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z8S180
select ARCH_NOINTC
select ADDRENV
select HAVE_LOWSERIALINIT
---help---
@ -338,6 +376,7 @@ config ARCH_CHIP_Z8S18020VEG
bool "Z8S18020VEG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z8S180
select ARCH_NOINTC
select ADDRENV
select HAVE_LOWSERIALINIT
---help---
@ -347,6 +386,7 @@ config ARCH_CHIP_Z8S18010VSG
bool "Z8S18010VSG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z8S180
select ARCH_NOINTC
select ADDRENV
select HAVE_LOWSERIALINIT
---help---
@ -356,6 +396,7 @@ config ARCH_CHIP_Z8S18020PSG
bool "Z8S18020PSG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z8S180
select ARCH_NOINTC
select ADDRENV
select HAVE_LOWSERIALINIT
---help---
@ -365,6 +406,7 @@ config ARCH_CHIP_Z8S18033FSG
bool "Z8S18033FSG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z8S180
select ARCH_NOINTC
select ADDRENV
select HAVE_LOWSERIALINIT
---help---
@ -374,6 +416,7 @@ config ARCH_CHIP_Z8S18033FEG
bool "Z8S18033FEG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z8S180
select ARCH_NOINTC
select ADDRENV
select HAVE_LOWSERIALINIT
---help---
@ -383,6 +426,7 @@ config ARCH_CHIP_Z8S18020FSG
bool "Z8S18020FSG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z8S180
select ARCH_NOINTC
select ADDRENV
select HAVE_LOWSERIALINIT
---help---
@ -392,6 +436,7 @@ config ARCH_CHIP_Z8S18033VEG
bool "Z8S18033VEG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z8S180
select ARCH_NOINTC
select ADDRENV
select HAVE_LOWSERIALINIT
---help---
@ -401,6 +446,7 @@ config ARCH_CHIP_Z8S18010PSG
bool "Z8S18010PSG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z8S180
select ARCH_NOINTC
select ADDRENV
select HAVE_LOWSERIALINIT
---help---
@ -410,6 +456,7 @@ config ARCH_CHIP_Z8S18020FEG
bool "Z8S18020FEG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z8S180
select ARCH_NOINTC
select ADDRENV
select HAVE_LOWSERIALINIT
@ -417,6 +464,7 @@ config ARCH_CHIP_Z8S18010PEG
bool "Z8S18010PEG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z8S180
select ARCH_NOINTC
select ADDRENV
select HAVE_LOWSERIALINIT
@ -424,6 +472,7 @@ config ARCH_CHIP_Z8S18010FEG
bool "Z8S18010FEG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z8S180
select ARCH_NOINTC
select ADDRENV
select HAVE_LOWSERIALINIT

5
nuttx/arch/z80/src/z180/Kconfig
View File

@ -175,11 +175,12 @@ config Z180_ESCCB
---help---
Select to enable a serial port on ESCC Channel B
config Z180_TMR1
config Z180_PRT1
bool "Timer 1"
default n
---help---
Select to enable a Timer 1 (Timer 0 is used by NuttX as the system timer)
Select to enable a Programmable Reload Timer 1 (PRT1, PRT0 is used
by NuttX as the system timer)
# config Z180_DMA0
# bool "DMA0"

1
nuttx/arch/z80/src/z180/Make.defs
View File

@ -60,3 +60,4 @@ endif
CHIP_CSRCS = z180_copystate.c z180_initialstate.c z180_io.c z180_irq.c
CHIP_CSRCS += z180_lowscc.c z180_lowserial.c z180_modifiyreg8.c z180_mmu.c
CHIP_CSRCS += z180_registerdump.c z180_schedulesigaction.c z180_sigdeliver.c
CHIP_CSRCS += z180_timerisr.c

88
nuttx/arch/z80/src/z180/z180_config.h
View File

@ -44,6 +44,8 @@
#include <arch/z180/chip.h>
#include "up_internal.h"
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
@ -103,7 +105,7 @@
# undef CONFIG_Z180_ESCCA_SERIAL_CONSOLE
#endif
#ifndef CONFIG_Z180_ESCCA
#ifndef CONFIG_Z180_ESCCB
# undef CONFIG_Z180_ESCCB_SERIAL_CONSOLE
#endif
@ -114,34 +116,106 @@
#undef HAVE_SERIAL_CONSOLE
#if defined(CONFIG_Z180_UART0_SERIAL_CONSOLE)
# define HAVE_UART_CONSOLE 1
# define HAVE_SERIAL_CONSOLE 1
/* Disable other console selections */
# undef CONFIG_Z180_UART1_SERIAL_CONSOLE
# undef CONFIG_Z180_SCC_SERIAL_CONSOLE
# undef CONFIG_Z180_ESCCA_SERIAL_CONSOLE
# undef CONFIG_Z180_ESCCB_SERIAL_CONSOLE
/* If we are not using the serial driver, then the serial console is all
* that we will support.
*/
# ifndef USE_SERIALDRIVER
# undef CONFIG_Z180_UART1
# undef CONFIG_Z180_SCC
# undef CONFIG_Z180_ESCCA
# undef CONFIG_Z180_ESCCB
# endif
#elif defined(CONFIG_Z180_UART1_SERIAL_CONSOLE)
# define HAVE_UART_CONSOLE 1
# define HAVE_SERIAL_CONSOLE 1
#elif defined(CONFIG_Z180_UART1_SERIAL_CONSOLE)
/* Disable other console selections */
# undef CONFIG_Z180_SCC_SERIAL_CONSOLE
# undef CONFIG_Z180_ESCCA_SERIAL_CONSOLE
# undef CONFIG_Z180_ESCCB_SERIAL_CONSOLE
# define HAVE_UART_CONSOLE 1
/* If we are not using the serial driver, then the serial console is all
* that we will support.
*/
# ifndef USE_SERIALDRIVER
# undef CONFIG_Z180_UART0
# undef CONFIG_Z180_SCC
# undef CONFIG_Z180_ESCCA
# undef CONFIG_Z180_ESCCB
# endif
#elif defined(CONFIG_Z180_SCC_SERIAL_CONSOLE)
# define HAVE_SCC_CONSOLE 1
# define HAVE_SERIAL_CONSOLE 1
#elif defined(CONFIG_Z180_ESCC_SERIAL_CONSOLE)
/* Disable other console selections */
# undef CONFIG_Z180_ESCCA_SERIAL_CONSOLE
# undef CONFIG_Z180_ESCCB_SERIAL_CONSOLE
/* If we are not using the serial driver, then the serial console is all
* that we will support.
*/
# ifndef USE_SERIALDRIVER
# undef CONFIG_Z180_UART0
# undef CONFIG_Z180_UART1
# undef CONFIG_Z180_ESCCA
# undef CONFIG_Z180_ESCCB
# endif
#elif defined(CONFIG_Z180_ESCCA_SERIAL_CONSOLE)
# define HAVE_SCC_CONSOLE 1
# define HAVE_SERIAL_CONSOLE 1
#elif defined(CONFIG_Z180_ESCCA_SERIAL_CONSOLE)
/* Disable other console selections */
# undef CONFIG_Z180_ESCCB_SERIAL_CONSOLE
# define HAVE_SCC_CONSOLE 1
# define HAVE_SERIAL_CONSOLE 1
/* If we are not using the serial driver, then the serial console is all
* that we will support.
*/
# ifndef USE_SERIALDRIVER
# undef CONFIG_Z180_UART0
# undef CONFIG_Z180_UART1
# undef CONFIG_Z180_SCC
# undef CONFIG_Z180_ESCCB
# endif
/* If we are not using the serial driver, then the serial console is all
* that we will support.
*/
#elif defined(CONFIG_Z180_ESCCB_SERIAL_CONSOLE)
# define HAVE_SCC_CONSOLE 1
# define HAVE_SERIAL_CONSOLE 1
/* If we are not using the serial driver, then the serial console is all
* that we will support.
*/
# ifndef USE_SERIALDRIVER
# undef CONFIG_Z180_UART0
# undef CONFIG_Z180_UART1
# undef CONFIG_Z180_SCC
# undef CONFIG_Z180_ESCCA
# endif
#endif
/************************************************************************************

38
nuttx/arch/z80/src/z180/z180_iomap.h
View File

@ -89,18 +89,18 @@
#define Z180_CSIO_CNTR (SFR_OFFSET+0x0a) /* CSI/O Control Register */
#define Z180_CSIO_TRD (SFR_OFFSET+0x0b) /* Transmit/Receive Data Register */
/* Timer Registers */
/* Programmable Reload Timer (PTR) Registers */
#define Z180_TMR0_DRL (SFR_OFFSET+0x0c) /* Timer Data Register Ch 0 L */
#define Z180_TMR0_DRH (SFR_OFFSET+0x0d) /* Data Register Ch 0 H */
#define Z180_TMR0_RLDRL (SFR_OFFSET+0x0e) /* Reload Register Ch 0 L */
#define Z180_TMR0_RLDRH (SFR_OFFSET+0x0f) /* Reload Register Ch 0 H */
#define Z180_TMR_TCR (SFR_OFFSET+0x10) /* Timer Control Register */
#define Z180_PRT0_DRL (SFR_OFFSET+0x0c) /* Timer Data Register Ch 0 L */
#define Z180_PRT0_DRH (SFR_OFFSET+0x0d) /* Data Register Ch 0 H */
#define Z180_PRT0_RLDRL (SFR_OFFSET+0x0e) /* Reload Register Ch 0 L */
#define Z180_PRT0_RLDRH (SFR_OFFSET+0x0f) /* Reload Register Ch 0 H */
#define Z180_PRT_TCR (SFR_OFFSET+0x10) /* Timer Control Register */
#define Z180_TMR1_DRL (SFR_OFFSET+0x14) /* Data Register Ch 1 L */
#define Z180_TMR1_DRH (SFR_OFFSET+0x15) /* Data Register Ch 1 H */
#define Z180_TMR1_RLDRL (SFR_OFFSET+0x16) /* Reload Register Ch 1 L */
#define Z180_TMR1_RLDRH (SFR_OFFSET+0x17) /* Reload Register Ch 1 H */
#define Z180_PRT1_DRL (SFR_OFFSET+0x14) /* Data Register Ch 1 L */
#define Z180_PRT1_DRH (SFR_OFFSET+0x15) /* Data Register Ch 1 H */
#define Z180_PRT1_RLDRL (SFR_OFFSET+0x16) /* Reload Register Ch 1 L */
#define Z180_PRT1_RLDRH (SFR_OFFSET+0x17) /* Reload Register Ch 1 H */
#define Z180_FRC (SFR_OFFSET+0x18) /* Free Running Counter */
@ -398,16 +398,16 @@
/* Timer Reload Register Channel 0L (RLDR0L: 0x0e) -- 8-bit data */
/* Timer Reload Register Channel 0H (RLDR0H: 0x0f) -- 8-bit data */
/* Timer Control Register (TCR: 0x10) */
/* Programmable Reload Timer (PTR) Control Register (TCR: 0x10) */
#define TMR_TCR_TIF1 (0x80) /* Bit 7: Timer 1 Interrupt Flag */
#define TMR_TCR_TIF0 (0x40) /* Bit 6: Timer 0 Interrupt Flag */
#define TMR_TCR_TIE1 (0x20) /* Bit 5: Timer 1 Interrupt Enable */
#define TMR_TCR_TIE0 (0x10) /* Bit 4: Timer 0 Interrupt Enable */
#define TMR_TCR_TOC1 (0x08) /* Bit 3: Timer 1 Output Control */
#define TMR_TCR_TOC0 (0x04) /* Bit 2: Timer 0 Output Control */
#define TMR_TCR_TDE1 (0x02) /* Bit 1: Timer 1 Down Count Enable */
#define TMR_TCR_TDE0 (0x01) /* Bit 0: Timer 0 Down Count Enable */
#define PRT_TCR_TIF1 (0x80) /* Bit 7: Timer 1 Interrupt Flag */
#define PRT_TCR_TIF0 (0x40) /* Bit 6: Timer 0 Interrupt Flag */
#define PRT_TCR_TIE1 (0x20) /* Bit 5: Timer 1 Interrupt Enable */
#define PRT_TCR_TIE0 (0x10) /* Bit 4: Timer 0 Interrupt Enable */
#define PRT_TCR_TOC1 (0x08) /* Bit 3: Timer 1 Output Control */
#define PRT_TCR_TOC0 (0x04) /* Bit 2: Timer 0 Output Control */
#define PRT_TCR_TDE1 (0x02) /* Bit 1: Timer 1 Down Count Enable */
#define PRT_TCR_TDE0 (0x01) /* Bit 0: Timer 0 Down Count Enable */
/* Timer Data Register 1L (TMDR1L: 0x14) -- 8-bit data */
/* Timer Data Register 1H (TMDR1H: 0x15) -- 8-bit data */

39
nuttx/arch/z80/src/z180/z180_lowscc.c
View File

@ -90,20 +90,6 @@
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: z180_scc_setbaud
*
* Description:
*
****************************************************************************/
#if defined(HAVE_SCC_CONSOLE) && !defined(CONFIG_SUPPRESS_UART_CONFIG)
static void z180_scc_setbaud(void)
{
#warning "Missing logic"
}
#endif /* HAVE_SCC_CONSOLE && !CONFIG_SUPPRESS_UART_CONFIG */
/****************************************************************************
* Public Functions
****************************************************************************/
@ -112,34 +98,19 @@ static void z180_scc_setbaud(void)
* Name: z180_scc_lowinit
*
* Description:
* Called early in the boot sequence to initialize the [E]SCC channel(s)
* Called early in the boot sequence to initialize the [E]SCC console
* channel (only).
*
****************************************************************************/
#ifdef USE_LOWSERIALINIT
void z180_scc_lowinit(void)
{
#warning "Missing logic"
/* Configure for usage of {E]SCC channels (whether or not we have a console) */
#ifdef CONFIG_Z180_SCC
#ifdef HAVE_SCC_CONSOLE
#warning "Missing logic"
#endif
#ifdef CONFIG_Z180_ESCCA
#warning "Missing logic"
#endif
#ifdef CONFIG_Z180_ESCCB
#warning "Missing logic"
#endif
/* Configure the console for immediate usage */
#if defined(HAVE_SCC_CONSOLE) && !defined(CONFIG_SUPPRESS_UART_CONFIG)
#warning "Missing logic"
#endif /* HAVE_SCC_CONSOLE && !CONFIG_SUPPRESS_UART_CONFIG */
}
#endif
/****************************************************************************
* Name: z180_putc

35
nuttx/arch/z80/src/z180/z180_lowuart.c
View File

@ -83,20 +83,6 @@
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: z180_uart_setbaud
*
* Description:
*
****************************************************************************/
#if defined(HAVE_UART_CONSOLE) && !defined(CONFIG_SUPPRESS_UART_CONFIG)
static void z180_uart_setbaud(void)
{
#warning "Missing logic"
}
#endif /* HAVE_UART_CONSOLE && !CONFIG_SUPPRESS_UART_CONFIG */
/****************************************************************************
* Public Functions
****************************************************************************/
@ -105,30 +91,19 @@ static void z180_uart_setbaud(void)
* Name: z180_uart_lowinit
*
* Description:
* Called early in the boot sequence to initialize the [E]SCC channel(s)
* Called early in the boot sequence to initialize the uart console
* channel (only).
*
****************************************************************************/
#ifdef USE_LOWSERIALINIT
void z180_uart_lowinit(void)
{
#warning "Missing logic"
/* Configure for usage of {E]SCC channels (whether or not we have a console) */
#ifdef CONFIG_Z180_UART0
#ifdef HAVE_UART_CONSOLE
#warning "Missing logic"
#endif
#ifdef CONFIG_Z180_UART1
#warning "Missing logic"
#endif
/* Configure the console for immediate usage */
#if defined(HAVE_UART_CONSOLE) && !defined(CONFIG_SUPPRESS_UART_CONFIG)
#warning "Missing logic"
#endif /* HAVE_UART0_CONSOLE && !CONFIG_SUPPRESS_UART_CONFIG */
}
#endif
/****************************************************************************
* Name: z180_putc

10
nuttx/arch/z80/src/z180/z180_serial.h
View File

@ -57,11 +57,12 @@
* Name: z180_uart_lowinit
*
* Description:
* Called early in the boot sequence to initialize the UART(s)
* Called early in the boot sequence to initialize the uart console
* channel (only).
*
****************************************************************************/
#ifdef HAVE_UART
#if defined(HAVE_UART) && defined(USE_LOWSERIALINIT)
void z180_uart_lowinit(void);
#else
# define z180_uart_lowinit()
@ -71,11 +72,12 @@ void z180_uart_lowinit(void);
* Name: z180_scc_lowinit
*
* Description:
* Called early in the boot sequence to initialize the [E]SCC channel(s)
* Called early in the boot sequence to initialize the [E]SCC console
* channel (only).
*
****************************************************************************/
#ifdef HAVE_SCC
#if defined(HAVE_SCC) && defined(USE_LOWSERIALINIT)
void z180_scc_lowinit(void);
#else
# define z180_scc_lowinit()

157
nuttx/arch/z80/src/z180/z180_timerisr.c Normal file
View File

@ -0,0 +1,157 @@
/****************************************************************************
* arch/z80/src/z180/z180_timerisr.c
*
* Copyright (C) 2012 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <time.h>
#include <debug.h>
#include <arch/board/board.h>
#include "clock_internal.h"
#include "up_internal.h"
#include "chip.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* "The Z180 contains a two channel 16-bit Programmable Reload Timer. Each
* PRT channel contains a 16-bit down counter and a 16-bit reload register."
* Channel 0 is dedicated as the system timer.
*/
/* "The PRT input clock for both channels is equal to the system clock
* divided by 20."
*/
#define Z180_PRT_CLOCK (Z180_SYSCLOCK / 20)
/* The data Register "(TMDR) is decremented once every twenty clocks. When
* TMDR counts down to 0, it is automatically reloaded with the value
* contained in the Reload Register (RLDR)."
*/
#define A180_PRT0_RELOAD (Z180_PRT_CLOCK / CLK_TCK)
/****************************************************************************
* Private Types
****************************************************************************/
/****************************************************************************
* Private Function Prototypes
****************************************************************************/
/****************************************************************************
* Global Functions
****************************************************************************/
/****************************************************************************
* Function: up_timerisr
*
* Description:
* The timer ISR will perform a variety of services for various portions
* of the systems.
*
****************************************************************************/
int up_timerisr(int irq, chipreg_t *regs)
{
volatile uint8_t regval;
/* "When TMDR0 decrements to 0, TIF0 is set to 1. This generates an interrupt
* request if enabled by TIE0 = 1. TIF0 is reset to 0 when TCR is read and
* the higher or lower byte of TMDR0 is read."
*/
regval = inp(Z180_PRT_TCR);
regval = inp(Z180_PRT0_DRL);
regval = inp(Z180_PRT0_DRH);
/* Process timer interrupt */
sched_process_timer();
return 0;
}
/****************************************************************************
* Function: up_timerinit
*
* Description:
* This function is called during start-up to initialize the timer
* interrupt.
*
****************************************************************************/
void up_timerinit(void)
{
uint8_t regval;
/* Configure PRT0 to interrupt at the requested rate */
/* First stop PRT0 and disable interrupts */
regval = inp(Z180_PRT_TCR);
regval &= (PRT_TCR_TIF0|PRT_TCR_TIE0|PRT_TCR_TDE0);
outp(Z180_PRT_TCR, regval);
/* Set the timer reload value so that the timer will interrupt at the
* desired frequency. "For writing, the TMDR down counting must be
* inhibited using the TDE (Timer Down Count Enable) bits in the TCR
* (Timer Control Register). Then, any or both higher and lower bytes of
* TMDR can be freely written (and read) in any order."
*/
outp(Z180_PRT0_RLDRL, (A180_PRT0_RELOAD & 0xff));
outp(Z180_PRT0_RLDRH, (A180_PRT0_RELOAD >> 8));
/* Enable down-counting */
regval |= PRT_TCR_TDE0;
outp(Z180_PRT_TCR, regval);
/* Attach the timer interrupt vector */
(void)irq_attach(Z180_PRT0, (xcpt_t)up_timerisr);
/* And enable the timer interrupt */
regval |= PRT_TCR_TIE0;
outp(Z180_PRT_TCR, regval);
}

8
nuttx/configs/p112/include/board.h
View File

@ -41,8 +41,14 @@
************************************************************/
/************************************************************
* Definitions
* Pre-processor Definitions
************************************************************/
/* The Z180 is driven by a 16MHz crystal. The system clock
* is equal to the crystal frequency.
*/
#define Z180_BOARD_XTAL 16000000 /* 16 MHz */
#define Z180_SYSCLOCK Z180_BOARD_XTAL /* 16 MHz */
/************************************************************
* Public Functions

4
nuttx/configs/p112/ostest/defconfig
View File

@ -140,7 +140,7 @@ CONFIG_Z180_PHYSHEAP_END=0x100000
# CONFIG_Z180_UART1 is not set
CONFIG_Z180_ESCCA=y
# CONFIG_Z180_ESCCB is not set
# CONFIG_Z180_TMR1 is not set
# CONFIG_Z180_PRT1 is not set
# CONFIG_Z180_PORTA is not set
# CONFIG_Z180_PORTB is not set
# CONFIG_Z180_MIMIC is not set
@ -159,7 +159,7 @@ CONFIG_Z180_ESCCA_2STOP=0
#
# Architecture Options
#
# CONFIG_ARCH_NOINTC is not set
CONFIG_ARCH_NOINTC=y
# CONFIG_ARCH_DMA is not set
# CONFIG_ARCH_IRQPRIO is not set
# CONFIG_CUSTOM_STACK is not set

2
nuttx/configs/xtrs/nsh/defconfig
View File

@ -79,7 +79,7 @@ CONFIG_LINKER_ROM_AT_0000=y
#
# Architecture Options
#
# CONFIG_ARCH_NOINTC is not set
CONFIG_ARCH_NOINTC=y
# CONFIG_ARCH_DMA is not set
# CONFIG_ARCH_IRQPRIO is not set
# CONFIG_ARCH_STACKDUMP is not set

2
nuttx/configs/xtrs/ostest/defconfig
View File

@ -79,7 +79,7 @@ CONFIG_LINKER_ROM_AT_0000=y
#
# Architecture Options
#
# CONFIG_ARCH_NOINTC is not set
CONFIG_ARCH_NOINTC=y
# CONFIG_ARCH_DMA is not set
# CONFIG_ARCH_IRQPRIO is not set
# CONFIG_ARCH_STACKDUMP is not set

2
nuttx/configs/xtrs/pashello/defconfig
View File

@ -80,7 +80,7 @@ CONFIG_LINKER_ROM_AT_0000=y
#
# Architecture Options
#
# CONFIG_ARCH_NOINTC is not set
CONFIG_ARCH_NOINTC=y
# CONFIG_ARCH_DMA is not set
# CONFIG_ARCH_IRQPRIO is not set
# CONFIG_ARCH_STACKDUMP is not set

30
nuttx/configs/xtrs/src/xtr_irq.c
View File

@ -88,33 +88,3 @@ void up_irqinitialize(void)
irqrestore(Z80_C_FLAG);
#endif
}
/****************************************************************************
* Name: up_disable_irq
*
* Description:
* Disable the IRQ specified by 'irq'
*
****************************************************************************/
#ifndef CONFIG_ARCH_NOINTC
void up_disable_irq(int irq)
{
irqrestore(0);
}
#endif
/****************************************************************************
* Name: up_enable_irq
*
* Description:
* Enable the IRQ specified by 'irq'
*
****************************************************************************/
#ifndef CONFIG_ARCH_NOINTC
void up_enable_irq(int irq)
{
irqrestore(Z80_C_FLAG);
}
#endif

2
nuttx/configs/z80sim/nsh/defconfig
View File

@ -79,7 +79,7 @@ CONFIG_LINKER_DATA_AREA=0x8000
#
# Architecture Options
#
# CONFIG_ARCH_NOINTC is not set
CONFIG_ARCH_NOINTC=y
# CONFIG_ARCH_DMA is not set
# CONFIG_ARCH_IRQPRIO is not set
# CONFIG_ARCH_STACKDUMP is not set

2
nuttx/configs/z80sim/ostest/defconfig
View File

@ -79,7 +79,7 @@ CONFIG_LINKER_DATA_AREA=0x8000
#
# Architecture Options
#
# CONFIG_ARCH_NOINTC is not set
CONFIG_ARCH_NOINTC=y
# CONFIG_ARCH_DMA is not set
# CONFIG_ARCH_IRQPRIO is not set
# CONFIG_ARCH_STACKDUMP is not set

2
nuttx/configs/z80sim/pashello/defconfig
View File

@ -79,7 +79,7 @@ CONFIG_LINKER_DATA_AREA=0x8000
#
# Architecture Options
#
# CONFIG_ARCH_NOINTC is not set
CONFIG_ARCH_NOINTC=y
# CONFIG_ARCH_DMA is not set
# CONFIG_ARCH_IRQPRIO is not set
# CONFIG_ARCH_STACKDUMP is not set

30
nuttx/configs/z80sim/src/z80_irq.c
View File

@ -88,33 +88,3 @@ void up_irqinitialize(void)
irqrestore(Z80_C_FLAG);
#endif
}
/****************************************************************************
* Name: up_disable_irq
*
* Description:
* Disable the IRQ specified by 'irq'
*
****************************************************************************/
#ifndef CONFIG_ARCH_NOINTC
void up_disable_irq(int irq)
{
irqrestore(0);
}
#endif
/****************************************************************************
* Name: up_enable_irq
*
* Description:
* Enable the IRQ specified by 'irq'
*
****************************************************************************/
#ifndef CONFIG_ARCH_NOINTC
void up_enable_irq(int irq)
{
irqrestore(Z80_C_FLAG);
}
#endif