forked from Archive/PX4-Autopilot
airmind_mindpx-v2: add board_dma_map.h and enable SPI1 DMA
This commit is contained in:
Daniel Agar
parent
e24fcee214
commit
98108bc4da
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@ -40,6 +40,7 @@
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include "board_dma_map.h"
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#include <nuttx/config.h>
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#ifndef __ASSEMBLY__
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@ -195,17 +196,6 @@
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# define SDIO_SDXFR_CLKDIV (2 << SDIO_CLKCR_CLKDIV_SHIFT)
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#endif
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/* DMA Channl/Stream Selections *****************************************************/
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/* Stream selections are arbitrary for now but might become important in the future
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* is we set aside more DMA channels/streams.
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*
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* SDIO DMA
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* DMAMAP_SDIO_1 = Channel 4, Stream 3 <- may later be used by SPI DMA
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* DMAMAP_SDIO_2 = Channel 4, Stream 6
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*/
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#define DMAMAP_SDIO DMAMAP_SDIO_1
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/* Alternate function pin selections ************************************************/
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/*
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@ -235,10 +225,6 @@
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/* UART8 has no alternate pin config */
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/* UART RX DMA configurations */
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#define DMAMAP_USART1_RX DMAMAP_USART1_RX_2
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#define DMAMAP_USART6_RX DMAMAP_USART6_RX_2
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/*
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* CAN
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*
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@ -303,7 +289,7 @@ extern "C" {
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*
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* Description:
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* All STM32 architectures must provide the following entry point. This entry point
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* is called early in the intitialization -- after all memory has been configured
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* is called early in the initialization -- after all memory has been configured
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* and mapped but before any devices have been initialized.
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*
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************************************************************************************/
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@ -0,0 +1,49 @@
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/****************************************************************************
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*
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* Copyright (c) 2020 PX4 Development Team. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name PX4 nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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#pragma once
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// DMA1 Channel/Stream Selections
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//--------------------------------------------//---------------------------//----------------
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// DMA2 Channel/Stream Selections
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//--------------------------------------------//---------------------------//----------------
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#define DMACHAN_SPI1_RX DMAMAP_SPI1_RX_1 // DMA2, Stream 0, Channel 3 (SPI sensors RX)
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#define DMAMAP_USART6_RX DMAMAP_USART6_RX_1 // DMA2, Stream 1, Channel 4
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#define DMAMAP_USART1_RX DMAMAP_USART1_RX_1 // DMA2, Stream 2, Channel 4
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#define DMACHAN_SPI1_TX DMAMAP_SPI1_TX_1 // DMA2, Stream 3, Channel 3 (SPI sensors TX)
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// AVAILABLE // DMA2, Stream 4
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// AVAILABLE // DMA2, Stream 5, Channel 6
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#define DMAMAP_SDIO DMAMAP_SDIO_2 // DMA2, Stream 6, Channel 4
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@ -187,8 +187,10 @@ CONFIG_STM32_SDIO_CARD=y
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CONFIG_STM32_SERIALBRK_BSDCOMPAT=y
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CONFIG_STM32_SERIAL_DISABLE_REORDERING=y
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CONFIG_STM32_SPI1=y
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CONFIG_STM32_SPI1_DMA=y
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CONFIG_STM32_SPI2=y
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CONFIG_STM32_SPI4=y
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CONFIG_STM32_SPI_DMA=y
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CONFIG_STM32_TIM10=y
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CONFIG_STM32_TIM11=y
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CONFIG_STM32_TIM3=y
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@ -218,7 +220,6 @@ CONFIG_UART7_SERIAL_CONSOLE=y
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CONFIG_UART7_TXBUFSIZE=300
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CONFIG_UART8_BAUD=57600
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CONFIG_UART8_RXBUFSIZE=300
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CONFIG_UART8_RXDMA=y
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CONFIG_UART8_TXBUFSIZE=300
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CONFIG_USART1_RXBUFSIZE=128
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CONFIG_USART1_RXDMA=y
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@ -232,7 +232,7 @@
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/* This board provides a DMA pool and APIs */
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#define BOARD_DMA_ALLOC_POOL_SIZE 5120
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#define BOARD_DMA_ALLOC_POOL_SIZE (5120 + 512 + 512) // 5120 fat + 512 + 512 spi
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/* This board provides the board_on_reset interface */
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