forked from Archive/PX4-Autopilot
Mostly cosmetic updates
git-svn-id: https://nuttx.svn.sourceforge.net/svnroot/nuttx/trunk@4980 7fd9a85b-ad96-42d3-883c-3090e2eb8679
This commit is contained in:
patacongo
parent
cbc32cd067
commit
94b6f9e9cc
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@ -8,7 +8,7 @@
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<tr align="center" bgcolor="#e4e4e4">
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<td>
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<h1><big><font color="#3c34ec"><i>NuttX RTOS</i></font></big></h1>
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<p>Last Updated: July 19, 2012</p>
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<p>Last Updated: July 25, 2012</p>
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</td>
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</tr>
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</table>
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@ -2300,11 +2300,13 @@
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<b>STATUS:</b>
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The basic port is code complete.
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Two configurations are available:
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An OS test configuration and a that support the NuttShell (NSH).
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(1) An OS test configuration and a (2) configuration that support the NuttShell (NSH).
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The OS test configuration is fully functional and proves that we have a basically healthy NuttX port to the Mirtoo.
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This includes support for the SST25 serial FLASH on board the module.
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The NSH configuration includes support for a serial console and for the SST25 serial FLASH and the PGA117 amplifier/multiplexer on board the module.
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The NSH configuration is set up to use the NuttX wear-leveling FLASH file system (NXFFS).
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The PGA117, however, is not yet fully integrated to support ADC sampling.
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See the <a href="http://www.nuttx.org/NuttShell.html">NSH User Guide</a> for further information about NSH.
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There are some remaining issues to be resolved with the NSH configuration but, with any luck, the verified port should be available with the NuttX 6.20 release.
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The first verified port to the Mirtoo module was available with the NuttX 6.20 release.
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</p>
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</ul>
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</td>
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@ -39,6 +39,7 @@
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<td> </td>
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<td>
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<li><a href="http://osmocom.org/" target="top">Osmocom-BB</a></li>
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<li><a href="https://pixhawk.ethz.ch/px4/" target="top">PX4 Autopilot</a></li>
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<li><a href="http://rgmp.sourceforge.net/wiki/index.php/Main_Page" target="top">RGMP</a></li>
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</tr>
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<tr>
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@ -508,12 +508,12 @@ I purchased an LCD display on eBay from china. The LCD is 320x240 RGB565 and
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is based on an SSD1289 LCD controller and an XPT2046 touch IC. The pin out
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from the 2x16 connect on the LCD is labeled as follows:
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LCD CONNECTOR: SSD1289 MPU INTERFACE PINS
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LCD CONNECTOR: SSD1289 MPU INTERFACE PINS:
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+------+------+ DEN I Display enble pin
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1 | GND | 3V3 | 2 VSYNC I Frame synchonrization signal
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+------+------+ HSYNC I Line synchroniziation signal
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3 | D1 | D0 | 4 DOTCLIK I Dot clock ans OSC source
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+------+------+ DEN I Display enable pin
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1 | GND | 3V3 | 2 VSYNC I Frame synchronization signal
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+------+------+ HSYNC I Line synchronization signal
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3 | D1 | D0 | 4 DOTCLK I Dot clock and OSC source
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+------+------+ DC I Data or command
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5 | D3 | D2 | 6 E (~RD) I Enable/Read strobe
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+------+------+ R (~WR) I Read/Write strobe
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@ -531,12 +531,12 @@ LCD CONNECTOR: SSD1289 MPU INTERFACE PINS
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+------+------+
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19 | RS | CS | 20
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+------+------+
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21 | RD | WR | 22
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21 | RD | WR | 22 NOTES:
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+------+------+
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23 |EL_CNT|RESET | 24
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+------+------+
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25 |TP_RQ |TP_S0 | 26 These pins are for the touch panel
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23 |BL_CNT|RESET | 24 BL_CNT is the PWM backlight level control.
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+------+------+
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25 |TP_RQ |TP_S0 | 26 These pins are for the touch panel: TP_REQ
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+------+------+ TP_S0, TP_SI, TP_SCX, and TP_CS
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27 | NC |TP_SI | 28
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+------+------+
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29 | NC |TP_SCX| 30
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@ -546,31 +546,32 @@ LCD CONNECTOR: SSD1289 MPU INTERFACE PINS
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MAPPING TO STM32 F4:
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---------------- ------------- ----------------------------------
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---------------- -------------- ----------------------------------
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STM32 FUNCTION LCD PIN STM32F4Discovery PIN
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---------------- ------------- ----------------------------------
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FSMC_D0 D0 pin 4 PD14 P1 pin 46 Conflict (Note 1)
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FSMC_D1 D1 pin 3 PD15 P1 pin 47 Conflict (Note 2)
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FSMC_D2 D2 pin 6 PD0 P2 pin 36 Free I/O
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FSMC_D3 D3 pin 5 PD1 P2 pin 33 Free I/O
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FSMC_D4 D4 pin 8 PE7 P1 pin 25 Free I/O
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FSMC_D5 D5 pin 7 PE8 P1 pin 26 Free I/O
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FSMC_D6 D6 pin 10 PE9 P1 pin 27 Free I/O
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FSMC_D7 D7 pin 9 PE10 P1 pin 28 Free I/O
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FSMC_D8 D8 pin 12 PE11 P1 pin 29 Free I/O
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FSMC_D9 D9 pin 11 PE12 P1 pin 30 Free I/O
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FSMC_D10 D10 pin 14 PE13 P1 pin 31 Free I/O
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FSMC_D11 D11 pin 13 PE14 P1 pin 32 Free I/O
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FSMC_D12 D12 pin 16 PE15 P1 pin 33 Free I/O
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FSMC_D13 D13 pin 15 PD8 P1 pin 40 Free I/O
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FSMC_D14 D14 pin 18 PD9 P1 pin 41 Free I/O
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FSMC_D15 D15 pin 17 PD10 P1 pin 42 Free I/O
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FSMC_A16 RS pin 19 PD11 P1 pin 27 Free I/O
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FSMC_NE1 ~CS pin 10 PD7 P2 pin 27 Free I/O
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FSMC_NWE ~WR pin 22 PD5 P2 pin 29 Conflict (Note 3)
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FSMC_NOE ~RD pin 21 PD4 P2 pin 32 Conflict (Note 4)
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PC6 RESET pin 24 PC6 P2 pin 47 Free I/O
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---------------- ------------- ----------------------------------
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---------------- -------------- ----------------------------------
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FSMC_D0 D0 pin 4 PD14 P1 pin 46 Conflict (Note 1)
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FSMC_D1 D1 pin 3 PD15 P1 pin 47 Conflict (Note 2)
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FSMC_D2 D2 pin 6 PD0 P2 pin 36 Free I/O
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FSMC_D3 D3 pin 5 PD1 P2 pin 33 Free I/O
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FSMC_D4 D4 pin 8 PE7 P1 pin 25 Free I/O
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FSMC_D5 D5 pin 7 PE8 P1 pin 26 Free I/O
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FSMC_D6 D6 pin 10 PE9 P1 pin 27 Free I/O
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FSMC_D7 D7 pin 9 PE10 P1 pin 28 Free I/O
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FSMC_D8 D8 pin 12 PE11 P1 pin 29 Free I/O
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FSMC_D9 D9 pin 11 PE12 P1 pin 30 Free I/O
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FSMC_D10 D10 pin 14 PE13 P1 pin 31 Free I/O
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FSMC_D11 D11 pin 13 PE14 P1 pin 32 Free I/O
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FSMC_D12 D12 pin 16 PE15 P1 pin 33 Free I/O
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FSMC_D13 D13 pin 15 PD8 P1 pin 40 Free I/O
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FSMC_D14 D14 pin 18 PD9 P1 pin 41 Free I/O
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FSMC_D15 D15 pin 17 PD10 P1 pin 42 Free I/O
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FSMC_A16 RS pin 19 PD11 P1 pin 27 Free I/O
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FSMC_NE1 ~CS pin 10 PD7 P2 pin 27 Free I/O
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FSMC_NWE ~WR pin 22 PD5 P2 pin 29 Conflict (Note 3)
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FSMC_NOE ~RD pin 21 PD4 P2 pin 32 Conflict (Note 4)
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PC6 RESET pin 24 PC6 P2 pin 47 Free I/O
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Timer ouput BL_CNT pin 23 (to be determined)
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---------------- -------------- ----------------------------------
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1 Used for the RED LED
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2 Used for the BLUE LED
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@ -201,7 +201,7 @@ if WATCHDOG
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endif
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menuconfig ANALOG
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bool "Analog Device(adc,dac) support"
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bool "Analog Device(ADC/DAC) support"
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default n
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---help---
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This directory holds implementations of analog device drivers.
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@ -3,22 +3,75 @@
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# see misc/tools/kconfig-language.txt.
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#
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config CONFIG_ADC
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bool "Analog Digital Convert"
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config ADC
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bool "Analog-to-Digital Conversion"
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default n
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---help---
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Select to enable support for analog input device support. This includes
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not only Analog-to-Digital Converters (ADC) but also amplifiers and
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analog multiplexers.
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config ADC_ADS125X
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bool "TI ads1255/ads1256 support"
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bool "TI ADS1255/ADS1256 support"
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default n
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depends on CONFIG_ADC
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depends on ADC
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select SPI
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config CONFIG_DAC
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bool "Digital Analog Convert"
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config ADS1255_FREQUENCY
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int "ADS1255/ADS1256 SPI frequency"
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default 1000000
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depends on ADC_ADS125X
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config ADC_PGA11X
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bool "TI PGA112/3/6/7 support"
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default n
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depends on ADC
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select SPI
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---help---
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Enables support for the PGA112, PGA113, PGA116, PGA117 Zerø-Drift
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PROGRAMMABLE GAIN AMPLIFIER with MUX
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config PGA11X_SPIFREQUENCY
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int "TI PGA112/3/6/7 SPI frequency"
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default 1000000
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depends on ADC_PGA11X
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---help---
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PGA11x SPI frequency.
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config PGA11X_SPIMODE
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int "TI PGA112/3/6/7 SPI mode"
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default 0
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depends on ADC_PGA11X
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---help---
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PGA11x SPI mode. The specification says that the device operates in Mode 0 or
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Mode 3. But sometimes you need to tinker with this to get things to work
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correctly. Default: Mode 0
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config PGA11X_DAISYCHAIN
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bool "TI PGA112/3/6/7 daisy chain mode"
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default n
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depends on ADC_PGA11X
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---help---
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Enable support to use two PGA116/7's in Daisy Chain configuration.
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config PGA11X_MULTIPLE
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bool "Multiple TI PGA112/3/6/7 support"
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default n
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depends on ADC_PGA11X && !PGA11X_DAISYCHAIN
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---help---
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Can be defined to support multiple PGA11X devices on board with separate
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chip selects (not daisy chained). Each device will require a customized
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SPI interface to distinguish them when SPI_SELECT is called with
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devid=SPIDEV_MUX.
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config DAC
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bool "Digital-to-Analog Conversion"
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default n
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---help---
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Select to enable support for Digital-to-Analog Converters (DACs).
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config DAC_AD5410
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bool "AD5410 support"
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default n
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depends on CONFIG_DAC
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depends on DAC
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select SPI
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@ -2,8 +2,8 @@
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* drivers/lcd/p14201.c
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* Driver for RiT P14201 series display (wih sd1329 IC controller)
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*
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* Copyright (C) 2010 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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* Copyright (C) 2010, 2012 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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@ -269,7 +269,7 @@ static uint8_t g_runbuffer[RIT_XRES / 2];
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/* CONFIG_P14201_FRAMEBUFFER - If defined, accesses will be performed using an in-memory
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* copy of the OLEDs GDDRAM. This cost of this buffer is 128 * 64 / 2 = 4Kb. If this
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* is defined, then the driver will be full functioned. If not, then:
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* is defined, then the driver will be full functional. If not, then:
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*
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* - Reading graphics memory cannot be supported, and
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* - All pixel writes must be aligned to byte boundaries.
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@ -429,12 +429,12 @@ static const uint8_t g_setallrow[] =
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**************************************************************************************/
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/**************************************************************************************
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* Function: rit_configspi
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* Name: rit_configspi
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*
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* Description:
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* Configure the SPI for use with the P14201
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*
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* Parameters:
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* Input Parameters:
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* spi - Reference to the SPI driver structure
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*
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* Returned Value:
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@ -467,12 +467,12 @@ static inline void rit_configspi(FAR struct spi_dev_s *spi)
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}
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/**************************************************************************************
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* Function: rit_select
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* Name: rit_select
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*
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* Description:
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* Select the SPI, locking and re-configuring if necessary
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*
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* Parameters:
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* Input Parameters:
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* spi - Reference to the SPI driver structure
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*
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* Returned Value:
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@ -512,12 +512,12 @@ static void rit_select(FAR struct spi_dev_s *spi)
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#endif
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/**************************************************************************************
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* Function: rit_deselect
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* Name: rit_deselect
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*
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* Description:
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* De-select the SPI
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*
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* Parameters:
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* Input Parameters:
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* spi - Reference to the SPI driver structure
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*
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* Returned Value:
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@ -545,12 +545,12 @@ static void rit_deselect(FAR struct spi_dev_s *spi)
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#endif
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/**************************************************************************************
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* Function: rit_sndbytes
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* Name: rit_sndbytes
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*
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* Description:
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* Send a sequence of command or data bytes to the SSD1329 controller.
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*
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* Parameters:
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* Input Parameters:
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* spi - Reference to the SPI driver structure
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* buffer - A reference to memory containing the command bytes to be sent.
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* buflen - The number of command bytes in buffer to be sent
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@ -589,12 +589,12 @@ static void rit_sndbytes(FAR struct rit_dev_s *priv, FAR const uint8_t *buffer,
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}
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/**************************************************************************************
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* Function: rit_sndcmd
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* Name: rit_sndcmd
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*
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* Description:
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* Send multiple commands from a table of commands.
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*
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* Parameters:
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* Input Parameters:
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* spi - Reference to the SPI driver structure
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* table - A reference to table containing all of the commands to be sent.
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*
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@ -623,9 +623,10 @@ static void rit_sndcmds(FAR struct rit_dev_s *priv, FAR const uint8_t *table)
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* Name: rit_clear
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*
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* Description:
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* This method can be used to write a partial raster line to the LCD:
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* This method can be used to clear the entire display.
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*
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* rpriv - Reference to private driver structure
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* Input Parameters:
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* priv - Reference to private driver structure
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*
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* Assumptions:
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* Caller has selected the OLED section.
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@ -692,8 +693,9 @@ static inline void rit_clear(FAR struct rit_dev_s *priv)
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* Name: rit_putrun
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*
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* Description:
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* This method can be used to write a partial raster line to the LCD:
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* This method can be used to write a partial raster line to the LCD.
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*
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* Input Parameters:
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* row - Starting row to write to (range: 0 <= row < yres)
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* col - Starting column to write to (range: 0 <= col <= xres-npixels)
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* buffer - The buffer containing the run to be written to the LCD
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@ -778,7 +780,7 @@ static int rit_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *buffer,
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* destination bits 7:4
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*/
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run[aend] = (run[aend] & 0x0f) | (buffer[aend - start] & 0xf0);
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run[aend] = (run[aend] & 0x0f) | (buffer[aend - start] & 0xf0);
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}
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}
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@ -834,7 +836,7 @@ static int rit_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *buffer,
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* destination bits 7:4
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*/
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run[aend] = (run[aend] & 0x0f) | (curr << 4);
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run[aend] = (run[aend] & 0x0f) | (curr << 4);
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}
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}
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@ -915,6 +917,7 @@ static int rit_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *buffer,
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rit_deselect(priv->spi);
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}
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return OK;
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}
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#endif
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@ -981,16 +984,16 @@ static int rit_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer,
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memcpy(buffer, &run[start], aend - start + 1);
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}
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/* Handle any final pixel (including the special case where npixels == 1). */
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/* Handle any final pixel (including the special case where npixels == 1). */
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if (aend != end)
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{
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/* The leftmost column is contained in source bits 7:4 and in
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* destination bits 7:4
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*/
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if (aend != end)
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{
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/* The leftmost column is contained in source bits 7:4 and in
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* destination bits 7:4
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*/
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buffer[aend - start] = run[aend] & 0xf0;
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}
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buffer[aend - start] = run[aend] & 0xf0;
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}
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}
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else
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{
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@ -1020,9 +1023,10 @@ static int rit_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer,
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* destination bits 7:4
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*/
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*buffer = (curr << 4);
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*buffer = (curr << 4);
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||||
}
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||||
}
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||||
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||||
return OK;
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}
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#else
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@ -1198,13 +1202,11 @@ static int rit_setcontrast(struct lcd_dev_s *dev, unsigned int contrast)
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* setting at 0 (full off == sleep mode).
|
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*
|
||||
* Input Parameters:
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||||
*
|
||||
* spi - A reference to the SPI driver instance.
|
||||
* devno - A value in the range of 0 throuh CONFIG_P14201_NINTERFACES-1. This allows
|
||||
* support for multiple OLED devices.
|
||||
*
|
||||
* Returned Value:
|
||||
*
|
||||
* On success, this function returns a reference to the LCD object for the specified
|
||||
* OLED. NULL is returned on any failure.
|
||||
*
|
||||
|
|
|
|||
|
|
@ -76,7 +76,7 @@
|
|||
* CONFIG_SPI_OWNBUS -- If the PGA117 is enabled, this must be set to 'y'
|
||||
* if the PGA117 is the only device on the SPI bus;
|
||||
* CONFIG_DEBUG_SPI -- With CONFIG_DEBUG and CONFIG_DEBUG_VERBOSE,
|
||||
* this will enable debug output from the PGA117 driver.
|
||||
* this will enable debug output from the PGA117 driver.
|
||||
*/
|
||||
|
||||
#ifndef CONFIG_PGA11X_SPIFREQUENCY
|
||||
|
|
|
|||
Loading…
Reference in New Issue