forked from Archive/PX4-Autopilot
s32k14x:Make use of boot_app_shared shared_[un]lock
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@ -116,10 +116,14 @@ int s32k1xx_gpiosetevent(uint32_t pinset, bool risingedge, bool fallingedge, boo
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#define TIMER_HRT_CYCLES_PER_US (STM32_HCLK_FREQUENCY/1000000)
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#define TIMER_HRT_CYCLES_PER_US (STM32_HCLK_FREQUENCY/1000000)
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#define TIMER_HRT_CYCLES_PER_MS (STM32_HCLK_FREQUENCY/1000)
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#define TIMER_HRT_CYCLES_PER_MS (STM32_HCLK_FREQUENCY/1000)
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#define crc_HiLOC S32K1XX_CAN0_RXIMR27
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#define crc_HiLOC S32K1XX_CAN0_RXIMR(27)
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#define crc_LoLOC S32K1XX_CAN0_RXIMR28
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#define crc_LoLOC S32K1XX_CAN0_RXIMR(28)
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#define signature_LOC S32K1XX_CAN0_RXIMR29
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#define signature_LOC S32K1XX_CAN0_RXIMR(29)
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#define bus_speed_LOC S32K1XX_CAN0_RXIMR30
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#define bus_speed_LOC S32K1XX_CAN0_RXIMR(30)
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#define node_id_LOC S32K1XX_CAN0_RXIMR31
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#define node_id_LOC S32K1XX_CAN0_RXIMR(31)
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#define shared_unlock() do { modreg32(CAN_MCR_FRZ|CAN_MCR_HALT, CAN_MCR_FRZ|CAN_MCR_HALT, S32K1XX_CAN0_MCR); up_udelay(1000);} while (0);
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#define shared_lock() do { modreg32(0, CAN_MCR_FRZ|CAN_MCR_HALT,S32K1XX_CAN0_MCR ); } while (0);
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__END_DECLS
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__END_DECLS
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