STM32F7 disable d-cache as a precaution (#11374)

- see 1259864 Data corruption in a sequence of Write-Through stores and loads
 - if we can be certain this sequence won't occur in PX4 then the d-cache will be re-enabled
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Daniel Agar 2019-02-18 09:43:15 -05:00 committed by GitHub
parent 4c21163c78
commit 77b5c47d7f
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1 changed files with 1 additions and 2 deletions

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@ -162,8 +162,7 @@ CONFIG_ARMV7M_HAVE_DCACHE=y
CONFIG_ARMV7M_USEBASEPRI=y CONFIG_ARMV7M_USEBASEPRI=y
CONFIG_ARMV7M_BASEPRI_WAR=y CONFIG_ARMV7M_BASEPRI_WAR=y
CONFIG_ARMV7M_ICACHE=y CONFIG_ARMV7M_ICACHE=y
CONFIG_ARMV7M_DCACHE=y # CONFIG_ARMV7M_DCACHE is not set
CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y
CONFIG_ARMV7M_HAVE_ITCM=y CONFIG_ARMV7M_HAVE_ITCM=y
CONFIG_ARMV7M_HAVE_DTCM=y CONFIG_ARMV7M_HAVE_DTCM=y
# CONFIG_ARMV7M_ITCM is not set # CONFIG_ARMV7M_ITCM is not set