forked from Archive/PX4-Autopilot
stm32h7:adc Dynamically set clock prescaler & BOOST
The ADC peripheral can only support up to 50MHz on rev V silicon and 36MHz on Y silicon. The existing driver always used no prescaler and kept boost setting at 0.
This commit is contained in:
David Sidrane
Daniel Agar
parent
543454f12e
commit
76a2acb222
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@ -37,6 +37,7 @@
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#include <drivers/drv_hrt.h>
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#include <px4_arch/adc.h>
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#include "stm32_dbgmcu.h"
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#include <stm32_adc.h>
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#include <stm32_gpio.h>
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@ -96,35 +97,123 @@
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#define ADC_MAX_FADC 36000000
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#if STM32_PLL2P_FREQUENCY <= ADC_MAX_FADC
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# define ADC_CCR_PRESC_DIV ADC_CCR_PRESC_NOT_DIV
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#elif STM32_PLL2P_FREQUENCY/2 <= ADC_MAX_FADC
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# define ADC_CCR_PRESC_DIV ADC_CCR_PRESC_DIV2
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#elif STM32_PLL2P_FREQUENCY/4 <= ADC_MAX_FADC
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# define ADC_CCR_PRESC_DIV ADC_CCR_PRESC_DIV4
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#elif STM32_PLL2P_FREQUENCY/6 <= ADC_MAX_FADC
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# define ADC_CCR_PRESC_DIV ADC_CCR_PRESC_DIV6
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#elif STM32_PLL2P_FREQUENCY/8 <= ADC_MAX_FADC
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# define ADC_CCR_PRESC_DIV ADC_CCR_PRESC_DIV8
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#elif STM32_PLL2P_FREQUENCY/10 <= ADC_MAX_FADC
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# define ADC_CCR_PRESC_DIV ADC_CCR_PRESC_DIV10
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#elif STM32_PLL2P_FREQUENCY/12 <= ADC_MAX_FADC
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# define ADC_CCR_PRESC_DIV ADC_CCR_PRESC_DIV12
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#elif STM32_PLL2P_FREQUENCY/16 <= ADC_MAX_FADC
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# define ADC_CCR_PRESC_DIV ADC_CCR_PRESC_DIV16
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#elif STM32_PLL2P_FREQUENCY/32 <= ADC_MAX_FADC
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# define ADC_CCR_PRESC_DIV ADC_CCR_PRESC_DIV32
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#elif STM32_PLL2P_FREQUENCY/64 <= ADC_MAX_FADC
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# define ADC_CCR_PRESC_DIV ADC_CCR_PRESC_DIV64
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#elif STM32_PLL2P_FREQUENCY/128 <= ADC_MAX_FADC
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# define ADC_CCR_PRESC_DIV ADC_CCR_PRESC_DIV128
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#elif STM32_PLL2P_FREQUENCY/256 <= ADC_MAX_FADC
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# define ADC_CCR_PRESC_DIV ADC_CCR_PRESC_DIV256
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#else
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# error "ADC STM32_PLL2P_FREQUENCY too high - no divisor found "
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#define ADC3_INTERNAL_TEMP_SENSOR_CHANNEL 18 //define to map the internal temperature channel.
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/****************************************************************************
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* Name: adc_getclocks
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****************************************************************************/
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static int adc_getclocks(uint32_t *prescaler, uint32_t *boost)
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{
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uint32_t max_clock = ADC_MAX_FADC;
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uint32_t src_clock = STM32_PLL2P_FREQUENCY;
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uint32_t adc_clock;
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int rv = OK;
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#if STM32_RCC_D3CCIPR_ADCSRC == RCC_D3CCIPR_ADCSEL_PLL3
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src_clock = STM32_PLL3R_FREQUENCY;
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#elif STM32_RCC_D3CCIPR_ADCSRC == RCC_D3CCIPR_ADCSEL_PER
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# error ADCSEL_PER not supported
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#endif
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#define ADC3_INTERNAL_TEMP_SENSOR_CHANNEL 18 //define to map the internal temperature channel.
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/* The maximum clock is different for rev Y devices and rev V devices.
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* rev V can support an ADC clock of up to 50MHz. rev Y only supports
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* up to 36MHz.
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*/
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if ((getreg32(STM32_DEBUGMCU_BASE) & DBGMCU_IDCODE_REVID_MASK) ==
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STM32_IDCODE_REVID_V) {
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/* The max fadc is 50MHz, but there is an always-present /2 divider
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* after the configurable prescaler. Therefore, the max clock out of
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* the prescaler block is 2*50=100MHz
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*/
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max_clock = 100000000;
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}
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if (src_clock <= max_clock) {
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*prescaler = ADC_CCR_PRESC_NOT_DIV;
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adc_clock = src_clock;
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} else if (src_clock / 2 <= max_clock) {
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*prescaler = ADC_CCR_PRESC_DIV2;
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adc_clock = src_clock / 2;
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} else if (src_clock / 4 <= max_clock) {
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*prescaler = ADC_CCR_PRESC_DIV4;
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adc_clock = src_clock / 4;
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} else if (src_clock / 6 <= max_clock) {
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*prescaler = ADC_CCR_PRESC_DIV6;
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adc_clock = src_clock / 6;
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} else if (src_clock / 8 <= max_clock) {
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*prescaler = ADC_CCR_PRESC_DIV8;
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adc_clock = src_clock / 8;
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} else if (src_clock / 10 <= max_clock) {
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*prescaler = ADC_CCR_PRESC_DIV10;
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adc_clock = src_clock / 10;
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} else if (src_clock / 12 <= max_clock) {
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*prescaler = ADC_CCR_PRESC_DIV12;
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adc_clock = src_clock / 12;
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} else if (src_clock / 16 <= max_clock) {
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*prescaler = ADC_CCR_PRESC_DIV16;
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adc_clock = src_clock / 16;
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} else if (src_clock / 32 <= max_clock) {
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*prescaler = ADC_CCR_PRESC_DIV32;
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adc_clock = src_clock / 32;
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} else if (src_clock / 64 <= max_clock) {
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*prescaler = ADC_CCR_PRESC_DIV64;
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adc_clock = src_clock / 64;
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} else if (src_clock / 128 <= max_clock) {
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*prescaler = ADC_CCR_PRESC_DIV128;
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adc_clock = src_clock / 128;
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} else if (src_clock / 256 <= max_clock) {
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*prescaler = ADC_CCR_PRESC_DIV256;
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adc_clock = src_clock / 256;
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} else {
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rv = -1;
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}
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if ((getreg32(STM32_DEBUGMCU_BASE) & DBGMCU_IDCODE_REVID_MASK) ==
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STM32_IDCODE_REVID_V) {
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if (adc_clock >= 25000000) {
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*boost = ADC_CR_BOOST_50_MHZ;
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} else if (adc_clock >= 12500000) {
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*boost = ADC_CR_BOOST_25_MHZ;
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} else if (adc_clock >= 6250000) {
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*boost = ADC_CR_BOOST_12p5_MHZ;
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} else {
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*boost = ADC_CR_BOOST_6p25_MHZ;
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}
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} else {
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if (adc_clock >= 20000000) {
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*boost = ADC_CR_BOOST;
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} else {
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*boost = 0;
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}
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}
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return rv;
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}
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/****************************************************************************
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* Name: px4_arch_adc_init
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****************************************************************************/
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int px4_arch_adc_init(uint32_t base_address)
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{
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@ -158,9 +247,21 @@ int px4_arch_adc_init(uint32_t base_address)
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*free = base_address;
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/* Get cloking for this version of Siicon */
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uint32_t boost = ADC_CR_BOOST;
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uint32_t prescaler = ADC_CCR_PRESC_DIV256;
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if (adc_getclocks(&prescaler, &boost) != OK) {
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/* ERROR: source clock too high */
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PANIC();
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}
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/* do calibration if supported */
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rCR(base_address) = ADC_CR_ADVREGEN | ADC_CR_BOOST;
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rCR(base_address) = ADC_CR_ADVREGEN | boost;
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/* Wait for voltage regulator to power up */
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@ -169,7 +270,7 @@ int px4_arch_adc_init(uint32_t base_address)
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/* enable the temperature sensor, VREFINT channel and VBAT */
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rCCR(base_address) = (ADC_CCR_VREFEN | ADC_CCR_VSENSEEN | ADC_CCR_VBATEN |
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ADC_CCR_CKMODE_ASYCH | ADC_CCR_PRESC_DIV);
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ADC_CCR_CKMODE_ASYCH | prescaler);
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/* Enable ADC calibration. ADCALDIF == 0 so this is only for
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* single-ended conversions, not for differential ones.
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