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Port STM3240G-EVAL ILI93xx driver to Shenzhou board 

git-svn-id: http://svn.code.sf.net/p/nuttx/code/trunk@5188 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo 2012-09-25 19:17:52 +00:00
parent 26da047878
commit 734ea8dc16
6 changed files with 2157 additions and 34 deletions
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27
nuttx/configs/olimex-stm32-p107/include/board.h
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@ -33,6 +33,9 @@
*
************************************************************************************/
#ifndef __CONFIGS_OLIMEX_STM32_P107_INCLUDE_BOARD_H
#define __CONFIGS_OLIMEX_STM32_P107_INCLUDE_BOARD_H 1
/************************************************************************************
* Included Files
************************************************************************************/
@ -105,6 +108,20 @@
# define STM32_PLL_PLL3MUL RCC_CFGR2_PLL3MULx10 /* MCO 5MHz * 10 = 50MHz */
#endif
/************************************************************************************
* Public Data
************************************************************************************/
#ifndef __ASSEMBLY__
#undef EXTERN
#if defined(__cplusplus)
#define EXTERN extern "C"
extern "C" {
#else
#define EXTERN extern
#endif
/************************************************************************************
* Public Function Prototypes
************************************************************************************/
@ -118,4 +135,12 @@
*
************************************************************************************/
void stm32_boardinitialize(void);
EXTERN void stm32_boardinitialize(void);
#undef EXTERN
#if defined(__cplusplus)
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* __CONFIGS_OLIMEX_STM32_P107_INCLUDE_BOARD_H */

38
nuttx/configs/shenzhou/include/board.h
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@ -33,6 +33,9 @@
*
************************************************************************************/
#ifndef __CONFIGS_SHENZHOU_INCLUDE_BOARD_H
#define __CONFIGS_SHENZHOU_INCLUDE_BOARD_H 1
/************************************************************************************
* Included Files
************************************************************************************/
@ -321,6 +324,20 @@
* 63 PC6 I2S_MCK GPIO_I2S2_MCK. Audio DAC. Active low: Pulled high
*/
/************************************************************************************
* Public Data
************************************************************************************/
#ifndef __ASSEMBLY__
#undef EXTERN
#if defined(__cplusplus)
#define EXTERN extern "C"
extern "C" {
#else
#define EXTERN extern
#endif
/************************************************************************************
* Public Function Prototypes
************************************************************************************/
@ -382,3 +399,24 @@ EXTERN void stm32_ledinit(void);
EXTERN void stm32_setled(int led, bool ledon);
EXTERN void stm32_setleds(uint8_t ledset);
#endif
/************************************************************************************
* Name: stm32_lcdclear
*
* Description:
* This is a non-standard LCD interface just for the Shenzhou board. Because
* of the various rotations, clearing the display in the normal way by writing a
* sequences of runs that covers the entire display can be very slow. Here the
* display is cleared by simply setting all GRAM memory to the specified color.
*
************************************************************************************/
EXTERN void stm32_lcdclear(uint16_t color);
#undef EXTERN
#if defined(__cplusplus)
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* __CONFIGS_SHENZHOU_INCLUDE_BOARD_H */

6
nuttx/configs/shenzhou/src/Makefile
View File

@ -84,8 +84,12 @@ ifeq ($(CONFIG_WATCHDOG),y)
CSRCS += up_watchdog.c
endif
# NOTE: SSD1289 is not supported on the board
ifeq ($(CONFIG_LCD_SSD1289),y)
CSRCS += up_ssd1289.c
CSRCS += up_ssd1289.c
else
CSRCS += up_lcd.c
endif
COBJS = $(CSRCS:.c=$(OBJEXT))

56
nuttx/configs/shenzhou/src/shenzhou-internal.h
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@ -224,39 +224,56 @@
/* TFT LCD GPIOs */
#define GPIO_LCD_D0 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
#define GPIO_LCD_D0OUT (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN0)
#define GPIO_LCD_D1 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
#define GPIO_LCD_D1OUT (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN1)
#define GPIO_LCD_D2 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
#define GPIO_LCD_D2OUT (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN2)
#define GPIO_LCD_D3 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
#define GPIO_LCD_D3OUT (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN3)
#define GPIO_LCD_D4 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
#define GPIO_LCD_D4OUT (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN4)
#define GPIO_LCD_D5 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
#define GPIO_LCD_D5OUT (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN5)
#define GPIO_LCD_D6 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
#define GPIO_LCD_D6OUT (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN6)
#define GPIO_LCD_D7 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
#define GPIO_LCD_D7OUT (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN7)
#define GPIO_LCD_D8 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
#define GPIO_LCD_D8OUT (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN8)
#define GPIO_LCD_D9 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
#define GPIO_LCD_D9OUT (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN9)
#define GPIO_LCD_D10 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
#define GPIO_LCD_D10OUT (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN10)
#define GPIO_LCD_D11 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
#define GPIO_LCD_D11OUT (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN11)
#define GPIO_LCD_D12 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
#define GPIO_LCD_D12OUT (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN12)
#define GPIO_LCD_D13 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
#define GPIO_LCD_D13OUT (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN13)
#define GPIO_LCD_D14 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
#define GPIO_LCD_D14OUT (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN14)
#define GPIO_LCD_D15 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
#define GPIO_LCD_D15OUT (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN15)
#define GPIO_LCD_D0IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_PORTE|GPIO_PIN0)
#define GPIO_LCD_D1IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_PORTE|GPIO_PIN1)
#define GPIO_LCD_D2IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_PORTE|GPIO_PIN2)
#define GPIO_LCD_D3IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_PORTE|GPIO_PIN3)
#define GPIO_LCD_D4IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_PORTE|GPIO_PIN4)
#define GPIO_LCD_D5IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_PORTE|GPIO_PIN5)
#define GPIO_LCD_D6IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_PORTE|GPIO_PIN6)
#define GPIO_LCD_D7IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_PORTE|GPIO_PIN7)
#define GPIO_LCD_D8IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_PORTE|GPIO_PIN8)
#define GPIO_LCD_D9IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_PORTE|GPIO_PIN9)
#define GPIO_LCD_D10IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_PORTE|GPIO_PIN10)
#define GPIO_LCD_D11IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_PORTE|GPIO_PIN11)
#define GPIO_LCD_D12IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_PORTE|GPIO_PIN12)
#define GPIO_LCD_D13IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_PORTE|GPIO_PIN13)
#define GPIO_LCD_D14IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_PORTE|GPIO_PIN14)
#define GPIO_LCD_D15IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_PORTE|GPIO_PIN15)
#define GPIO_LCD_RS (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
GPIO_OUTPUT_SET|GPIO_PORTD|GPIO_PIN13)
#define GPIO_LCD_CS (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
@ -290,7 +307,12 @@
#define LCD_LE_CLEAR LCD_BIT_CLEAR(STM32_GPIOB_OFFSET, 2) /* GPIO_PORTB|GPIO_PIN2 */
#define LCD_LE_SET LCD_BIT_SET(STM32_GPIOB_OFFSET, 2)
#define LCD_DATA STM32_GPIOE_ODR
#define LCD_CRL STM32_GPIOE_CRL
#define LCD_CRH STM32_GPIOE_CRH
#define LCD_INPUT 0x44444444
#define LCD_OUTPUT 0x33333333
#define LCD_ODR STM32_GPIOE_ODR
#define LCD_IDR STM32_GPIOE_IDR
/* Touchscreen IC on the LCD module */

1940
nuttx/configs/shenzhou/src/up_lcd.c Normal file
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File diff suppressed because it is too large Load Diff

124
nuttx/configs/shenzhou/src/up_ssd1289.c
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@ -68,11 +68,6 @@
* Pre-processor Definitions
************************************************************************************/
/* Configuration ********************************************************************/
#ifndef CONFIG_SSD1289_WRONLY
# warning "Only write access is supported; CONFIG_SSD1289_WRONLY should be defined"
#endif
/* Define CONFIG_DEBUG_LCD to enable detailed LCD debug output. Verbose debug must
* also be enabled.
*/
@ -87,6 +82,9 @@
# undef CONFIG_DEBUG_LCD
#endif
#undef CONFIG_LCD_FASTCONFIG
#define CONFIG_LCD_FASTCONFIG 1
/* Shenzhou LCD Hardware Definitions ************************************************/
/* Debug ****************************************************************************/
@ -108,6 +106,9 @@
/* Helpers */
static void stm32_wrdata(uint16_t data);
#ifndef CONFIG_SSD1289_WRONLY
static uint16_t stm32_rddata(void);
#endif
/* Low Level LCD access */
@ -125,9 +126,9 @@ static void stm32_backlight(FAR struct ssd1289_lcd_s *dev, int power);
************************************************************************************/
/* TFT LCD
*
* -- ---- -------------- -------------------------------------------------------------------
* -- ---- -------------- -----------------------------------------------------------
* PN NAME SIGNAL NOTES
* -- ---- -------------- -------------------------------------------------------------------
* -- ---- -------------- -----------------------------------------------------------
* 37 PB2 DATA_LE To TFT LCD (CN13, ping 28)
* 96 PB9 F_CS To both the TFT LCD (CN13, pin 30) and to the W25X16 SPI FLASH
* 34 PC5 TP_INT JP6. To TFT LCD (CN13) module (CN13, pin 26)
@ -198,14 +199,27 @@ static void stm32_backlight(FAR struct ssd1289_lcd_s *dev, int power);
/* LCD GPIO configurations */
#ifndef CONFIG_LCD_FASTCONFIG
static const uint32_t g_lcdout[16] =
{
GPIO_LCD_D0OUT, GPIO_LCD_D1OUT, GPIO_LCD_D2OUT, GPIO_LCD_D3OUT,
GPIO_LCD_D4OUT, GPIO_LCD_D5OUT, GPIO_LCD_D6OUT, GPIO_LCD_D7OUT,
GPIO_LCD_D8OUT, GPIO_LCD_D9OUT, GPIO_LCD_D10OUT, GPIO_LCD_D11OUT,
GPIO_LCD_D12OUT, GPIO_LCD_D13OUT, GPIO_LCD_D14OUT, GPIO_LCD_D15OUT
};
static const uint32_t g_lcdin[16] =
{
GPIO_LCD_D0IN, GPIO_LCD_D1IN, GPIO_LCD_D2IN, GPIO_LCD_D3IN,
GPIO_LCD_D4IN, GPIO_LCD_D5IN, GPIO_LCD_D6IN, GPIO_LCD_D7IN,
GPIO_LCD_D8IN, GPIO_LCD_D9IN, GPIO_LCD_D10IN, GPIO_LCD_D11IN,
GPIO_LCD_D12IN, GPIO_LCD_D13IN, GPIO_LCD_D14IN, GPIO_LCD_D15IN
};
#endif
static const uint32_t g_lcdconfig[] =
{
GPIO_LCD_D0, GPIO_LCD_D1, GPIO_LCD_D2, GPIO_LCD_D3,
GPIO_LCD_D4, GPIO_LCD_D5, GPIO_LCD_D6, GPIO_LCD_D7,
GPIO_LCD_D8, GPIO_LCD_D9, GPIO_LCD_D10, GPIO_LCD_D11,
GPIO_LCD_D12, GPIO_LCD_D13, GPIO_LCD_D14, GPIO_LCD_D15,
GPIO_LCD_RS, GPIO_LCD_CS, GPIO_LCD_RD, GPIO_LCD_WR,
GPIO_LCD_RS, GPIO_LCD_CS, GPIO_LCD_RD, GPIO_LCD_WR,
GPIO_LCD_LE,
};
#define NLCD_CONFIG (sizeof(g_lcdconfig)/sizeof(uint32_t))
@ -242,13 +256,41 @@ static FAR struct lcd_dev_s *g_ssd1289drvr;
static void stm32_wrdata(uint16_t data)
{
/* Make sure D0-D15 are configured as outputs */
stm32_lcdoutput();
/* Latch the 16-bit LCD data and toggle the WR line */
putreg32((uint32_t)data, LCD_DATA);
putreg32(1, LCD_WR_CLEAR);
putreg32((uint32_t)data, LCD_ODR);
putreg32(1, LCD_WR_SET);
}
/************************************************************************************
* Name: stm32_rddata
*
* Description:
* Latch data on D0-D15 and toggle the WR line.
*
************************************************************************************/
#ifndef CONFIG_SSD1289_WRONLY
static uint16_t stm32_rddata(void);
{
/* Make sure D0-D15 are configured as inputs */
stm32_lcdinput();
/* Toggle the RD line to latch the 16-bit LCD data */
#warning "Requires pins configured as inputs"
putreg32(1, LCD_RD_CLEAR);
putreg32(1, LCD_RD_SET);
return (uin16_t)getreg32(LCD_IDR);
}
#endif
/************************************************************************************
* Name: stm32_select
*
@ -309,7 +351,13 @@ static void stm32_index(FAR struct ssd1289_lcd_s *dev, uint8_t index)
#ifndef CONFIG_SSD1289_WRONLY
static uint16_t stm32_read(FAR struct ssd1289_lcd_s *dev)
{
#warning "Missing logic"
/* Set the RS signal */
putreg32(1, LCD_RS_CLR);
/* And return the data */
return stm32_rddata();
}
#endif
@ -345,6 +393,51 @@ static void stm32_backlight(FAR struct ssd1289_lcd_s *dev, int power)
/* There is no software control over the backlight */
}
/************************************************************************************
* Name: stm32_lcdinput
*
* Description:
* Config data lines for input operations.
*
************************************************************************************/
static void stm32_lcdinput(void)
{
#ifdef CONFIG_LCD_FASTCONFIG
putreg32(LCD_INPUT, LCD_CRL);
putreg32(LCD_INPUT, LCD_CRH);
#else
int i;
/* Configure GPIO data lines as inputs */
for (i = 0; i < 16; i++)
{
stm32_configgpio(g_lcdin[i]);
}
#endif
}
/************************************************************************************
* Name: stm32_lcdoutput
*
* Description:
* Config data lines for output operations.
*
************************************************************************************/
static void stm32_lcdoutput(void)
{
int i;
/* Configure GPIO data lines as outputs */
for (i = 0; i < 16; i++)
{
stm32_configgpio(g_lcdout[i]);
}
}
/************************************************************************************
* Public Functions
************************************************************************************/
@ -371,6 +464,7 @@ int up_lcdinitialize(void)
/* Configure GPIO pins */
stm32_lcdoutput();
for (i = 0; i < NLCD_CONFIG; i++)
{
stm32_configgpio(g_lcdconfig[i]);