px4_fmu-v4pro: cleanup board_dma_map.h

This commit is contained in:
Daniel Agar 2020-02-22 00:47:56 -05:00
parent 147e37ac88
commit 6834f089cc
2 changed files with 57 additions and 24 deletions

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@ -1,23 +1,56 @@
/****************************************************************************
*
* Copyright (c) 2020 PX4 Development Team. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name PX4 nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
#pragma once
/* DMA Channel/Stream Selections
*
* DMAMAP_USART3_RX = DMA1, Stream 1, Channel 4
* DMAMAP_UART4_RX = DMA1, Stream 2, Channel 4
* DMAMAP_UART7_RX = DMA1, Stream 3, Channel 5
* DMAMAP_USART2_RX = DMA1, Stream 5, Channel 4
* DMAMAP_UART8_RX = DMA1, Stream 6, Channel 5
*
*   DMAMAP_SPI1_RX_1 = DMA2, Stream 0, Channel 3
*   DMAMAP_USART6_RX_2 = DMA2, Stream 2, Channel 5
*   DMAMAP_SPI1_TX_1 = DMA2, Stream 3, Channel 3
* DMAMAP_USART1_RX_2 = DMA2, Stream 5, Channel 4
*   DMAMAP_SDIO_2 = DMA2, Stream 6, Channel 4
* DMAMAP_USART6_TX_2 = DMA2, Stream 7, Channel 5
*/
#define DMACHAN_SPI1_RX DMAMAP_SPI1_RX_1
#define DMAMAP_USART6_RX DMAMAP_USART6_RX_2
#define DMACHAN_SPI1_TX DMAMAP_SPI1_TX_1
#define DMAMAP_USART1_RX DMAMAP_USART1_RX_2
#define DMAMAP_SDIO DMAMAP_SDIO_2
#define DMAMAP_USART6_TX DMAMAP_USART6_TX_2
// DMA1 Channel/Stream Selections
//--------------------------------------------//---------------------------//----------------
// DMAMAP_USART3_RX // DMA1, Stream 1, Channel 4
// DMAMAP_UART4_RX // DMA1, Stream 2, Channel 4
// DMAMAP_UART7_RX // DMA1, Stream 3, Channel 5
// AVAILABLE // DMA1, Stream 4
// DMAMAP_USART2_RX // DMA1, Stream 5, Channel 4
// DMAMAP_UART8_RX // DMA1, Stream 6, Channel 5
// DMA2 Channel/Stream Selections
//--------------------------------------------//---------------------------//----------------
#define DMACHAN_SPI1_RX DMAMAP_SPI1_RX_1 // DMA2, Stream 0, Channel 3 (SPI sensors RX)
// AVAILABLE // DMA2, Stream 1
#define DMAMAP_USART6_RX DMAMAP_USART6_RX_2 // DMA2, Stream 2, Channel 5 (PX4IO TX)
#define DMACHAN_SPI1_TX DMAMAP_SPI1_TX_1 // DMA2, Stream 3, Channel 3 (SPI sensors TX)
// AVAILABLE // DMA2, Stream 4
#define DMAMAP_USART1_RX DMAMAP_USART1_RX_2 // DMA2, Stream 5, Channel 4
#define DMAMAP_SDIO DMAMAP_SDIO_2 // DMA2, Stream 6, Channel 4
#define DMAMAP_USART6_TX DMAMAP_USART6_TX_2 // DMA2, Stream 7, Channel 5 (PX4IO TX)

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@ -58,8 +58,8 @@
#define PX4IO_SERIAL_RX_GPIO GPIO_USART6_RX
#define PX4IO_SERIAL_BASE STM32_USART6_BASE /* hardwired on the board */
#define PX4IO_SERIAL_VECTOR STM32_IRQ_USART6
#define PX4IO_SERIAL_TX_DMAMAP DMAMAP_USART6_TX_2
#define PX4IO_SERIAL_RX_DMAMAP DMAMAP_USART6_RX_2
#define PX4IO_SERIAL_TX_DMAMAP DMAMAP_USART6_TX
#define PX4IO_SERIAL_RX_DMAMAP DMAMAP_USART6_RX
#define PX4IO_SERIAL_RCC_REG STM32_RCC_APB2ENR
#define PX4IO_SERIAL_RCC_EN RCC_APB2ENR_USART6EN
#define PX4IO_SERIAL_CLOCK STM32_PCLK2_FREQUENCY
@ -285,7 +285,7 @@
#define BOARD_HAS_PWM DIRECT_PWM_OUTPUT_CHANNELS
/* This board provides a DMA pool and APIs. */
#define BOARD_DMA_ALLOC_POOL_SIZE (5120 + 512 + 1008) // 5120 fat + 512 + 1008 spi
#define BOARD_DMA_ALLOC_POOL_SIZE (5120 + 512 + 1024) // 5120 fat + 512 + 1024 spi
#define BOARD_HAS_ON_RESET 1