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configs/cloudctrl and tools/prebuild.py from Darcy Gong 

git-svn-id: http://svn.code.sf.net/p/nuttx/code/trunk@5378 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo 2012-11-21 18:19:49 +00:00
parent b665308a87
commit 62432f165f
32 changed files with 5881 additions and 1 deletions
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8
nuttx/ChangeLog
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@ -3652,5 +3652,11 @@
match how they are enabled for other architectures.
* configs/ez80f910200kitg: Convert to use mconf configuration.
* sched/pause.c: Implements the POSIX pause() function.
* ez80: Lots of changes to ez80 configurations and build logic as I
struggle to get a clean Windows build (still not working).
* tools/prebuild.py: A Python script for Darcy Gong that can automate
many build/configuration operations.
* configs/cloudctrl: Darcy Gong's CloudController board. This is a
small network relay development board. Based on the Shenzhou IV development
board design. It is based on the STM32F107VC MCU.

7
nuttx/configs/Kconfig
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@ -45,6 +45,13 @@ config ARCH_BOARD_C5471EVM
NuttX runs on the ARM core and is built with a GNU arm-nuttx-elf toolchain*.
This port is complete and verified.
config ARCH_BOARD_CLOUDCTRL
bool "Darcy's CloudController stm32f10x board"
depends on ARCH_CHIP_STM32F107VC
---help---
Small network relay development board. Based on the Shenzhou IV development
board design.
config ARCH_BOARD_COMPALE88
bool "Compal e88 phone"
depends on ARCH_CHIP_CALYPSO

5
nuttx/configs/README.txt
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@ -1609,6 +1609,11 @@ configs/c5471evm
NuttX runs on the ARM core and is built with a GNU arm-nuttx-elf toolchain*.
This port is complete and verified.
configs/cloudctrl
Darcy's CloudController board. This is a small network relay development
board. Based on the Shenzhou IV development board design. It is based on
the STM32F107VC MCU.
configs/compal_e88 and compal_e99
These directories contain the board support for compal e88 and e99 phones.
These ports are based on patches contributed by Denis Carikli for both the

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nuttx/configs/cloudctrl/Kconfig Normal file
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@ -0,0 +1,8 @@
#
# For a description of the syntax of this configuration file,
# see misc/tools/kconfig-language.txt.
#
if ARCH_BOARD_CLOUDCTRL
endif

869
nuttx/configs/cloudctrl/README.txt Normal file
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@ -0,0 +1,869 @@
README
======
This README discusses issues unique to NuttX configurations for the CloudController
development board featuring the STMicro STM32F107VCT MCU.
Features of the CloudController board include:
- STM32F107VCT
- 10/100M PHY (DM9161AEP)
- USB OTG
- USART connectos (USART1-2)
- SPI Flash (W25X16)
- (3) LEDs (LED1-3)
- (3) Buttons (KEY1-3, USERKEY2, USERKEY, TEMPER, WAKEUP)
- 5V/3.3V power conversion
- SWD
Contents
========
- STM32F107VCT Pin Usage
- Development Environment
- GNU Toolchain Options
- IDEs
- NuttX EABI buildroot Toolchain
- NuttX OABI buildroot Toolchain
- NXFLAT Toolchain
- Cloudctrl-specific Configuration Options
- LEDs
- Cloudctrl-specific Configuration Options
- Configurations
STM32F107VCT Pin Usage
======================
-- ---- -------------- -------------------------------------------------------------------
PN NAME SIGNAL NOTES
-- ---- -------------- -------------------------------------------------------------------
**23 PA0 WAKEUP Connected to KEY4. Active low: Closing KEY4 pulls WAKEUP to ground.
24 PA1 MII_RX_CLK
RMII_REF_CLK
25 PA2 MII_MDIO
26 PA3 315M_VT
29 PA4 DAC_OUT1 To CON5(CN14)
30 PA5 DAC_OUT2 To CON5(CN14). JP10
SPI1_SCK To the SD card, SPI FLASH
31 PA6 SPI1_MISO To the SD card, SPI FLASH
32 PA7 SPI1_MOSI To the SD card, SPI FLASH
67 PA8 MCO To DM9161AEP PHY
68 PA9 USB_VBUS MINI-USB-AB. JP3
USART1_TX MAX3232 to CN5
69 PA10 USB_ID MINI-USB-AB. JP5
USART1_RX MAX3232 to CN5
70 PA11 USB_DM MINI-USB-AB
71 PA12 USB_DP MINI-USB-AB
72 PA13 TMS/SWDIO
76 PA14 TCK/SWCLK
77 PA15 TDI
-- ---- -------------- -------------------------------------------------------------------
PN NAME SIGNAL NOTES
-- ---- -------------- -------------------------------------------------------------------
35 PB0 ADC_IN1 To CON5(CN14)
36 PB1 ADC_IN2 To CON5(CN14)
37 PB2 DATA_LE To TFT LCD (CN13)
BOOT1 JP13
89 PB3 TDO/SWO
90 PB4 TRST
91 PB5 CAN2_RX
92 PB6 CAN2_TX JP11
I2C1_SCL
93 PB7 I2C1_SDA
95 PB8 USB_PWR Drives USB VBUS
96 PB9 F_CS To both the TFT LCD (CN13) and to the W25X16 SPI FLASH
47 PB10 USERKEY Connected to KEY2
48 PB11 MII_TX_EN Ethernet PHY
51 PB12 I2S_WS Audio DAC
MII_TXD0 Ethernet PHY
52 PB13 I2S_CK Audio DAC
MII_TXD1 Ethernet PHY
53 PB14 SD_CD There is confusion here. Schematic is wrong LCD_WR is PB14.
54 PB15 I2S_DIN Audio DAC
-- ---- -------------- -------------------------------------------------------------------
PN NAME SIGNAL NOTES
-- ---- -------------- -------------------------------------------------------------------
15 PC0 POTENTIO_METER
16 PC1 MII_MDC Ethernet PHY
17 PC2 WIRELESS_INT
18 PC3 WIRELESS_CE To the NRF24L01 2.4G wireless module
33 PC4 USERKEY2 Connected to KEY1
34 PC5 TP_INT JP6. To TFT LCD (CN13) module
MII_INT Ethernet PHY
63 PC6 I2S_MCK Audio DAC. Active low: Pulled high
64 PC7 PCM1770_CS Audio DAC. Active low: Pulled high
65 PC8 LCD_CS TFT LCD (CN13). Active low: Pulled high
66 PC9 TP_CS TFT LCD (CN13). Active low: Pulled high
78 PC10 SPI3_SCK To TFT LCD (CN13), the NRF24L01 2.4G wireless module
79 PC11 SPI3_MISO To TFT LCD (CN13), the NRF24L01 2.4G wireless module
80 PC12 SPI3_MOSI To TFT LCD (CN13), the NRF24L01 2.4G wireless module
7 PC13 TAMPER Connected to KEY3
8 PC14 OSC32_IN Y1 32.768Khz XTAL
9 PC15 OSC32_OUT Y1 32.768Khz XTAL
-- ---- -------------- -------------------------------------------------------------------
PN NAME SIGNAL NOTES
-- ---- -------------- -------------------------------------------------------------------
81 PD0 CAN1_RX
82 PD1 CAN1_TX
83 PD2 LED1 Active low: Pulled high
84 PD3 LED2 Active low: Pulled high
85 PD4 LED3 Active low: Pulled high
86 PD5 485_TX Same as USART2_TX but goes to SP3485
USART2_TX MAX3232 to CN6
87 PD6 485_RX Save as USART2_RX but goes to SP3485 (see JP4)
USART2_RX MAX3232 to CN6
88 PD7 LED4 Active low: Pulled high
485_DIR SP3485 read enable (not)
55 PD8 MII_RX_DV Ethernet PHY
RMII_CRSDV Ethernet PHY
56 PD9 MII_RXD0 Ethernet PHY
57 PD10 MII_RXD1 Ethernet PHY
58 PD11 SD_CS Active low: Pulled high (See also TFT LCD CN13, pin 32)
59 PD12 WIRELESS_CS To the NRF24L01 2.4G wireless module
60 PD13 LCD_RS To TFT LCD (CN13)
61 PD14 LCD_WR To TFT LCD (CN13). Schematic is wrong LCD_WR is PB14.
62 PD15 LCD_RD To TFT LCD (CN13)
-- ---- -------------- -------------------------------------------------------------------
PN NAME SIGNAL NOTES
-- ---- -------------- -------------------------------------------------------------------
97 PE0 DB00 To TFT LCD (CN13)
98 PE1 DB01 To TFT LCD (CN13)
1 PE2 DB02 To TFT LCD (CN13)
2 PE3 DB03 To TFT LCD (CN13)
3 PE4 DB04 To TFT LCD (CN13)
4 PE5 DB05 To TFT LCD (CN13)
5 PE6 DB06 To TFT LCD (CN13)
38 PE7 DB07 To TFT LCD (CN13)
39 PE8 DB08 To TFT LCD (CN13)
40 PE9 DB09 To TFT LCD (CN13)
41 PE10 DB10 To TFT LCD (CN13)
42 PE11 DB11 To TFT LCD (CN13)
43 PE12 DB12 To TFT LCD (CN13)
44 PE13 DB13 To TFT LCD (CN13)
45 PE14 DB14 To TFT LCD (CN13)
46 PE15 DB15 To TFT LCD (CN13)
-- ---- -------------- -------------------------------------------------------------------
PN NAME SIGNAL NOTES
-- ---- -------------- -------------------------------------------------------------------
73 N/C
12 OSC_IN Y2 25Mhz XTAL
13 OSC_OUT Y2 25Mhz XTAL
94 BOOT0 JP15 (3.3V or GND)
14 RESET S5
6 VBAT JP14 (3.3V or battery)
49 VSS_1 GND
74 VSS_2 GND
99 VSS_3 GND
27 VSS_4 GND
10 VSS_5 GND
19 VSSA VSSA
20 VREF- VREF-
Development Environment
=======================
Either Linux or Cygwin on Windows can be used for the development environment.
The source has been built only using the GNU toolchain (see below). Other
toolchains will likely cause problems. Testing was performed using the Cygwin
environment because the development tools that I used only work under Windows.
GNU Toolchain Options
=====================
Toolchain Configurations
------------------------
The NuttX make system has been modified to support the following different
toolchain options.
1. The CodeSourcery GNU toolchain,
2. The Atollic Toolchain,
3. The devkitARM GNU toolchain,
4. Raisonance GNU toolchain, or
5. The NuttX buildroot Toolchain (see below).
Most testing has been conducted using the CodeSourcery toolchain for Windows and
that is the default toolchain in most configurations. To use the Atollic,
devkitARM, Raisonance GNU, or NuttX buildroot toolchain, you simply need to
add one of the following configuration options to your .config (or defconfig)
file:
CONFIG_STM32_CODESOURCERYW=y : CodeSourcery under Windows
CONFIG_STM32_CODESOURCERYL=y : CodeSourcery under Linux
CONFIG_STM32_ATOLLIC_LITE=y : The free, "Lite" version of Atollic toolchain under Windows
CONFIG_STM32_ATOLLIC_PRO=y : The paid, "Pro" version of Atollic toolchain under Windows
CONFIG_STM32_DEVKITARM=y : devkitARM under Windows
CONFIG_STM32_RAISONANCE=y : Raisonance RIDE7 under Windows
CONFIG_STM32_BUILDROOT=y : NuttX buildroot under Linux or Cygwin (default)
If you change the default toolchain, then you may also have to modify the PATH in
the setenv.h file if your make cannot find the tools.
NOTE: the CodeSourcery (for Windows), Atollic, devkitARM, and Raisonance toolchains are
Windows native toolchains. The CodeSourcery (for Linux) and NuttX buildroot
toolchains are Cygwin and/or Linux native toolchains. There are several limitations
to using a Windows based toolchain in a Cygwin environment. The three biggest are:
1. The Windows toolchain cannot follow Cygwin paths. Path conversions are
performed automatically in the Cygwin makefiles using the 'cygpath' utility
but you might easily find some new path problems. If so, check out 'cygpath -w'
2. Windows toolchains cannot follow Cygwin symbolic links. Many symbolic links
are used in Nuttx (e.g., include/arch). The make system works around these
problems for the Windows tools by copying directories instead of linking them.
But this can also cause some confusion for you: For example, you may edit
a file in a "linked" directory and find that your changes had no effect.
That is because you are building the copy of the file in the "fake" symbolic
directory. If you use a Windows toolchain, you should get in the habit of
making like this:
make clean_context all
An alias in your .bashrc file might make that less painful.
3. Dependencies are not made when using Windows versions of the GCC. This is
because the dependencies are generated using Windows pathes which do not
work with the Cygwin make.
MKDEP = $(TOPDIR)/tools/mknulldeps.sh
The CodeSourcery Toolchain (2009q1)
-----------------------------------
The CodeSourcery toolchain (2009q1) does not work with default optimization
level of -Os (See Make.defs). It will work with -O0, -O1, or -O2, but not with
-Os.
The Atollic "Pro" and "Lite" Toolchain
--------------------------------------
One problem that I had with the Atollic toolchains is that the provide a gcc.exe
and g++.exe in the same bin/ file as their ARM binaries. If the Atollic bin/ path
appears in your PATH variable before /usr/bin, then you will get the wrong gcc
when you try to build host executables. This will cause to strange, uninterpretable
errors build some host binaries in tools/ when you first make.
The Atollic "Lite" Toolchain
----------------------------
The free, "Lite" version of the Atollic toolchain does not support C++ nor
does it support ar, nm, objdump, or objdcopy. If you use the Atollic "Lite"
toolchain, you will have to set:
CONFIG_HAVE_CXX=n
In order to compile successfully. Otherwise, you will get errors like:
"C++ Compiler only available in TrueSTUDIO Professional"
The make may then fail in some of the post link processing because of some of
the other missing tools. The Make.defs file replaces the ar and nm with
the default system x86 tool versions and these seem to work okay. Disable all
of the following to avoid using objcopy:
CONFIG_RRLOAD_BINARY=n
CONFIG_INTELHEX_BINARY=n
CONFIG_MOTOROLA_SREC=n
CONFIG_RAW_BINARY=n
devkitARM
---------
The devkitARM toolchain includes a version of MSYS make. Make sure that the
the paths to Cygwin's /bin and /usr/bin directories appear BEFORE the devkitARM
path or will get the wrong version of make.
IDEs
====
NuttX is built using command-line make. It can be used with an IDE, but some
effort will be required to create the project.
Makefile Build
--------------
Under Eclipse, it is pretty easy to set up an "empty makefile project" and
simply use the NuttX makefile to build the system. That is almost for free
under Linux. Under Windows, you will need to set up the "Cygwin GCC" empty
makefile project in order to work with Windows (Google for "Eclipse Cygwin" -
there is a lot of help on the internet).
Native Build
------------
Here are a few tips before you start that effort:
1) Select the toolchain that you will be using in your .config file
2) Start the NuttX build at least one time from the Cygwin command line
before trying to create your project. This is necessary to create
certain auto-generated files and directories that will be needed.
3) Set up include pathes: You will need include/, arch/arm/src/stm32,
arch/arm/src/common, arch/arm/src/armv7-m, and sched/.
4) All assembly files need to have the definition option -D __ASSEMBLY__
on the command line.
Startup files will probably cause you some headaches. The NuttX startup file
is arch/arm/src/stm32/stm32_vectors.S. With RIDE, I have to build NuttX
one time from the Cygwin command line in order to obtain the pre-built
startup object needed by RIDE.
NuttX EABI buildroot Toolchain
==============================
A GNU GCC-based toolchain is assumed. The files */setenv.sh should
be modified to point to the correct path to the Cortex-M3 GCC toolchain (if
different from the default in your PATH variable).
If you have no Cortex-M3 toolchain, one can be downloaded from the NuttX
SourceForge download site (https://sourceforge.net/projects/nuttx/files/buildroot/).
This GNU toolchain builds and executes in the Linux or Cygwin environment.
1. You must have already configured Nuttx in <some-dir>/nuttx.
cd tools
./configure.sh shenzhou/<sub-dir>
cd ..
make context
2. Download the latest buildroot package into <some-dir>
3. unpack the buildroot tarball. The resulting directory may
have versioning information on it like buildroot-x.y.z. If so,
rename <some-dir>/buildroot-x.y.z to <some-dir>/buildroot.
4. cd <some-dir>/buildroot
5. cp configs/cortexm3-eabi-defconfig-4.6.3 .config
6. make oldconfig
7. make
8. Edit nuttx/.config to select the buildroot toolchain as described above
and below:
-CONFIG_STM32_CODESOURCERYW=y
+CONFIG_STM32_BUILDROOT=y
9. Edit setenv.h, if necessary, so that the PATH variable includes
the path to the newly built binaries.
-export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin"
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin"
-#export TOOLCHAIN_BIN="${WD}/../misc/buildroot/build_arm_nofpu/staging_dir/bin"
+export TOOLCHAIN_BIN="${WD}/../misc/buildroot/build_arm_nofpu/staging_dir/bin"
See the file configs/README.txt in the buildroot source tree. That has more
detailed PLUS some special instructions that you will need to follow if you are
building a Cortex-M3 toolchain for Cygwin under Windows.
NOTE: Unfortunately, the 4.6.3 EABI toolchain is not compatible with the
the NXFLAT tools. See the top-level TODO file (under "Binary loaders") for
more information about this problem. If you plan to use NXFLAT, please do not
use the GCC 4.6.3 EABI toochain; instead use the GCC 4.3.3 OABI toolchain.
See instructions below.
NuttX OABI "buildroot" Toolchain
================================
The older, OABI buildroot toolchain is also available. To use the OABI
toolchain:
1. When building the buildroot toolchain, either (1) modify the cortexm3-eabi-defconfig-4.6.3
configuration to use EABI (using 'make menuconfig'), or (2) use an exising OABI
configuration such as cortexm3-defconfig-4.3.3
2. Modify the Make.defs file to use the OABI conventions:
+CROSSDEV = arm-nuttx-elf-
+ARCHCPUFLAGS = -mtune=cortex-m3 -march=armv7-m -mfloat-abi=soft
+NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections
-CROSSDEV = arm-nuttx-eabi-
-ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft
-NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
NXFLAT Toolchain
================
If you are *not* using the NuttX buildroot toolchain and you want to use
the NXFLAT tools, then you will still have to build a portion of the buildroot
tools -- just the NXFLAT tools. The buildroot with the NXFLAT tools can
be downloaded from the NuttX SourceForge download site
(https://sourceforge.net/projects/nuttx/files/).
This GNU toolchain builds and executes in the Linux or Cygwin environment.
1. You must have already configured Nuttx in <some-dir>/nuttx.
cd tools
./configure.sh lpcxpresso-lpc1768/<sub-dir>
2. Download the latest buildroot package into <some-dir>
3. unpack the buildroot tarball. The resulting directory may
have versioning information on it like buildroot-x.y.z. If so,
rename <some-dir>/buildroot-x.y.z to <some-dir>/buildroot.
4. cd <some-dir>/buildroot
5. cp configs/cortexm3-defconfig-nxflat .config
6. make oldconfig
7. make
8. Edit setenv.h, if necessary, so that the PATH variable includes
the path to the newly builtNXFLAT binaries.
LEDs
====
The Cloudctrl board has four LEDs labeled LED1, LED2, LED3 and LED4 on the
board. These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is
defined. In that case, the usage by the board port is defined in
include/board.h and src/up_leds.c. The LEDs are used to encode OS-related
events as follows:
SYMBOL Meaning LED1* LED2 LED3 LED4****
------------------- ----------------------- ------- ------- ------- ------
LED_STARTED NuttX has been started ON OFF OFF OFF
LED_HEAPALLOCATE Heap has been allocated OFF ON OFF OFF
LED_IRQSENABLED Interrupts enabled ON ON OFF OFF
LED_STACKCREATED Idle stack created OFF OFF ON OFF
LED_INIRQ In an interrupt** ON N/C N/C OFF
LED_SIGNAL In a signal handler*** N/C ON N/C OFF
LED_ASSERTION An assertion failed ON ON N/C OFF
LED_PANIC The system has crashed N/C N/C N/C ON
LED_IDLE STM32 is is sleep mode (Optional, not used)
* If LED1, LED2, LED3 are statically on, then NuttX probably failed to boot
and these LEDs will give you some indication of where the failure was
** The normal state is LED1 ON and LED1 faintly glowing. This faint glow
is because of timer interupts that result in the LED being illuminated
on a small proportion of the time.
*** LED2 may also flicker normally if signals are processed.
**** LED4 may not be available if RS-485 is also used. For RS-485, it will
then indicate the RS-485 direction.
Cloudctrl-specific Configuration Options
============================================
CONFIG_ARCH - Identifies the arch/ subdirectory. This should
be set to:
CONFIG_ARCH=arm
CONFIG_ARCH_family - For use in C code:
CONFIG_ARCH_ARM=y
CONFIG_ARCH_architecture - For use in C code:
CONFIG_ARCH_CORTEXM3=y
CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory
CONFIG_ARCH_CHIP=stm32
CONFIG_ARCH_CHIP_name - For use in C code to identify the exact
chip:
CONFIG_ARCH_CHIP_STM32F107VC=y
CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG - Enables special STM32 clock
configuration features.
CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG=n
CONFIG_ARCH_BOARD - Identifies the configs subdirectory and
hence, the board that supports the particular chip or SoC.
CONFIG_ARCH_BOARD=shenzhou (for the Cloudctrl development board)
CONFIG_ARCH_BOARD_name - For use in C code
CONFIG_ARCH_BOARD_SHENZHOU=y
CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation
of delay loops
CONFIG_ENDIAN_BIG - define if big endian (default is little
endian)
CONFIG_DRAM_SIZE - Describes the installed DRAM (SRAM in this case):
CONFIG_DRAM_SIZE=0x00010000 (64Kb)
CONFIG_DRAM_START - The start address of installed DRAM
CONFIG_DRAM_START=0x20000000
CONFIG_STM32_CCMEXCLUDE - Exclude CCM SRAM from the HEAP
CONFIG_ARCH_IRQPRIO - The STM32107xxx supports interrupt prioritization
CONFIG_ARCH_IRQPRIO=y
CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that
have LEDs
CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt
stack. If defined, this symbol is the size of the interrupt
stack in bytes. If not defined, the user task stacks will be
used during interrupt handling.
CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions
CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture.
CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that
cause a 100 second delay during boot-up. This 100 second delay
serves no purpose other than it allows you to calibratre
CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure
the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until
the delay actually is 100 seconds.
Individual subsystems can be enabled:
AHB
---
CONFIG_STM32_DMA1
CONFIG_STM32_DMA2
CONFIG_STM32_CRC
CONFIG_STM32_ETHMAC
CONFIG_STM32_OTGFS
CONFIG_STM32_IWDG
CONFIG_STM32_PWR -- Required for RTC
APB1 (low speed)
----------------
CONFIG_STM32_BKP
CONFIG_STM32_TIM2
CONFIG_STM32_TIM3
CONFIG_STM32_TIM4
CONFIG_STM32_TIM5
CONFIG_STM32_TIM6
CONFIG_STM32_TIM7
CONFIG_STM32_USART2
CONFIG_STM32_USART3
CONFIG_STM32_UART4
CONFIG_STM32_UART5
CONFIG_STM32_SPI2
CONFIG_STM32_SPI3
CONFIG_STM32_I2C1
CONFIG_STM32_I2C2
CONFIG_STM32_CAN1
CONFIG_STM32_CAN2
CONFIG_STM32_DAC1
CONFIG_STM32_DAC2
CONFIG_STM32_WWDG
APB2 (high speed)
-----------------
CONFIG_STM32_TIM1
CONFIG_STM32_SPI1
CONFIG_STM32_USART1
CONFIG_STM32_ADC1
CONFIG_STM32_ADC2
Timer and I2C devices may need to the following to force power to be applied
unconditionally at power up. (Otherwise, the device is powered when it is
initialized).
CONFIG_STM32_FORCEPOWER
Timer devices may be used for different purposes. One special purpose is
to generate modulated outputs for such things as motor control. If CONFIG_STM32_TIMn
is defined (as above) then the following may also be defined to indicate that
the timer is intended to be used for pulsed output modulation, ADC conversion,
or DAC conversion. Note that ADC/DAC require two definition: Not only do you have
to assign the timer (n) for used by the ADC or DAC, but then you also have to
configure which ADC or DAC (m) it is assigned to.
CONFIG_STM32_TIMn_PWM Reserve timer n for use by PWM, n=1,..,14
CONFIG_STM32_TIMn_ADC Reserve timer n for use by ADC, n=1,..,14
CONFIG_STM32_TIMn_ADCm Reserve timer n to trigger ADCm, n=1,..,14, m=1,..,3
CONFIG_STM32_TIMn_DAC Reserve timer n for use by DAC, n=1,..,14
CONFIG_STM32_TIMn_DACm Reserve timer n to trigger DACm, n=1,..,14, m=1,..,2
For each timer that is enabled for PWM usage, we need the following additional
configuration settings:
CONFIG_STM32_TIMx_CHANNEL - Specifies the timer output channel {1,..,4}
NOTE: The STM32 timers are each capable of generating different signals on
each of the four channels with different duty cycles. That capability is
not supported by this driver: Only one output channel per timer.
JTAG Enable settings (by default JTAG-DP and SW-DP are disabled):
CONFIG_STM32_JTAG_FULL_ENABLE - Enables full SWJ (JTAG-DP + SW-DP)
CONFIG_STM32_JTAG_NOJNTRST_ENABLE - Enables full SWJ (JTAG-DP + SW-DP)
but without JNTRST.
CONFIG_STM32_JTAG_SW_ENABLE - Set JTAG-DP disabled and SW-DP enabled
STM32107xxx specific device driver settings
CONFIG_U[S]ARTn_SERIAL_CONSOLE - selects the USARTn (n=1,2,3) or UART
m (m=4,5) for the console and ttys0 (default is the USART1).
CONFIG_U[S]ARTn_RXBUFSIZE - Characters are buffered as received.
This specific the size of the receive buffer
CONFIG_U[S]ARTn_TXBUFSIZE - Characters are buffered before
being sent. This specific the size of the transmit buffer
CONFIG_U[S]ARTn_BAUD - The configure BAUD of the UART. Must be
CONFIG_U[S]ARTn_BITS - The number of bits. Must be either 7 or 8.
CONFIG_U[S]ARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity
CONFIG_U[S]ARTn_2STOP - Two stop bits
CONFIG_STM32_SPI_INTERRUPTS - Select to enable interrupt driven SPI
support. Non-interrupt-driven, poll-waiting is recommended if the
interrupt rate would be to high in the interrupt driven case.
CONFIG_STM32_SPI_DMA - Use DMA to improve SPI transfer performance.
Cannot be used with CONFIG_STM32_SPI_INTERRUPT.
CONFIG_STM32_PHYADDR - The 5-bit address of the PHY on the board
CONFIG_STM32_MII - Support Ethernet MII interface
CONFIG_STM32_MII_MCO - Use MCO to clock the MII interface
CONFIG_STM32_RMII - Support Ethernet RMII interface
CONFIG_STM32_RMII_MCO - Use MCO to clock the RMII interface
CONFIG_STM32_AUTONEG - Use PHY autonegotion to determine speed and mode
CONFIG_STM32_ETHFD - If CONFIG_STM32_AUTONEG is not defined, then this
may be defined to select full duplex mode. Default: half-duplex
CONFIG_STM32_ETH100MBPS - If CONFIG_STM32_AUTONEG is not defined, then this
may be defined to select 100 MBps speed. Default: 10 Mbps
CONFIG_STM32_PHYSR - This must be provided if CONFIG_STM32_AUTONEG is
defined. The PHY status register address may diff from PHY to PHY. This
configuration sets the address of the PHY status register.
CONFIG_STM32_PHYSR_SPEED - This must be provided if CONFIG_STM32_AUTONEG is
defined. This provides bit mask indicating 10 or 100MBps speed.
CONFIG_STM32_PHYSR_100MBPS - This must be provided if CONFIG_STM32_AUTONEG is
defined. This provides the value of the speed bit(s) indicating 100MBps speed.
CONFIG_STM32_PHYSR_MODE - This must be provided if CONFIG_STM32_AUTONEG is
defined. This provide bit mask indicating full or half duplex modes.
CONFIG_STM32_PHYSR_FULLDUPLEX - This must be provided if CONFIG_STM32_AUTONEG is
defined. This provides the value of the mode bits indicating full duplex mode.
CONFIG_STM32_ETH_PTP - Precision Time Protocol (PTP). Not supported
but some hooks are indicated with this condition.
Cloudctrl CAN Configuration
CONFIG_CAN - Enables CAN support (one or both of CONFIG_STM32_CAN1 or
CONFIG_STM32_CAN2 must also be defined)
CONFIG_CAN_FIFOSIZE - The size of the circular buffer of CAN messages.
Default: 8
CONFIG_CAN_NPENDINGRTR - The size of the list of pending RTR requests.
Default: 4
CONFIG_CAN_LOOPBACK - A CAN driver may or may not support a loopback
mode for testing. The STM32 CAN driver does support loopback mode.
CONFIG_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN1 is defined.
CONFIG_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN2 is defined.
CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6
CONFIG_CAN_TSEG2 - the number of CAN time quanta in segment 2. Default: 7
CONFIG_CAN_REGDEBUG - If CONFIG_DEBUG is set, this will generate an
dump of all CAN registers.
Cloudctrl LCD Hardware Configuration
The LCD driver supports the following LCDs on the STM324xG_EVAL board:
AM-240320L8TNQW00H (LCD_ILI9320 or LCD_ILI9321) OR
AM-240320D5TOQW01H (LCD_ILI9325)
Configuration options.
CONFIG_LCD_LANDSCAPE - Define for 320x240 display "landscape"
support. Default is this 320x240 "landscape" orientation
For the Cloudctrl board, the edge opposite from the row of buttons
is used as the top of the display in this orientation.
CONFIG_LCD_RLANDSCAPE - Define for 320x240 display "reverse
landscape" support. Default is this 320x240 "landscape"
orientation
For the Cloudctrl board, the edge next to the row of buttons
is used as the top of the display in this orientation.
CONFIG_LCD_PORTRAIT - Define for 240x320 display "portrait"
orientation support.
CONFIG_LCD_RPORTRAIT - Define for 240x320 display "reverse
portrait" orientation support.
CONFIG_LCD_RDSHIFT - When reading 16-bit gram data, there appears
to be a shift in the returned data. This value fixes the offset.
Default 5.
The LCD driver dynamically selects the LCD based on the reported LCD
ID value. However, code size can be reduced by suppressing support for
individual LCDs using:
CONFIG_STM32_ILI9320_DISABLE (includes ILI9321)
CONFIG_STM32_ILI9325_DISABLE
STM32 USB OTG FS Host Driver Support
Pre-requisites
CONFIG_USBHOST - Enable USB host support
CONFIG_STM32_OTGFS - Enable the STM32 USB OTG FS block
CONFIG_STM32_SYSCFG - Needed
CONFIG_SCHED_WORKQUEUE - Worker thread support is required
Options:
CONFIG_STM32_OTGFS_RXFIFO_SIZE - Size of the RX FIFO in 32-bit words.
Default 128 (512 bytes)
CONFIG_STM32_OTGFS_NPTXFIFO_SIZE - Size of the non-periodic Tx FIFO
in 32-bit words. Default 96 (384 bytes)
CONFIG_STM32_OTGFS_PTXFIFO_SIZE - Size of the periodic Tx FIFO in 32-bit
words. Default 96 (384 bytes)
CONFIG_STM32_OTGFS_DESCSIZE - Maximum size of a descriptor. Default: 128
CONFIG_STM32_OTGFS_SOFINTR - Enable SOF interrupts. Why would you ever
want to do that?
CONFIG_STM32_USBHOST_REGDEBUG - Enable very low-level register access
debug. Depends on CONFIG_DEBUG.
CONFIG_STM32_USBHOST_PKTDUMP - Dump all incoming and outgoing USB
packets. Depends on CONFIG_DEBUG.
Configurations
==============
Each Cloudctrl configuration is maintained in a sudirectory and
can be selected as follow:
cd tools
./configure.sh shenzhou/<subdir>
cd -
. ./setenv.sh
Where <subdir> is one of the following:
nsh:
---
Configures the NuttShell (nsh) located at apps/examples/nsh. The
Configuration enables both the serial and telnet NSH interfaces.
CONFIG_STM32_CODESOURCERYW=y : CodeSourcery under Windows
CONFIG_NSH_DHCPC=n : DHCP is disabled
CONFIG_NSH_IPADDR=0x0a000002 : Target IP address 10.0.0.2
CONFIG_NSH_DRIPADDR=0x0a000001 : Host IP address 10.0.0.1
NOTES:
1. This example assumes that a network is connected. During its
initialization, it will try to negotiate the link speed. If you have
no network connected when you reset the board, there will be a long
delay (maybe 30 seconds?) before anything happens. That is the timeout
before the networking finally gives up and decides that no network is
available.
2. Enabling the ADC example:
The only internal signal for ADC testing is the potentiometer input:
ADC1_IN10(PC0) Potentiometer
External signals are also available on CON5 CN14:
ADC_IN8 (PB0) CON5 CN14 Pin2
ADC_IN9 (PB1) CON5 CN14 Pin1
The signal selection is hard-coded in configs/shenzhou/src/up_adc.c: The
potentiometer input (only) is selected.
These selections will enable sampling the potentiometer input at 100Hz using
Timer 1:
CONFIG_ANALOG=y : Enable analog device support
CONFIG_ADC=y : Enable generic ADC driver support
CONFIG_ADC_DMA=n : ADC DMA is not supported
CONFIG_STM32_ADC1=y : Enable ADC 1
CONFIG_STM32_TIM1=y : Enable Timer 1
CONFIG_STM32_TIM1_ADC=y : Use Timer 1 for ADC
CONFIG_STM32_TIM1_ADC1=y : Allocate Timer 1 to ADC 1
CONFIG_STM32_ADC1_SAMPLE_FREQUENCY=100 : Set sampling frequency to 100Hz
CONFIG_STM32_ADC1_TIMTRIG=0 : Trigger on timer output 0
CONFIG_STM32_FORCEPOWER=y : Apply power to TIM1 a boot up time
CONFIG_EXAMPLES_ADC=y : Enable the apps/examples/adc built-in
nxwm
----
This is a special configuration setup for the NxWM window manager
UnitTest. The NxWM window manager can be found here:
nuttx-code/NxWidgets/nxwm
The NxWM unit test can be found at:
nuttx-code/NxWidgets/UnitTests/nxwm
NOTE: JP6 selects between the touchscreen interrupt and the MII
interrupt. It should be positioned 1-2 to enable the touchscreen
interrupt.
Documentation for installing the NxWM unit test can be found here:
nuttx-code/NxWidgets/UnitTests/README.txt
Here is the quick summary of the build steps (Assuming that all of
the required packages are available in a directory ~/nuttx-code):
1. Intall the nxwm configuration
$ cd ~/nuttx-code/tools
$ ./configure.sh shenzhou/nxwm
2. Make the build context (only)
$ cd ..
$ . ./setenv.sh
$ make context
...
3. Install the nxwm unit test
$ cd ~/nuttx-code/NxWidgets
$ tools/install.sh ~/nuttx-code/apps nxwm
Creating symbolic link
- To ~/nuttx-code/NxWidgets/UnitTests/nxwm
- At ~/nuttx-code/apps/external
4. Build the NxWidgets library
$ cd ~/nuttx-code/NxWidgets/libnxwidgets
$ make TOPDIR=~/nuttx-code
...
5. Build the NxWM library
$ cd ~/nuttx-code/NxWidgets/nxwm
$ make TOPDIR=~/nuttx-code
...
6. Built NuttX with the installed unit test as the application
$ cd ~/nuttx-code
$ make
NOTE: Reading from the LCD is not currently supported by this
configuration. The hardware will support reading from the LCD
and drivers/lcd/ssd1289.c also supports reading from the LCD.
This limits some graphics capabilities.
Reading from the LCD is not supported only because it has not
been test. If you get inspired to test this feature, you can
turn the LCD read functionality on by setting:
-CONFIG_LCD_NOGETRUN=y
+# CONFIG_LCD_NOGETRUN is not set
-CONFIG_NX_WRITEONLY=y
+# CONFIG_NX_WRITEONLY is not set
thttpd
------
This builds the THTTPD web server example using the THTTPD and
the apps/examples/thttpd application.
NOTE: See note above with regard to the EABI/OABI buildroot
toolchains. This example can only be built using the older
OABI toolchain due to incompatibilities introduced in later
GCC releases.

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/************************************************************************************
* configs/cloudctrl/include/board.h
*
* Copyright (C) 2012 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
* Darcy Gong <darcy.gong@gmail.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
#ifndef __CONFIGS_CLOUDCTRL_INCLUDE_BOARD_H
#define __CONFIGS_CLOUDCTRL_INCLUDE_BOARD_H 1
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#ifndef __ASSEMBLY__
# include <stdint.h>
#endif
#include "stm32_rcc.h"
#include "stm32_sdio.h"
#include "stm32_internal.h"
#include <nuttx/arch.h>
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/* Clocking *************************************************************************/
/* HSI - 8 MHz RC factory-trimmed
* LSI - 40 KHz RC (30-60KHz, uncalibrated)
* HSE - On-board crystal frequency is 25MHz
* LSE - 32.768 kHz
*/
#define STM32_BOARD_XTAL 25000000ul
#define STM32_HSI_FREQUENCY 8000000ul
#define STM32_LSI_FREQUENCY 40000
#define STM32_HSE_FREQUENCY STM32_BOARD_XTAL
#define STM32_LSE_FREQUENCY 32768
/* PLL ouput is 72MHz */
#define STM32_PLL_PREDIV2 RCC_CFGR2_PREDIV2d5 /* 25MHz / 5 => 5MHz */
#define STM32_PLL_PLL2MUL RCC_CFGR2_PLL2MULx8 /* 5MHz * 8 => 40MHz */
#define STM32_PLL_PREDIV1 RCC_CFGR2_PREDIV1d5 /* 40MHz / 5 => 8MHz */
#define STM32_PLL_PLLMUL RCC_CFGR_PLLMUL_CLKx9 /* 8MHz * 9 => 72Mhz */
#define STM32_PLL_FREQUENCY (72000000)
/* SYCLLK and HCLK are the PLL frequency */
#define STM32_SYSCLK_FREQUENCY STM32_PLL_FREQUENCY
#define STM32_HCLK_FREQUENCY STM32_PLL_FREQUENCY
#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* same as above, to satisfy compiler */
/* APB2 clock (PCLK2) is HCLK (72MHz) */
#define STM32_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLK
#define STM32_PCLK2_FREQUENCY STM32_HCLK_FREQUENCY
#define STM32_APB2_CLKIN (STM32_PCLK2_FREQUENCY) /* Timers 2-7, 12-14 */
/* APB2 timers 1 and 8 will receive PCLK2. */
#define STM32_APB2_TIM1_CLKIN (STM32_PCLK2_FREQUENCY)
#define STM32_APB2_TIM8_CLKIN (STM32_PCLK2_FREQUENCY)
/* APB1 clock (PCLK1) is HCLK/2 (36MHz) */
#define STM32_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLKd2
#define STM32_PCLK1_FREQUENCY (STM32_HCLK_FREQUENCY/2)
/* APB1 timers 2-4 will be twice PCLK1 (I presume the remaining will receive PCLK1) */
#define STM32_APB1_TIM2_CLKIN (2*STM32_PCLK1_FREQUENCY)
#define STM32_APB1_TIM3_CLKIN (2*STM32_PCLK1_FREQUENCY)
#define STM32_APB1_TIM4_CLKIN (2*STM32_PCLK1_FREQUENCY)
#define STM32_APB1_TIM5_CLKIN (STM32_PCLK1_FREQUENCY)
#define STM32_APB1_TIM6_CLKIN (STM32_PCLK1_FREQUENCY)
#define STM32_APB1_TIM7_CLKIN (STM32_PCLK1_FREQUENCY)
/* MCO output driven by PLL3. From above, we already have PLL3 input frequency as:
*
* STM32_PLL_PREDIV2 = 5, 25MHz / 5 => 5MHz
*/
#if defined(CONFIG_STM32_MII_MCO) || defined(CONFIG_STM32_RMII_MCO)
# define BOARD_CFGR_MCO_SOURCE RCC_CFGR_PLL3CLK /* Source: PLL3 */
# define STM32_PLL_PLL3MUL RCC_CFGR2_PLL3MULx10 /* MCO 5MHz * 10 = 50MHz */
#endif
/* LED definitions ******************************************************************/
/* If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in any
* way. The following definitions are used to access individual LEDs.
*/
/* LED index values for use with stm32_setled() */
#define BOARD_LED1 0
#define BOARD_LED2 1
#define BOARD_LED3 2
#define BOARD_LED4 3
#define BOARD_NLEDS 4
/* LED bits for use with stm32_setleds() */
#define BOARD_LED1_BIT (1 << BOARD_LED1)
#define BOARD_LED2_BIT (1 << BOARD_LED2)
#define BOARD_LED3_BIT (1 << BOARD_LED3)
#define BOARD_LED4_BIT (1 << BOARD_LED4)
/* If CONFIG_ARCH_LEDs is defined, then NuttX will control the 4 LEDs on board the
* STM3240G-EVAL. The following definitions describe how NuttX controls the LEDs:
*/
#define LED_STARTED 0 /* LED1 */
#define LED_HEAPALLOCATE 1 /* LED2 */
#define LED_IRQSENABLED 2 /* LED1 + LED2 */
#define LED_STACKCREATED 3 /* LED3 */
#define LED_INIRQ 4 /* LED1 + LED3 */
#define LED_SIGNAL 5 /* LED2 + LED3 */
#define LED_ASSERTION 6 /* LED1 + LED2 + LED3 */
#define LED_PANIC 7 /* N/C + N/C + N/C + LED4 */
/* Button definitions ***************************************************************/
/* The STM3240G-EVAL supports three buttons: */
#define BUTTON_KEY1 0 /* Name printed on board */
#define BUTTON_KEY2 1
#define BUTTON_KEY3 2
#define NUM_BUTTONS 3
#define BUTTON_USERKEY BUTTON_KEY1 /* Names in schematic */
#define BUTTON_TAMPER BUTTON_KEY2
#define BUTTON_WAKEUP BUTTON_KEY3
#define BUTTON_KEY1_BIT (1 << BUTTON_KEY1)
#define BUTTON_KEY2_BIT (1 << BUTTON_KEY2)
#define BUTTON_KEY3_BIT (1 << BUTTON_KEY3)
#define BUTTON_USERKEY_BIT BUTTON_KEY1_BIT
#define BUTTON_TAMPER_BIT BUTTON_KEY2_BIT
#define BUTTON_WAKEUP_BIT BUTTON_KEY3_BIT
/* Relays */
#define NUM_RELAYS 2
/* Pin selections ******************************************************************/
/* Ethernet
*
* -- ---- -------------- ----------------------------------------------------------
* PN NAME SIGNAL NOTES
* -- ---- -------------- ----------------------------------------------------------
* 24 PA1 MII_RX_CLK Ethernet PHY NOTE: Despite the MII labeling of these
* RMII_REF_CLK Ethernet PHY signals, the DM916AEP is actually configured
* 25 PA2 MII_MDIO Ethernet PHY to work in RMII mode.
* 48 PB11 MII_TX_EN Ethernet PHY
* 51 PB12 MII_TXD0 Ethernet PHY
* 52 PB13 MII_TXD1 Ethernet PHY
* 16 PC1 MII_MDC Ethernet PHY
* 34 PC5 MII_INT Ethernet PHY
* 55 PD8 MII_RX_DV Ethernet PHY. Requires CONFIG_STM32_ETH_REMAP
* 55 PD8 RMII_CRSDV Ethernet PHY. Requires CONFIG_STM32_ETH_REMAP
* 56 PD9 MII_RXD0 Ethernet PHY. Requires CONFIG_STM32_ETH_REMAP
* 57 PD10 MII_RXD1 Ethernet PHY. Requires CONFIG_STM32_ETH_REMAP
*
* The board desdign can support a 50MHz external clock to drive the PHY
* (U9). However, on my board, U9 is not present.
*
* 67 PA8 MCO DM9161AEP
*/
#ifdef CONFIG_STM32_ETHMAC
# ifndef CONFIG_STM32_ETH_REMAP
# error "STM32 Ethernet requires CONFIG_STM32_ETH_REMAP"
# endif
# ifndef CONFIG_STM32_RMII
# error "STM32 Ethernet requires CONFIG_STM32_RMII"
# endif
# ifndef CONFIG_STM32_RMII_MCO
# error "STM32 Ethernet requires CONFIG_STM32_RMII_MCO"
# endif
#endif
/* USB
*
* -- ---- -------------- ----------------------------------------------------------
* PN NAME SIGNAL NOTES
* -- ---- -------------- ----------------------------------------------------------
* 68 PA9 USB_VBUS MINI-USB-AB. JP3
* 69 PA10 USB_ID MINI-USB-AB. JP5
* 70 PA11 USB_DM MINI-USB-AB
* 71 PA12 USB_DP MINI-USB-AB
* 95 PB8 USB_PWR Drives USB VBUS
*/
/* UARTS/USARTS
*
* -- ---- -------------- ----------------------------------------------------------
* PN NAME SIGNAL NOTES
* -- ---- -------------- ----------------------------------------------------------
* 68 PA9 USART1_TX MAX3232 to CN5. Requires CONFIG_STM32_USART1_REMAP
* 69 PA10 USART1_RX MAX3232 to CN5. Requires CONFIG_STM32_USART1_REMAP
* 86 PD5 USART2_TX MAX3232 to CN6. Requires CONFIG_STM32_USART2_REMAP
* 87 PD6 USART2_RX MAX3232 to CN6. Requires CONFIG_STM32_USART2_REMAP
* 86 PD5 485_TX Same as USART2_TX but goes to SP3485
* 87 PD6 485_RX Save as USART2_RX but goes to SP3485 (see JP4)
*/
#if defined(CONFIG_STM32_USART1) && !defined(CONFIG_STM32_USART1_REMAP)
# error "CONFIG_STM32_USART1 requires CONFIG_STM32_USART1_REMAP"
#endif
#if defined(CONFIG_STM32_USART2) && !defined(CONFIG_STM32_USART2_REMAP)
# error "CONFIG_STM32_USART2 requires CONFIG_STM32_USART2_REMAP"
#endif
/* SPI
*
* -- ---- -------------- ----------------------------------------------------------
* PN NAME SIGNAL NOTES
* -- ---- -------------- ----------------------------------------------------------
* 30 PA5 SPI1_SCK To the SD card, SPI FLASH.
* Requires !CONFIG_STM32_SPI1_REMAP
* 31 PA6 SPI1_MISO To the SD card, SPI FLASH.
* Requires !CONFIG_STM32_SPI1_REMAP
* 32 PA7 SPI1_MOSI To the SD card, SPI FLASH.
* Requires !CONFIG_STM32_SPI1_REMAP
* 78 PC10 SPI3_SCK To TFT LCD (CN13), the NRF24L01 2.4G wireless module.
* Requires CONFIG_STM32_SPI3_REMAP.
* 79 PC11 SPI3_MISO To TFT LCD (CN13), the NRF24L01 2.4G wireless module.
* Requires CONFIG_STM32_SPI3_REMAP.
* 80 PC12 SPI3_MOSI To TFT LCD (CN13), the NRF24L01 2.4G wireless module.
* Requires CONFIG_STM32_SPI3_REMAP.
*/
#if defined(CONFIG_STM32_SPI1) && defined(CONFIG_STM32_SPI1_REMAP)
# error "CONFIG_STM32_SPI1 must not have CONFIG_STM32_SPI1_REMAP"
#endif
#if defined(CONFIG_STM32_SPI3) && !defined(CONFIG_STM32_SPI3_REMAP)
# error "CONFIG_STM32_SPI3 requires CONFIG_STM32_SPI3_REMAP"
#endif
/* DAC
*
* -- ---- -------------- ----------------------------------------------------------
* PN NAME SIGNAL NOTES
* -- ---- -------------- ----------------------------------------------------------
* 29 PA4 DAC_OUT1 To CON5(CN14)
* 30 PA5 DAC_OUT2 To CON5(CN14). JP10
*/
/* ADC
*
* -- ---- -------------- ----------------------------------------------------------
* PN NAME SIGNAL NOTES
* -- ---- -------------- ----------------------------------------------------------
* 35 PB0 ADC_IN1 GPIO_ADC12_IN8. To CON5(CN14)
* 36 PB1 ADC_IN2 GPIO_ADC12_IN9. To CON5(CN14)
* 15 PC0 POTENTIO_METER GPIO_ADC12_IN10
*/
/************************************************************************************
* Public Data
************************************************************************************/
#ifndef __ASSEMBLY__
#undef EXTERN
#if defined(__cplusplus)
#define EXTERN extern "C"
extern "C" {
#else
#define EXTERN extern
#endif
/************************************************************************************
* Public Function Prototypes
************************************************************************************/
/************************************************************************************
* Name: stm32_boardinitialize
*
* Description:
* All STM32 architectures must provide the following entry point. This entry point
* is called early in the intitialization -- after all memory has been configured
* and mapped but before any devices have been initialized.
*
************************************************************************************/
void stm32_boardinitialize(void);
/************************************************************************************
* Button support.
*
* Description:
* up_buttoninit() must be called to initialize button resources. After
* that, up_buttons() may be called to collect the current state of all
* buttons or up_irqbutton() may be called to register button interrupt
* handlers.
*
* After up_buttoninit() has been called, up_buttons() may be called to
* collect the state of all buttons. up_buttons() returns an 8-bit bit set
* with each bit associated with a button. See the BUTTON_*_BIT and JOYSTICK_*_BIT
* definitions in board.h for the meaning of each bit.
*
* up_irqbutton() may be called to register an interrupt handler that will
* be called when a button is depressed or released. The ID value is a
* button enumeration value that uniquely identifies a button resource. See the
* BUTTON_* and JOYSTICK_* definitions in board.h for the meaning of enumeration
* value. The previous interrupt handler address is returned (so that it may
* restored, if so desired).
*
************************************************************************************/
#ifdef CONFIG_ARCH_BUTTONS
EXTERN void up_buttoninit(void);
EXTERN uint8_t up_buttons(void);
#ifdef CONFIG_ARCH_IRQBUTTONS
EXTERN xcpt_t up_irqbutton(int id, xcpt_t irqhandler);
#endif
#endif
/************************************************************************************
* Name: stm32_ledinit, stm32_setled, and stm32_setleds
*
* Description:
* If CONFIG_ARCH_LEDS is defined, then NuttX will control the on-board LEDs. If
* CONFIG_ARCH_LEDS is not defined, then the following interfacesare available to
* control the LEDs from user applications.
*
************************************************************************************/
#ifndef CONFIG_ARCH_LEDS
EXTERN void stm32_ledinit(void);
EXTERN void stm32_setled(int led, bool ledon);
EXTERN void stm32_setleds(uint8_t ledset);
#endif
/************************************************************************************
* Name: stm32_lcdclear
*
* Description:
* This is a non-standard LCD interface just for the Shenzhou board. Because
* of the various rotations, clearing the display in the normal way by writing a
* sequences of runs that covers the entire display can be very slow. Here the
* display is cleared by simply setting all GRAM memory to the specified color.
*
************************************************************************************/
EXTERN void stm32_lcdclear(uint16_t color);
/************************************************************************************
* Relay control functions
*
* Description:
* Non-standard functions for relay control from the Shenzhou board.
*
* NOTE: These must match the prototypes in include/nuttx/arch.h
*
************************************************************************************/
#ifdef CONFIG_ARCH_RELAYS
EXTERN void up_relaysinit(void);
EXTERN void relays_setstat(int relays, bool stat);
EXTERN bool relays_getstat(int relays);
EXTERN void relays_setstats(uint32_t relays_stat);
EXTERN uint32_t relays_getstats(void);
EXTERN void relays_onoff(int relays, uint32_t mdelay);
EXTERN void relays_onoffs(uint32_t relays_stat, uint32_t mdelay);
EXTERN void relays_resetmode(int relays);
EXTERN void relays_powermode(int relays);
EXTERN void relays_resetmodes(uint32_t relays_stat);
EXTERN void relays_powermodes(uint32_t relays_stat);
#endif
#undef EXTERN
#if defined(__cplusplus)
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* __CONFIGS_CLOUDCTRL_INCLUDE_BOARD_H */

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############################################################################
# configs/cloudctrl/nsh/Make.defs
#
# Copyright (C) 2012 Gregory Nutt. All rights reserved.
# Author: Gregory Nutt <gnutt@nuttx.org>
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# 1. Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in
# the documentation and/or other materials provided with the
# distribution.
# 3. Neither the name NuttX nor the names of its contributors may be
# used to endorse or promote products derived from this software
# without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
############################################################################
include ${TOPDIR}/.config
include ${TOPDIR}/tools/Config.mk
# Setup for the selected toolchain
ifeq ($(CONFIG_STM32_CODESOURCERYW),y)
# CodeSourcery under Windows
CROSSDEV = arm-none-eabi-
ARCROSSDEV = arm-none-eabi-
WINTOOL = y
ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft
endif
ifeq ($(CONFIG_STM32_CODESOURCERYL),y)
# CodeSourcery under Linux
CROSSDEV = arm-none-eabi-
ARCROSSDEV = arm-none-eabi-
ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft
MAXOPTIMIZATION = -O2
endif
ifeq ($(CONFIG_STM32_ATOLLIC_LITE),y)
# Atollic toolchain under Windows
CROSSDEV = arm-atollic-eabi-
ARCROSSDEV =
WINTOOL = y
ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft
endif
ifeq ($(CONFIG_STM32_ATOLLIC_PRO),y)
# Atollic toolchain under Windows
CROSSDEV = arm-atollic-eabi-
ARCROSSDEV = arm-atollic-eabi-
WINTOOL = y
ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft
endif
ifeq ($(CONFIG_STM32_DEVKITARM),y)
# devkitARM under Windows
CROSSDEV = arm-eabi-
ARCROSSDEV = arm-eabi-
WINTOOL = y
ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft
endif
ifeq ($(CONFIG_STM32_RAISONANCE),y)
# Raisonance RIDE7 under Windows
CROSSDEV = arm-none-eabi-
ARCROSSDEV = arm-none-eabi-
WINTOOL = y
ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft
endif
ifeq ($(CONFIG_STM32_BUILDROOT),y)
# NuttX buildroot under Linux or Cygwin
# OABI
# CROSSDEV = arm-nuttx-elf-
# ARCROSSDEV = arm-nuttx-elf-
# ARCHCPUFLAGS = -mtune=cortex-m3 -march=armv7-m -mfloat-abi=soft
# EABI
CROSSDEV = arm-nuttx-eabi-
ARCROSSDEV = arm-nuttx-eabi-
ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft
MAXOPTIMIZATION = -Os
endif
# Pick the linker script
ifeq ($(CONFIG_STM32_DFU),y)
LDSCRIPT = ld.script.dfu
else
LDSCRIPT = ld.script
endif
ifeq ($(WINTOOL),y)
# Windows-native toolchains
DIRLINK = $(TOPDIR)/tools/winlink.sh
DIRUNLINK = $(TOPDIR)/tools/unlink.sh
MKDEP = $(TOPDIR)/tools/mknulldeps.sh
ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}"
ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}"
ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}"
MAXOPTIMIZATION = -O2
else
# Linux/Cygwin-native toolchain
MKDEP = $(TOPDIR)/tools/mkdeps.sh
ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)
endif
CC = $(CROSSDEV)gcc
CXX = $(CROSSDEV)g++
CPP = $(CROSSDEV)gcc -E
LD = $(CROSSDEV)ld
AR = $(ARCROSSDEV)ar rcs
NM = $(ARCROSSDEV)nm
OBJCOPY = $(CROSSDEV)objcopy
OBJDUMP = $(CROSSDEV)objdump
ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'}
ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1}
ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
ARCHOPTIMIZATION = -g
else
ARCHOPTIMIZATION = $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
endif
ARCHCFLAGS = -fno-builtin
ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow
ARCHWARNINGSXX = -Wall -Wshadow
ARCHDEFINES =
ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES)
AFLAGS = $(CFLAGS) -D__ASSEMBLY__
NXFLATLDFLAGS1 = -r -d -warn-common
NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections
LDNXFLATFLAGS = -e main -s 2048
OBJEXT = .o
LIBEXT = .a
EXEEXT =
ifneq ($(CROSSDEV),arm-nuttx-eabi-)
LDFLAGS += -nostartfiles -nodefaultlibs
endif
ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
LDFLAGS += -g
endif
HOSTCC = gcc
HOSTINCLUDES = -I.
HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -g -pipe
HOSTLDFLAGS =

729
nuttx/configs/cloudctrl/nsh/defconfig Normal file
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@ -0,0 +1,729 @@
#
# Automatically generated file; DO NOT EDIT.
# Nuttx/ Configuration
#
CONFIG_NUTTX_NEWCONFIG=y
#
# Build Setup
#
# CONFIG_EXPERIMENTAL is not set
#
# Build Configuration
#
# CONFIG_APPS_DIR="../apps"
# CONFIG_BUILD_2PASS is not set
#
# Binary Output Formats
#
# CONFIG_RRLOAD_BINARY is not set
CONFIG_INTELHEX_BINARY=y
# CONFIG_MOTOROLA_SREC is not set
# CONFIG_RAW_BINARY is not set
#
# Customize Header Files
#
# CONFIG_ARCH_STDBOOL_H is not set
# CONFIG_ARCH_MATH_H is not set
# CONFIG_ARCH_FLOAT_H is not set
# CONFIG_ARCH_STDARG_H is not set
#
# Debug Options
#
# CONFIG_DEBUG is not set
# CONFIG_DEBUG_SYMBOLS is not set
#
# System Type
#
# CONFIG_ARCH_8051 is not set
CONFIG_ARCH_ARM=y
# CONFIG_ARCH_AVR is not set
# CONFIG_ARCH_HC is not set
# CONFIG_ARCH_MIPS is not set
# CONFIG_ARCH_RGMP is not set
# CONFIG_ARCH_SH is not set
# CONFIG_ARCH_SIM is not set
# CONFIG_ARCH_X86 is not set
# CONFIG_ARCH_Z16 is not set
# CONFIG_ARCH_Z80 is not set
CONFIG_ARCH="arm"
#
# ARM Options
#
# CONFIG_ARCH_CHIP_C5471 is not set
# CONFIG_ARCH_CHIP_CALYPSO is not set
# CONFIG_ARCH_CHIP_DM320 is not set
# CONFIG_ARCH_CHIP_IMX is not set
# CONFIG_ARCH_CHIP_KINETIS is not set
# CONFIG_ARCH_CHIP_LM3S is not set
# CONFIG_ARCH_CHIP_LPC17XX is not set
# CONFIG_ARCH_CHIP_LPC214X is not set
# CONFIG_ARCH_CHIP_LPC2378 is not set
# CONFIG_ARCH_CHIP_LPC31XX is not set
# CONFIG_ARCH_CHIP_LPC43XX is not set
# CONFIG_ARCH_CHIP_SAM3U is not set
CONFIG_ARCH_CHIP_STM32=y
# CONFIG_ARCH_CHIP_STR71X is not set
CONFIG_ARCH_CORTEXM3=y
CONFIG_ARCH_FAMILY="armv7-m"
CONFIG_ARCH_CHIP="stm32"
CONFIG_ARCH_HAVE_CMNVECTOR=y
# CONFIG_ARMV7M_CMNVECTOR is not set
CONFIG_ARCH_HAVE_MPU=y
# CONFIG_ARMV7M_MPU is not set
CONFIG_ARCH_IRQPRIO=y
CONFIG_BOARD_LOOPSPERMSEC=5483
# CONFIG_ARCH_CALIBRATION is not set
# CONFIG_SERIAL_TERMIOS is not set
# CONFIG_NET_MULTICAST is not set
#
# STM32 Configuration Options
#
# CONFIG_ARCH_CHIP_STM32F100C8 is not set
# CONFIG_ARCH_CHIP_STM32F100CB is not set
# CONFIG_ARCH_CHIP_STM32F100R8 is not set
# CONFIG_ARCH_CHIP_STM32F100RB is not set
# CONFIG_ARCH_CHIP_STM32F100RC is not set
# CONFIG_ARCH_CHIP_STM32F100RD is not set
# CONFIG_ARCH_CHIP_STM32F100RE is not set
# CONFIG_ARCH_CHIP_STM32F100V8 is not set
# CONFIG_ARCH_CHIP_STM32F100VB is not set
# CONFIG_ARCH_CHIP_STM32F100VC is not set
# CONFIG_ARCH_CHIP_STM32F100VD is not set
# CONFIG_ARCH_CHIP_STM32F100VE is not set
# CONFIG_ARCH_CHIP_STM32F103RET6 is not set
# CONFIG_ARCH_CHIP_STM32F103VCT6 is not set
# CONFIG_ARCH_CHIP_STM32F103VET6 is not set
# CONFIG_ARCH_CHIP_STM32F103ZET6 is not set
# CONFIG_ARCH_CHIP_STM32F105VBT7 is not set
CONFIG_ARCH_CHIP_STM32F107VC=y
# CONFIG_ARCH_CHIP_STM32F207IG is not set
# CONFIG_ARCH_CHIP_STM32F405RG is not set
# CONFIG_ARCH_CHIP_STM32F405VG is not set
# CONFIG_ARCH_CHIP_STM32F405ZG is not set
# CONFIG_ARCH_CHIP_STM32F407VE is not set
# CONFIG_ARCH_CHIP_STM32F407VG is not set
# CONFIG_ARCH_CHIP_STM32F407ZE is not set
# CONFIG_ARCH_CHIP_STM32F407ZG is not set
# CONFIG_ARCH_CHIP_STM32F407IE is not set
# CONFIG_ARCH_CHIP_STM32F407IG is not set
CONFIG_STM32_STM32F10XX=y
CONFIG_STM32_CONNECTIVITYLINE=y
CONFIG_STM32_CODESOURCERYW=y
# CONFIG_STM32_CODESOURCERYL is not set
# CONFIG_STM32_ATOLLIC_LITE is not set
# CONFIG_STM32_ATOLLIC_PRO is not set
# CONFIG_STM32_DEVKITARM is not set
# CONFIG_STM32_RAISONANCE is not set
# CONFIG_STM32_BUILDROOT is not set
# CONFIG_STM32_DFU is not set
#
# STM32 Peripheral Support
#
# CONFIG_STM32_ADC1 is not set
# CONFIG_STM32_ADC2 is not set
# CONFIG_STM32_ADC3 is not set
CONFIG_STM32_BKP=y
# CONFIG_STM32_CAN1 is not set
# CONFIG_STM32_CRC is not set
# CONFIG_STM32_DMA1 is not set
# CONFIG_STM32_DMA2 is not set
# CONFIG_STM32_DAC1 is not set
# CONFIG_STM32_DAC2 is not set
CONFIG_STM32_ETHMAC=y
# CONFIG_STM32_I2C1 is not set
# CONFIG_STM32_I2C2 is not set
# CONFIG_STM32_IWDG is not set
CONFIG_STM32_PWR=y
CONFIG_STM32_SPI1=y
# CONFIG_STM32_SPI2 is not set
# CONFIG_STM32_SPI3 is not set
# CONFIG_STM32_TIM1 is not set
# CONFIG_STM32_TIM2 is not set
# CONFIG_STM32_TIM3 is not set
# CONFIG_STM32_TIM4 is not set
# CONFIG_STM32_TIM5 is not set
# CONFIG_STM32_TIM6 is not set
# CONFIG_STM32_TIM7 is not set
# CONFIG_STM32_TIM8 is not set
# CONFIG_STM32_USART1 is not set
CONFIG_STM32_USART2=y
# CONFIG_STM32_USART3 is not set
# CONFIG_STM32_UART4 is not set
# CONFIG_STM32_UART5 is not set
# CONFIG_STM32_USB is not set
# CONFIG_STM32_WWDG is not set
CONFIG_STM32_SPI=y
#
# Alternate Pin Mapping
#
CONFIG_STM32_ETH_REMAP=y
# CONFIG_STM32_SPI1_REMAP is not set
CONFIG_STM32_USART2_REMAP=y
# CONFIG_STM32_JTAG_DISABLE is not set
CONFIG_STM32_JTAG_FULL_ENABLE=y
# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set
# CONFIG_STM32_JTAG_SW_ENABLE is not set
# CONFIG_STM32_FORCEPOWER is not set
# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
#
# SPI Configuration
#
# CONFIG_STM32_SPI_INTERRUPTS is not set
# CONFIG_STM32_SPI_DMA is not set
#
# Ethernet MAC configuration
#
CONFIG_STM32_PHYADDR=0
# CONFIG_STM32_MII is not set
CONFIG_STM32_AUTONEG=y
CONFIG_STM32_PHYSR=17
CONFIG_STM32_PHYSR_ALTCONFIG=y
CONFIG_STM32_PHYSR_ALTMODE=0xf000
CONFIG_STM32_PHYSR_10HD=0x1000
CONFIG_STM32_PHYSR_100HD=0x4000
CONFIG_STM32_PHYSR_10FD=0x2000
CONFIG_STM32_PHYSR_100FD=0x8000
# CONFIG_STM32_ETH_PTP is not set
CONFIG_STM32_RMII=y
CONFIG_STM32_RMII_MCO=y
# CONFIG_STM32_RMII_EXTCLK is not set
#
# USB Host Configuration
#
#
# Architecture Options
#
# CONFIG_ARCH_NOINTC is not set
# CONFIG_ARCH_DMA is not set
CONFIG_ARCH_STACKDUMP=y
#
# Board Settings
#
CONFIG_DRAM_START=0x20000000
CONFIG_DRAM_SIZE=65536
CONFIG_ARCH_HAVE_INTERRUPTSTACK=y
CONFIG_ARCH_INTERRUPTSTACK=0
#
# Boot options
#
# CONFIG_BOOT_RUNFROMEXTSRAM is not set
CONFIG_BOOT_RUNFROMFLASH=y
# CONFIG_BOOT_RUNFROMISRAM is not set
# CONFIG_BOOT_RUNFROMSDRAM is not set
# CONFIG_BOOT_COPYTORAM is not set
#
# Board Selection
#
# CONFIG_ARCH_BOARD_OLIMEX_STM32P107 is not set
CONFIG_ARCH_BOARD_CLOUDCTRL=y
# CONFIG_ARCH_BOARD_CUSTOM is not set
CONFIG_ARCH_BOARD="cloudctrl"
#
# Common Board Options
#
CONFIG_ARCH_HAVE_LEDS=y
CONFIG_ARCH_LEDS=y
CONFIG_ARCH_HAVE_BUTTONS=y
# CONFIG_ARCH_BUTTONS is not set
CONFIG_ARCH_HAVE_IRQBUTTONS=y
CONFIG_NSH_MMCSDMINOR=0
CONFIG_NSH_MMCSDSLOTNO=0
CONFIG_NSH_MMCSDSPIPORTNO=1
#
# Board-Specific Options
#
#
# RTOS Features
#
CONFIG_MSEC_PER_TICK=10
CONFIG_RR_INTERVAL=200
# CONFIG_SCHED_INSTRUMENTATION is not set
CONFIG_TASK_NAME_SIZE=0
# CONFIG_JULIAN_TIME is not set
CONFIG_START_YEAR=2012
CONFIG_START_MONTH=9
CONFIG_START_DAY=8
CONFIG_DEV_CONSOLE=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_MUTEX_TYPES is not set
# CONFIG_PRIORITY_INHERITANCE is not set
# CONFIG_FDCLONE_DISABLE is not set
# CONFIG_FDCLONE_STDIO is not set
CONFIG_SDCLONE_DISABLE=y
CONFIG_SCHED_WORKQUEUE=y
CONFIG_SCHED_WORKPRIORITY=192
CONFIG_SCHED_WORKPERIOD=50000
CONFIG_SCHED_WORKSTACKSIZE=2048
CONFIG_SIG_SIGWORK=4
# CONFIG_SCHED_LPWORK is not set
CONFIG_SCHED_WAITPID=y
# CONFIG_SCHED_ATEXIT is not set
# CONFIG_SCHED_ONEXIT is not set
CONFIG_USER_ENTRYPOINT="nsh_main"
CONFIG_DISABLE_OS_API=y
# CONFIG_DISABLE_CLOCK is not set
# CONFIG_DISABLE_POSIX_TIMERS is not set
# CONFIG_DISABLE_PTHREAD is not set
# CONFIG_DISABLE_SIGNALS is not set
# CONFIG_DISABLE_MQUEUE is not set
# CONFIG_DISABLE_MOUNTPOINT is not set
# CONFIG_DISABLE_ENVIRON is not set
CONFIG_DISABLE_POLL=y
#
# Sizes of configurable things (0 disables)
#
CONFIG_MAX_TASKS=16
CONFIG_MAX_TASK_ARGS=4
CONFIG_NPTHREAD_KEYS=4
CONFIG_NFILE_DESCRIPTORS=8
CONFIG_NFILE_STREAMS=8
CONFIG_NAME_MAX=32
CONFIG_PREALLOC_MQ_MSGS=4
CONFIG_MQ_MAXMSGSIZE=32
CONFIG_MAX_WDOGPARMS=2
CONFIG_PREALLOC_WDOGS=8
CONFIG_PREALLOC_TIMERS=4
#
# Stack and heap information
#
# CONFIG_CUSTOM_STACK is not set
CONFIG_IDLETHREAD_STACKSIZE=1024
CONFIG_USERMAIN_STACKSIZE=2048
CONFIG_PTHREAD_STACK_MIN=256
CONFIG_PTHREAD_STACK_DEFAULT=2048
#
# Device Drivers
#
CONFIG_DEV_NULL=y
# CONFIG_DEV_ZERO is not set
# CONFIG_LOOP is not set
# CONFIG_RAMDISK is not set
# CONFIG_CAN is not set
# CONFIG_PWM is not set
# CONFIG_I2C is not set
CONFIG_ARCH_HAVE_I2CRESET=y
CONFIG_SPI=y
# CONFIG_SPI_OWNBUS is not set
CONFIG_SPI_EXCHANGE=y
# CONFIG_SPI_CMDDATA is not set
CONFIG_RTC=y
# CONFIG_RTC_DATETIME is not set
# CONFIG_RTC_HIRES is not set
# CONFIG_RTC_ALARM is not set
# CONFIG_WATCHDOG is not set
# CONFIG_ANALOG is not set
# CONFIG_BCH is not set
# CONFIG_INPUT is not set
# CONFIG_LCD is not set
CONFIG_MMCSD=y
CONFIG_MMCSD_NSLOTS=1
# CONFIG_MMCSD_READONLY is not set
# CONFIG_MMCSD_MULTIBLOCK_DISABLE is not set
CONFIG_MMCSD_MMCSUPPORT=y
CONFIG_MMCSD_HAVECARDDETECT=y
CONFIG_MMCSD_SPI=y
CONFIG_MMCSD_SPICLOCK=12500000
# CONFIG_MMCSD_SDIO is not set
# CONFIG_MTD is not set
# CONFIG_NETDEVICES is not set
# CONFIG_NET_SLIP is not set
# CONFIG_PIPES is not set
# CONFIG_PM is not set
# CONFIG_POWER is not set
# CONFIG_SENSORS is not set
# CONFIG_SERCOMM_CONSOLE is not set
CONFIG_SERIAL=y
# CONFIG_LOWLEVEL_CONSOLE is not set
# CONFIG_16550_UART is not set
CONFIG_ARCH_HAVE_USART2=y
CONFIG_MCU_SERIAL=y
CONFIG_STANDARD_SERIAL=y
CONFIG_USART2_SERIAL_CONSOLE=y
# CONFIG_NO_SERIAL_CONSOLE is not set
#
# USART2 Configuration
#
CONFIG_USART2_RXBUFSIZE=128
CONFIG_USART2_TXBUFSIZE=128
CONFIG_USART2_BAUD=115200
CONFIG_USART2_BITS=8
CONFIG_USART2_PARITY=0
CONFIG_USART2_2STOP=0
# CONFIG_USBDEV is not set
# CONFIG_USBHOST is not set
# CONFIG_WIRELESS is not set
#
# System Logging Device Options
#
#
# System Logging
#
# CONFIG_RAMLOG is not set
#
# Networking Support
#
CONFIG_NET=y
CONFIG_ARCH_HAVE_PHY=y
# CONFIG_PHY_KS8721 is not set
# CONFIG_PHY_DP83848C is not set
# CONFIG_PHY_LAN8720 is not set
CONFIG_PHY_DM9161=y
# CONFIG_NET_NOINTS is not set
CONFIG_NET_MULTIBUFFER=y
# CONFIG_NET_IPv6 is not set
CONFIG_NSOCKET_DESCRIPTORS=10
CONFIG_NET_NACTIVESOCKETS=16
CONFIG_NET_SOCKOPTS=y
CONFIG_NET_BUFSIZE=562
# CONFIG_NET_TCPURGDATA is not set
CONFIG_NET_TCP=y
CONFIG_NET_TCP_CONNS=40
CONFIG_NET_MAX_LISTENPORTS=40
CONFIG_NET_TCP_READAHEAD_BUFSIZE=562
CONFIG_NET_NTCP_READAHEAD_BUFFERS=16
CONFIG_NET_TCP_RECVDELAY=0
CONFIG_NET_TCPBACKLOG=y
CONFIG_NET_UDP=y
CONFIG_NET_UDP_CHECKSUMS=y
CONFIG_NET_UDP_CONNS=8
# CONFIG_NET_BROADCAST is not set
CONFIG_NET_ICMP=y
CONFIG_NET_ICMP_PING=y
# CONFIG_NET_PINGADDRCONF is not set
# CONFIG_NET_IGMP is not set
CONFIG_NET_STATISTICS=y
CONFIG_NET_RECEIVE_WINDOW=562
CONFIG_NET_ARPTAB_SIZE=16
# CONFIG_NET_ARP_IPIN is not set
#
# File Systems
#
#
# File system configuration
#
CONFIG_FS_FAT=y
CONFIG_FAT_LCNAMES=y
CONFIG_FAT_LFN=y
CONFIG_FAT_MAXFNAME=32
# CONFIG_FS_FATTIME is not set
# CONFIG_FAT_DMAMEMORY is not set
# CONFIG_FS_RAMMAP is not set
# CONFIG_NFS is not set
# CONFIG_FS_NXFFS is not set
# CONFIG_FS_ROMFS is not set
#
# System Logging
#
# CONFIG_SYSLOG is not set
#
# Graphics Support
#
# CONFIG_NX is not set
#
# Memory Management
#
# CONFIG_MM_SMALL is not set
CONFIG_MM_REGIONS=1
# CONFIG_GRAN is not set
#
# Binary Formats
#
# CONFIG_BINFMT_DISABLE is not set
# CONFIG_NXFLAT is not set
# CONFIG_ELF is not set
# CONFIG_SYMTAB_ORDEREDBYNAME is not set
#
# Library Routines
#
CONFIG_STDIO_BUFFER_SIZE=256
CONFIG_STDIO_LINEBUFFER=y
CONFIG_NUNGET_CHARS=2
CONFIG_LIB_HOMEDIR="/"
# CONFIG_LIBM is not set
# CONFIG_NOPRINTF_FIELDWIDTH is not set
# CONFIG_LIBC_FLOATINGPOINT is not set
# CONFIG_EOL_IS_CR is not set
# CONFIG_EOL_IS_LF is not set
# CONFIG_EOL_IS_BOTH_CRLF is not set
CONFIG_EOL_IS_EITHER_CRLF=y
# CONFIG_LIBC_STRERROR is not set
# CONFIG_LIBC_PERROR_STDOUT is not set
CONFIG_ARCH_LOWPUTC=y
CONFIG_LIB_SENDFILE_BUFSIZE=512
# CONFIG_ARCH_ROMGETC is not set
# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
#
# Basic CXX Support
#
CONFIG_HAVE_CXX=y
# CONFIG_HAVE_CXXINITIALIZE is not set
# CONFIG_CXX_NEWLONG is not set
#
# uClibc++ Standard C++ Library
#
# CONFIG_UCLIBCXX is not set
#
# Application Configuration
#
#
# Named Applications
#
CONFIG_NAMEDAPP=y
#
# Examples
#
# CONFIG_EXAMPLES_BUTTONS is not set
# CONFIG_EXAMPLES_CAN is not set
# CONFIG_EXAMPLES_CDCACM is not set
# CONFIG_EXAMPLES_COMPOSITE is not set
# CONFIG_EXAMPLES_CXXTEST is not set
# CONFIG_EXAMPLES_DHCPD is not set
# CONFIG_EXAMPLES_ELF is not set
# CONFIG_EXAMPLES_FTPC is not set
# CONFIG_EXAMPLES_FTPD is not set
# CONFIG_EXAMPLES_HELLO is not set
# CONFIG_EXAMPLES_HELLOXX is not set
# CONFIG_EXAMPLES_JSON is not set
# CONFIG_EXAMPLES_HIDKBD is not set
# CONFIG_EXAMPLES_IGMP is not set
# CONFIG_EXAMPLES_LCDRW is not set
# CONFIG_EXAMPLES_MM is not set
# CONFIG_EXAMPLES_MOUNT is not set
# CONFIG_EXAMPLES_MODBUS is not set
# CONFIG_EXAMPLES_NETTEST is not set
CONFIG_EXAMPLES_NSH=y
# CONFIG_EXAMPLES_NULL is not set
# CONFIG_EXAMPLES_NX is not set
# CONFIG_EXAMPLES_NXCONSOLE is not set
# CONFIG_EXAMPLES_NXFFS is not set
# CONFIG_EXAMPLES_NXFLAT is not set
# CONFIG_EXAMPLES_NXHELLO is not set
# CONFIG_EXAMPLES_NXIMAGE is not set
# CONFIG_EXAMPLES_NXLINES is not set
# CONFIG_EXAMPLES_NXTEXT is not set
# CONFIG_EXAMPLES_OSTEST is not set
# CONFIG_EXAMPLES_PASHELLO is not set
# CONFIG_EXAMPLES_PIPE is not set
# CONFIG_EXAMPLES_POLL is not set
# CONFIG_EXAMPLES_QENCODER is not set
# CONFIG_EXAMPLES_RGMP is not set
# CONFIG_EXAMPLES_ROMFS is not set
# CONFIG_EXAMPLES_SENDMAIL is not set
# CONFIG_EXAMPLES_SERLOOP is not set
# CONFIG_EXAMPLES_TELNETD is not set
# CONFIG_EXAMPLES_THTTPD is not set
# CONFIG_EXAMPLES_TIFF is not set
# CONFIG_EXAMPLES_TOUCHSCREEN is not set
# CONFIG_EXAMPLES_UDP is not set
# CONFIG_EXAMPLES_DISCOVER is not set
# CONFIG_EXAMPLES_UIP is not set
# CONFIG_EXAMPLES_USBSERIAL is not set
# CONFIG_EXAMPLES_USBMSC is not set
# CONFIG_EXAMPLES_USBTERM is not set
# CONFIG_EXAMPLES_WATCHDOG is not set
# CONFIG_EXAMPLES_WLAN is not set
#
# Interpreters
#
#
# Interpreters
#
# CONFIG_FICL is not set
# CONFIG_PCODE is not set
#
# Network Utilities
#
#
# Networking Utilities
#
# CONFIG_NETUTILS_CODECS is not set
# CONFIG_NETUTILS_DHCPC is not set
# CONFIG_NETUTILS_DHCPD is not set
# CONFIG_NETUTILS_FTPC is not set
# CONFIG_NETUTILS_FTPD is not set
# CONFIG_NETUTILS_JSON is not set
CONFIG_NETUTILS_RESOLV=y
CONFIG_NET_RESOLV_ENTRIES=8
CONFIG_NET_RESOLV_MAXRESPONSE=96
# CONFIG_NETUTILS_SMTP is not set
CONFIG_NETUTILS_TELNETD=y
CONFIG_NETUTILS_TFTPC=y
# CONFIG_NETUTILS_THTTPD is not set
CONFIG_NETUTILS_UIPLIB=y
CONFIG_NETUTILS_WEBCLIENT=y
CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)"
# CONFIG_NETUTILS_WEBSERVER is not set
# CONFIG_NETUTILS_DISCOVER is not set
# CONFIG_NETUTILS_XMLRPC is not set
#
# ModBus
#
#
# FreeModbus
#
# CONFIG_MODBUS is not set
#
# NSH Library
#
CONFIG_NSH_LIBRARY=y
CONFIG_NSH_BUILTIN_APPS=y
#
# Disable Individual commands
#
# CONFIG_NSH_DISABLE_CAT is not set
# CONFIG_NSH_DISABLE_CD is not set
# CONFIG_NSH_DISABLE_CP is not set
# CONFIG_NSH_DISABLE_DD is not set
# CONFIG_NSH_DISABLE_ECHO is not set
# CONFIG_NSH_DISABLE_EXEC is not set
# CONFIG_NSH_DISABLE_EXIT is not set
# CONFIG_NSH_DISABLE_FREE is not set
# CONFIG_NSH_DISABLE_GET is not set
# CONFIG_NSH_DISABLE_HELP is not set
# CONFIG_NSH_DISABLE_IFCONFIG is not set
# CONFIG_NSH_DISABLE_KILL is not set
# CONFIG_NSH_DISABLE_LOSETUP is not set
# CONFIG_NSH_DISABLE_LS is not set
# CONFIG_NSH_DISABLE_MB is not set
# CONFIG_NSH_DISABLE_MKDIR is not set
# CONFIG_NSH_DISABLE_MKFATFS is not set
# CONFIG_NSH_DISABLE_MKFIFO is not set
# CONFIG_NSH_DISABLE_MKRD is not set
# CONFIG_NSH_DISABLE_MH is not set
# CONFIG_NSH_DISABLE_MOUNT is not set
# CONFIG_NSH_DISABLE_MW is not set
# CONFIG_NSH_DISABLE_NSFMOUNT is not set
# CONFIG_NSH_DISABLE_PS is not set
# CONFIG_NSH_DISABLE_PING is not set
# CONFIG_NSH_DISABLE_PUT is not set
# CONFIG_NSH_DISABLE_PWD is not set
# CONFIG_NSH_DISABLE_RM is not set
# CONFIG_NSH_DISABLE_RMDIR is not set
# CONFIG_NSH_DISABLE_SET is not set
# CONFIG_NSH_DISABLE_SH is not set
# CONFIG_NSH_DISABLE_SLEEP is not set
# CONFIG_NSH_DISABLE_TEST is not set
# CONFIG_NSH_DISABLE_UMOUNT is not set
# CONFIG_NSH_DISABLE_UNSET is not set
# CONFIG_NSH_DISABLE_USLEEP is not set
# CONFIG_NSH_DISABLE_WGET is not set
# CONFIG_NSH_DISABLE_XD is not set
CONFIG_NSH_CODECS_BUFSIZE=128
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_LINELEN=64
CONFIG_NSH_NESTDEPTH=3
# CONFIG_NSH_DISABLESCRIPT is not set
# CONFIG_NSH_DISABLEBG is not set
CONFIG_NSH_CONSOLE=y
# CONFIG_NSH_CONDEV is not set
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_TELNET=y
CONFIG_NSH_TELNETD_PORT=23
CONFIG_NSH_TELNETD_DAEMONPRIO=100
CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048
CONFIG_NSH_TELNETD_CLIENTPRIO=100
CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048
CONFIG_NSH_IOBUFFER_SIZE=512
# CONFIG_NSH_TELNET_LOGIN is not set
CONFIG_NSH_IPADDR=0x0a000002
CONFIG_NSH_DRIPADDR=0x0a000001
CONFIG_NSH_NETMASK=0xffffff00
CONFIG_NSH_NOMAC=y
CONFIG_NSH_MAX_ROUNDTRIP=20
#
# NxWidgets/NxWM
#
#
# System NSH Add-Ons
#
#
# Custom Free Memory Command
#
# CONFIG_SYSTEM_FREE is not set
#
# I2C tool
#
#
# FLASH Program Installation
#
# CONFIG_SYSTEM_INSTALL is not set
#
# readline()
#
CONFIG_SYSTEM_READLINE=y
CONFIG_READLINE_ECHO=y
#
# Power Off
#
# CONFIG_SYSTEM_POWEROFF is not set
#
# RAMTRON
#
# CONFIG_SYSTEM_RAMTRON is not set
#
# SD Card
#
# CONFIG_SYSTEM_SDCARD is not set
#
# Sysinfo
#
# CONFIG_SYSTEM_SYSINFO is not set

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#!/bin/bash
# configs/cloudctrl/nsh/setenv.sh
#
# Copyright (C) 2012 Gregory Nutt. All rights reserved.
# Author: Gregory Nutt <gnutt@nuttx.org>
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# 1. Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in
# the documentation and/or other materials provided with the
# distribution.
# 3. Neither the name NuttX nor the names of its contributors may be
# used to endorse or promote products derived from this software
# without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
if [ "$_" = "$0" ] ; then
echo "You must source this script, not run it!" 1>&2
exit 1
fi
WD=`pwd`
if [ ! -x "setenv.sh" ]; then
echo "This script must be executed from the top-level NuttX build directory"
exit 1
fi
if [ -z "${PATH_ORIG}" ]; then
export PATH_ORIG="${PATH}"
fi
# This is the Cygwin path to the location where I installed the RIDE
# toolchain under windows. You will also have to edit this if you install
# the RIDE toolchain in any other location
#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin"
# This is the Cygwin path to the location where I installed the CodeSourcery
# toolchain under windows. You will also have to edit this if you install
# the CodeSourcery toolchain in any other location
export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin"
# These are the Cygwin paths to the locations where I installed the Atollic
# toolchain under windows. You will also have to edit this if you install
# the Atollic toolchain in any other location. /usr/bin is added before
# the Atollic bin path because there is are binaries named gcc.exe and g++.exe
# at those locations as well.
#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin"
#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin"
# This is the Cygwin path to the location where I build the buildroot
# toolchain.
#export TOOLCHAIN_BIN="${WD}/../misc/buildroot/build_arm_nofpu/staging_dir/bin"
# This is the path to the tools/ subdirectory
export TOOLS_DIR="${WD}/configs/shenzhou/tools"
# Add the path to the toolchain to the PATH variable
export PATH="${TOOLCHAIN_BIN}:${TOOLS_DIR}:/sbin:/usr/sbin:${PATH_ORIG}"
echo "PATH : ${PATH}"

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/****************************************************************************
* configs/cloudctrl/scripts/ld.script
*
* Copyright (C) 2012 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/* The STM32F107VC has 256K of FLASH beginning at address 0x0800:0000 and
* 64K of SRAM beginning at address 0x2000:0000.
*/
MEMORY
{
flash (rx) : ORIGIN = 0x08000000, LENGTH = 256K
sram (rwx) : ORIGIN = 0x20000000, LENGTH = 64K
}
OUTPUT_ARCH(arm)
ENTRY(_stext)
SECTIONS
{
.text : {
_stext = ABSOLUTE(.);
*(.vectors)
*(.text .text.*)
*(.fixup)
*(.gnu.warning)
*(.rodata .rodata.*)
*(.gnu.linkonce.t.*)
*(.glue_7)
*(.glue_7t)
*(.got)
*(.gcc_except_table)
*(.gnu.linkonce.r.*)
_etext = ABSOLUTE(.);
} > flash
.init_section : {
_sinit = ABSOLUTE(.);
*(.init_array .init_array.*)
_einit = ABSOLUTE(.);
} > flash
.ARM.extab : {
*(.ARM.extab*)
} > flash
__exidx_start = ABSOLUTE(.);
.ARM.exidx : {
*(.ARM.exidx*)
} > flash
__exidx_end = ABSOLUTE(.);
_eronly = ABSOLUTE(.);
/* The STM32F107VC has 64Kb of SRAM beginning at the following address */
.data : {
_sdata = ABSOLUTE(.);
*(.data .data.*)
*(.gnu.linkonce.d.*)
CONSTRUCTORS
_edata = ABSOLUTE(.);
} > sram AT > flash
.bss : {
_sbss = ABSOLUTE(.);
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
_ebss = ABSOLUTE(.);
} > sram
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_info 0 : { *(.debug_info) }
.debug_line 0 : { *(.debug_line) }
.debug_pubnames 0 : { *(.debug_pubnames) }
.debug_aranges 0 : { *(.debug_aranges) }
}

117
nuttx/configs/cloudctrl/scripts/ld.script.dfu Normal file
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/****************************************************************************
* configs/cloudctrl/scripts/ld.script.dfu
*
* Copyright (C) 2012 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/* The STM32F107VC has 256K of FLASH beginning at address 0x0800:0000 and
* 64K of SRAM beginning at address 0x2000:0000. Here we assume that the
* STMicro DFU bootloader is being used. In that case, the corrct load .text
* load address is 0x08003000 (leaving 208K).
*/
MEMORY
{
flash (rx) : ORIGIN = 0x08003000, LENGTH = 208K
sram (rwx) : ORIGIN = 0x20000000, LENGTH = 64K
}
OUTPUT_ARCH(arm)
ENTRY(_stext)
SECTIONS
{
.text : {
_stext = ABSOLUTE(.);
*(.vectors)
*(.text .text.*)
*(.fixup)
*(.gnu.warning)
*(.rodata .rodata.*)
*(.gnu.linkonce.t.*)
*(.glue_7)
*(.glue_7t)
*(.got)
*(.gcc_except_table)
*(.gnu.linkonce.r.*)
_etext = ABSOLUTE(.);
} > flash
.init_section : {
_sinit = ABSOLUTE(.);
*(.init_array .init_array.*)
_einit = ABSOLUTE(.);
} > flash
.ARM.extab : {
*(.ARM.extab*)
} > flash
__exidx_start = ABSOLUTE(.);
.ARM.exidx : {
*(.ARM.exidx*)
} > flash
__exidx_end = ABSOLUTE(.);
_eronly = ABSOLUTE(.);
/* The STM32F107VC has 64Kb of SRAM beginning at the following address */
.data : {
_sdata = ABSOLUTE(.);
*(.data .data.*)
*(.gnu.linkonce.d.*)
CONSTRUCTORS
_edata = ABSOLUTE(.);
} > sram AT > flash
.bss : {
_sbss = ABSOLUTE(.);
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
_ebss = ABSOLUTE(.);
} > sram
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_info 0 : { *(.debug_info) }
.debug_line 0 : { *(.debug_line) }
.debug_pubnames 0 : { *(.debug_pubnames) }
.debug_aranges 0 : { *(.debug_aranges) }
}

128
nuttx/configs/cloudctrl/src/Makefile Normal file
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############################################################################
# configs/cloudctrl/src/Makefile
#
# Copyright (C) 2012 Gregory Nutt. All rights reserved.
# Author: Gregory Nutt <gnutt@nuttx.org>
# Darcy Gong <darcy.gong@gmail.com>
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# 1. Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in
# the documentation and/or other materials provided with the
# distribution.
# 3. Neither the name NuttX nor the names of its contributors may be
# used to endorse or promote products derived from this software
# without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
############################################################################
-include $(TOPDIR)/Make.defs
CFLAGS += -I$(TOPDIR)/sched
ASRCS =
AOBJS = $(ASRCS:.S=$(OBJEXT))
CSRCS = up_boot.c up_spi.c
ifeq ($(CONFIG_HAVE_CXX),y)
CSRCS += up_cxxinitialize.c
endif
ifeq ($(CONFIG_ARCH_LEDS),y)
CSRCS += up_autoleds.c
else
CSRCS += up_userleds.c
endif
ifeq ($(CONFIG_ARCH_BUTTONS),y)
CSRCS += up_buttons.c
endif
ifeq ($(CONFIG_ARCH_RELAYS),y)
CSRCS += up_relays.c
endif
ifeq ($(CONFIG_STM32_OTGFS),y)
CSRCS += up_usb.c
endif
ifeq ($(CONFIG_NSH_ARCHINIT),y)
CSRCS += up_nsh.c
endif
ifeq ($(CONFIG_MTD_W25),y)
CSRCS += up_w25.c
endif
ifeq ($(CONFIG_USBMSC),y)
CSRCS += up_usbmsc.c
endif
ifeq ($(CONFIG_ADC),y)
CSRCS += up_adc.c
endif
ifeq ($(CONFIG_WATCHDOG),y)
CSRCS += up_watchdog.c
endif
COBJS = $(CSRCS:.c=$(OBJEXT))
SRCS = $(ASRCS) $(CSRCS)
OBJS = $(AOBJS) $(COBJS)
ARCH_SRCDIR = $(TOPDIR)/arch/$(CONFIG_ARCH)/src
ifeq ($(WINTOOL),y)
CFLAGS += -I "${shell cygpath -w $(ARCH_SRCDIR)/chip}" \
-I "${shell cygpath -w $(ARCH_SRCDIR)/common}" \
-I "${shell cygpath -w $(ARCH_SRCDIR)/armv7-m}"
else
CFLAGS += -I$(ARCH_SRCDIR)/chip -I$(ARCH_SRCDIR)/common -I$(ARCH_SRCDIR)/armv7-m
endif
all: libboard$(LIBEXT)
$(AOBJS): %$(OBJEXT): %.S
$(call ASSEMBLE, $<, $@)
$(COBJS) $(LINKOBJS): %$(OBJEXT): %.c
$(call COMPILE, $<, $@)
libboard$(LIBEXT): $(OBJS)
$(call ARCHIVE, $@, $(OBJS))
.depend: Makefile $(SRCS)
$(Q) $(MKDEP) $(CC) -- $(CFLAGS) -- $(SRCS) >Make.dep
$(Q) touch $@
depend: .depend
clean:
$(call DELFILE, libboard$(LIBEXT))
$(call CLEAN)
distclean: clean
$(call DELFILE, Make.dep)
$(call DELFILE, .depend)
-include Make.dep

282
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/****************************************************************************************************
* configs/cloudctrl/src/cloudctrl-internal.h
* arch/arm/src/board/cloudctrl-internal.n
*
* Copyright (C) 2012 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
* Darcy Gong <darcy.gong@gmail.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************************************/
#ifndef __CONFIGS_CLOUDCTRLL_SRC_CLOUDCTRL_INTERNAL_H
#define __CONFIGS_CLOUDCTRLL_SRC_CLOUDCTRL_INTERNAL_H
/****************************************************************************************************
* Included Files
****************************************************************************************************/
#include <nuttx/config.h>
#include <nuttx/compiler.h>
#include <stdint.h>
/****************************************************************************************************
* Definitions
****************************************************************************************************/
/* Configuration ************************************************************************************/
/* How many SPI modules does this chip support? */
#if STM32_NSPI < 1
# undef CONFIG_STM32_SPI1
# undef CONFIG_STM32_SPI2
# undef CONFIG_STM32_SPI3
#elif STM32_NSPI < 2
# undef CONFIG_STM32_SPI2
# undef CONFIG_STM32_SPI3
#elif STM32_NSPI < 3
# undef CONFIG_STM32_SPI3
#endif
/* cloudctrl GPIO Configuration **********************************************************************/
/* STM3240G-EVAL GPIOs ******************************************************************************/
/* Ethernet
*
* -- ---- -------------- ----------------------------------------------------------
* PN NAME SIGNAL NOTES
* -- ---- -------------- ----------------------------------------------------------
* 24 PA1 MII_RX_CLK Ethernet PHY NOTE: Despite the MII labeling of these
* RMII_REF_CLK Ethernet PHY signals, the DM916AEP is actually configured
* 25 PA2 MII_MDIO Ethernet PHY to work in RMII mode.
* 48 PB11 MII_TX_EN Ethernet PHY
* 51 PB12 MII_TXD0 Ethernet PHY
* 52 PB13 MII_TXD1 Ethernet PHY
* 16 PC1 MII_MDC Ethernet PHY
* 34 PC5 MII_INT Ethernet PHY
* 55 PD8 MII_RX_DV Ethernet PHY. Requires CONFIG_STM32_ETH_REMAP
* 55 PD8 RMII_CRSDV Ethernet PHY. Requires CONFIG_STM32_ETH_REMAP
* 56 PD9 MII_RXD0 Ethernet PHY. Requires CONFIG_STM32_ETH_REMAP
* 57 PD10 MII_RXD1 Ethernet PHY. Requires CONFIG_STM32_ETH_REMAP
*
* The board desdign can support a 50MHz external clock to drive the PHY
* (U9). However, on my board, U9 is not present.
*
* 67 PA8 MCO DM9161AEP
*/
#ifdef CONFIG_STM32_ETHMAC
# define GPIO_MII_INT (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_EXTI|GPIO_PORTC|GPIO_PIN5)
#endif
/* Use MCU Pin Reset DM9161 PHY Chip */
#ifdef CONFIG_PHY_DM9161
# define GPIO_DM9161_RET (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|GPIO_OUTPUT_SET|\
GPIO_PORTB|GPIO_PIN15)
#endif
/* Wireless
*
* -- ---- -------------- -------------------------------------------------------------------
* PN NAME SIGNAL NOTES
* -- ---- -------------- -------------------------------------------------------------------
* 26 PA3 315M_VT
* 17 PC2 WIRELESS_INT
* 18 PC3 WIRELESS_CE To the NRF24L01 2.4G wireless module
* 59 PD12 WIRELESS_CS To the NRF24L01 2.4G wireless module
*/
#define GPIO_WIRELESS_CS (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
GPIO_OUTPUT_SET|GPIO_PORTD|GPIO_PIN12)
/* Buttons
*
* -- ---- -------------- -------------------------------------------------------------------
* PN NAME SIGNAL NOTES
* -- ---- -------------- -------------------------------------------------------------------
* 23 PA0 WAKEUP Connected to KEY3. Active low: Closing KEY4 pulls WAKEUP to ground.
* 47 PB10 USERKEY Connected to KEY1
* 33 PC4 TAMPER Connected to KEY2
*/
/* BUTTONS -- NOTE that all have EXTI interrupts configured */
#define MIN_IRQBUTTON BUTTON_KEY1
#define MAX_IRQBUTTON BUTTON_KEY3
#define NUM_IRQBUTTONS (BUTTON_KEY3 - BUTTON_KEY1 + 1)
#define GPIO_BTN_WAKEUP (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_EXTI|GPIO_PORTC|GPIO_PIN4)
#define GPIO_BTN_USERKEY (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_EXTI|GPIO_PORTB|GPIO_PIN10)
#define GPIO_BTN_TAMPER (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_EXTI|GPIO_PORTA|GPIO_PIN0)
/* LEDs
*
* -- ---- -------------- -------------------------------------------------------------------
* PN NAME SIGNAL NOTES
* -- ---- -------------- -------------------------------------------------------------------
* 1 PE2 LED1 Active low: Pulled high
* 2 PE3 LED2 Active low: Pulled high
* 3 PE4 LED3 Active low: Pulled high
* 4 PE5 LED4 Active low: Pulled high
*/
#define GPIO_LED1 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN2)
#define GPIO_LED2 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN3)
#define GPIO_LED3 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN4)
#define GPIO_LED4 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN5)
/* RS-485
*
* -- ---- -------------- -------------------------------------------------------------------
* PN NAME SIGNAL NOTES
* -- ---- -------------- -------------------------------------------------------------------
* 88 PD7 485_DIR SP3485 read enable (not)
*/
/* To be provided */
/* USB
*
* -- ---- -------------- -------------------------------------------------------------------
* PN NAME SIGNAL NOTES
* -- ---- -------------- -------------------------------------------------------------------
* 95 PB8 USB_PWR Drives USB VBUS
*/
#define GPIO_OTGFS_PWRON (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_SPEED_100MHz|\
GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN8)
/* Audio DAC
*
* -- ---- -------------- -------------------------------------------------------------------
* PN NAME SIGNAL NOTES
* -- ---- -------------- -------------------------------------------------------------------
*/
/* To be provided */
/* SPI FLASH
*
* -- ---- -------------- -------------------------------------------------------------------
* PN NAME SIGNAL NOTES
* -- ---- -------------- -------------------------------------------------------------------
* 96 PB9 F_CS To both the TFT LCD (CN13) and to the W25X16 SPI FLASH
*/
#define GPIO_FLASH_CS (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN9)
/* Relays */
#define NUM_RELAYS 2
#define GPIO_RELAYS_R00 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN0)
#define GPIO_RELAYS_R01 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN1)
/****************************************************************************************************
* Public Types
****************************************************************************************************/
/****************************************************************************************************
* Public data
****************************************************************************************************/
#ifndef __ASSEMBLY__
/****************************************************************************************************
* Public Functions
****************************************************************************************************/
/****************************************************************************************************
* Name: stm32_spiinitialize
*
* Description:
* Called to configure SPI chip select GPIO pins for the STM3240G-EVAL board.
*
****************************************************************************************************/
void weak_function stm32_spiinitialize(void);
/****************************************************************************************************
* Name: stm32_usbinitialize
*
* Description:
* Called from stm32_usbinitialize very early in inialization to setup USB-related GPIO pins for
* the STM3240G-EVAL board.
*
****************************************************************************************************/
#ifdef CONFIG_STM32_OTGFS
void weak_function stm32_usbinitialize(void);
#endif
/****************************************************************************************************
* Name: stm32_usbhost_initialize
*
* Description:
* Called at application startup time to initialize the USB host functionality. This function will
* start a thread that will monitor for device connection/disconnection events.
*
****************************************************************************************************/
#if defined(CONFIG_STM32_OTGFS) && defined(CONFIG_USBHOST)
int stm32_usbhost_initialize(void);
#endif
/****************************************************************************
* Name: stm32_sdinitialize
*
* Description:
* Initialize the SPI-based SD card. Requires CONFIG_DISABLE_MOUNTPOINT=n
* and CONFIG_STM32_SPI1=y
*
****************************************************************************/
int stm32_sdinitialize(int minor);
/****************************************************************************
* Name: stm32_w25initialize
*
* Description:
* Initialize and register the W25 FLASH file system.
*
****************************************************************************/
#ifdef CONFIG_MTD_W25
int stm32_w25initialize(int minor);
#endif
#endif /* __ASSEMBLY__ */
#endif /* __CONFIGS_CLOUDCTRLL_SRC_CLOUDCTRL_INTERNAL_H */

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/************************************************************************************
* configs/cloudctrl/src/up_adc.c
* arch/arm/src/board/up_adc.c
*
* Copyright (C) 2011-2012 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
* Darcy Gong <darcy.gong@gmail.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#include <errno.h>
#include <debug.h>
#include <nuttx/analog/adc.h>
#include <arch/board/board.h>
#include "chip.h"
#include "up_arch.h"
#include "stm32_pwm.h"
#include "cloudctrl-internal.h"
#ifdef CONFIG_ADC
/************************************************************************************
* Definitions
************************************************************************************/
/* Configuration ********************************************************************/
/* Up to 3 ADC interfaces are supported */
#if STM32_NADC < 3
# undef CONFIG_STM32_ADC3
#endif
#if STM32_NADC < 2
# undef CONFIG_STM32_ADC2
#endif
#if STM32_NADC < 1
# undef CONFIG_STM32_ADC1
#endif
#if defined(CONFIG_STM32_ADC1) || defined(CONFIG_STM32_ADC2) || defined(CONFIG_STM32_ADC3)
#ifndef CONFIG_STM32_ADC1
# warning "Channel information only available for ADC1"
#endif
/* The number of ADC channels in the conversion list */
#define ADC1_NCHANNELS 1
/************************************************************************************
* Private Data
************************************************************************************/
/* Identifying number of each ADC channel. The only internal signal for ADC testing
* is the potentiometer input:
*
* ADC1_IN10(PC0) Potentiometer
*
* External signals are also available on CON5 CN14:
*
* ADC_IN8 (PB0) CON5 CN14 Pin2
* ADC_IN9 (PB1) CON5 CN14 Pin1
*/
#ifdef CONFIG_STM32_ADC1
static const uint8_t g_chanlist[ADC1_NCHANNELS] = {10}; //{10, 8, 9};
/* Configurations of pins used by each ADC channel */
static const uint32_t g_pinlist[ADC1_NCHANNELS] = {GPIO_ADC12_IN10}; //{GPIO_ADC12_IN10, GPIO_ADC12_IN8, GPIO_ADC12_IN9};
#endif
/************************************************************************************
* Private Functions
************************************************************************************/
/************************************************************************************
* Public Functions
************************************************************************************/
/************************************************************************************
* Name: adc_devinit
*
* Description:
* All STM32 architectures must provide the following interface to work with
* examples/adc.
*
************************************************************************************/
int adc_devinit(void)
{
#ifdef CONFIG_STM32_ADC1
static bool initialized = false;
struct adc_dev_s *adc;
int ret;
int i;
/* Check if we have already initialized */
if (!initialized)
{
/* Configure the pins as analog inputs for the selected channels */
for (i = 0; i < ADC1_NCHANNELS; i++)
{
stm32_configgpio(g_pinlist[i]);
}
/* Call stm32_adcinitialize() to get an instance of the ADC interface */
adc = stm32_adcinitialize(1, g_chanlist, ADC1_NCHANNELS);
if (adc == NULL)
{
adbg("ERROR: Failed to get ADC interface\n");
return -ENODEV;
}
/* Register the ADC driver at "/dev/adc0" */
ret = adc_register("/dev/adc0", adc);
if (ret < 0)
{
adbg("adc_register failed: %d\n", ret);
return ret;
}
/* Now we are initialized */
initialized = true;
}
return OK;
#else
return -ENOSYS;
#endif
}
#endif /* CONFIG_STM32_ADC1 || CONFIG_STM32_ADC2 || CONFIG_STM32_ADC3 */
#endif /* CONFIG_ADC */

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/****************************************************************************
* configs/cloudctrl/src/up_autoleds.c
* arch/arm/src/board/up_autoleds.c
*
* Copyright (C) 2012 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
* Darcy Gong <darcy.gong@gmail.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <stdbool.h>
#include <debug.h>
#include <arch/board/board.h>
#include <nuttx/power/pm.h>
#include "chip.h"
#include "up_arch.h"
#include "up_internal.h"
#include "stm32_internal.h"
#include "cloudctrl-internal.h"
/****************************************************************************
* Definitions
****************************************************************************/
/* Enables debug output from this file (needs CONFIG_DEBUG with
* CONFIG_DEBUG_VERBOSE too)
*/
#undef LED_DEBUG /* Define to enable debug */
#ifdef LED_DEBUG
# define leddbg lldbg
# define ledvdbg llvdbg
#else
# define leddbg(x...)
# define ledvdbg(x...)
#endif
/* The following definitions map the encoded LED setting to GPIO settings */
#define CLOUDCTRL_LED1 (1 << 0)
#define CLOUDCTRL_LED2 (1 << 1)
#define CLOUDCTRL_LED3 (1 << 2)
#define CLOUDCTRL_LED4 (1 << 3)
#define ON_SETBITS_SHIFT (0)
#define ON_CLRBITS_SHIFT (4)
#define OFF_SETBITS_SHIFT (8)
#define OFF_CLRBITS_SHIFT (12)
#define ON_BITS(v) ((v) & 0xff)
#define OFF_BITS(v) (((v) >> 8) & 0x0ff)
#define SETBITS(b) ((b) & 0x0f)
#define CLRBITS(b) (((b) >> 4) & 0x0f)
#define ON_SETBITS(v) (SETBITS(ON_BITS(v))
#define ON_CLRBITS(v) (CLRBITS(ON_BITS(v))
#define OFF_SETBITS(v) (SETBITS(OFF_BITS(v))
#define OFF_CLRBITS(v) (CLRBITS(OFF_BITS(v))
#define LED_STARTED_ON_SETBITS ((CLOUDCTRL_LED1) << ON_SETBITS_SHIFT)
#define LED_STARTED_ON_CLRBITS ((CLOUDCTRL_LED2|CLOUDCTRL_LED3|CLOUDCTRL_LED4) << ON_CLRBITS_SHIFT)
#define LED_STARTED_OFF_SETBITS (0 << OFF_SETBITS_SHIFT)
#define LED_STARTED_OFF_CLRBITS ((CLOUDCTRL_LED1|CLOUDCTRL_LED2|CLOUDCTRL_LED3|CLOUDCTRL_LED4) << OFF_CLRBITS_SHIFT)
#define LED_HEAPALLOCATE_ON_SETBITS ((CLOUDCTRL_LED2) << ON_SETBITS_SHIFT)
#define LED_HEAPALLOCATE_ON_CLRBITS ((CLOUDCTRL_LED1|CLOUDCTRL_LED3|CLOUDCTRL_LED4) << ON_CLRBITS_SHIFT)
#define LED_HEAPALLOCATE_OFF_SETBITS ((CLOUDCTRL_LED1) << OFF_SETBITS_SHIFT)
#define LED_HEAPALLOCATE_OFF_CLRBITS ((CLOUDCTRL_LED2|CLOUDCTRL_LED3|CLOUDCTRL_LED4) << OFF_CLRBITS_SHIFT)
#define LED_IRQSENABLED_ON_SETBITS ((CLOUDCTRL_LED1|CLOUDCTRL_LED2) << ON_SETBITS_SHIFT)
#define LED_IRQSENABLED_ON_CLRBITS ((CLOUDCTRL_LED3|CLOUDCTRL_LED4) << ON_CLRBITS_SHIFT)
#define LED_IRQSENABLED_OFF_SETBITS ((CLOUDCTRL_LED2) << OFF_SETBITS_SHIFT)
#define LED_IRQSENABLED_OFF_CLRBITS ((CLOUDCTRL_LED1|CLOUDCTRL_LED3|CLOUDCTRL_LED4) << OFF_CLRBITS_SHIFT)
#define LED_STACKCREATED_ON_SETBITS ((CLOUDCTRL_LED3) << ON_SETBITS_SHIFT)
#define LED_STACKCREATED_ON_CLRBITS ((CLOUDCTRL_LED1|CLOUDCTRL_LED2|CLOUDCTRL_LED4) << ON_CLRBITS_SHIFT)
#define LED_STACKCREATED_OFF_SETBITS ((CLOUDCTRL_LED1|CLOUDCTRL_LED2) << OFF_SETBITS_SHIFT)
#define LED_STACKCREATED_OFF_CLRBITS ((CLOUDCTRL_LED3|CLOUDCTRL_LED4) << OFF_CLRBITS_SHIFT)
#define LED_INIRQ_ON_SETBITS ((CLOUDCTRL_LED1) << ON_SETBITS_SHIFT)
#define LED_INIRQ_ON_CLRBITS ((0) << ON_CLRBITS_SHIFT)
#define LED_INIRQ_OFF_SETBITS ((0) << OFF_SETBITS_SHIFT)
#define LED_INIRQ_OFF_CLRBITS ((CLOUDCTRL_LED1) << OFF_CLRBITS_SHIFT)
#define LED_SIGNAL_ON_SETBITS ((CLOUDCTRL_LED2) << ON_SETBITS_SHIFT)
#define LED_SIGNAL_ON_CLRBITS ((0) << ON_CLRBITS_SHIFT)
#define LED_SIGNAL_OFF_SETBITS ((0) << OFF_SETBITS_SHIFT)
#define LED_SIGNAL_OFF_CLRBITS ((CLOUDCTRL_LED2) << OFF_CLRBITS_SHIFT)
#define LED_ASSERTION_ON_SETBITS ((CLOUDCTRL_LED3) << ON_SETBITS_SHIFT)
#define LED_ASSERTION_ON_CLRBITS ((0) << ON_CLRBITS_SHIFT)
#define LED_ASSERTION_OFF_SETBITS ((0) << OFF_SETBITS_SHIFT)
#define LED_ASSERTION_OFF_CLRBITS ((CLOUDCTRL_LED3) << OFF_CLRBITS_SHIFT)
#define LED_PANIC_ON_SETBITS ((CLOUDCTRL_LED3) << ON_SETBITS_SHIFT)
#define LED_PANIC_ON_CLRBITS ((0) << ON_CLRBITS_SHIFT)
#define LED_PANIC_OFF_SETBITS ((0) << OFF_SETBITS_SHIFT)
#define LED_PANIC_OFF_CLRBITS ((CLOUDCTRL_LED3) << OFF_CLRBITS_SHIFT)
/**************************************************************************************
* Private Function Protototypes
**************************************************************************************/
/* LED State Controls */
static inline void led_clrbits(unsigned int clrbits);
static inline void led_setbits(unsigned int setbits);
static void led_setonoff(unsigned int bits);
/* LED Power Management */
#ifdef CONFIG_PM
static void led_pm_notify(struct pm_callback_s *cb, enum pm_state_e pmstate);
static int led_pm_prepare(struct pm_callback_s *cb, enum pm_state_e pmstate);
#endif
/****************************************************************************
* Private Data
****************************************************************************/
static const uint16_t g_ledbits[8] =
{
(LED_STARTED_ON_SETBITS | LED_STARTED_ON_CLRBITS |
LED_STARTED_OFF_SETBITS | LED_STARTED_OFF_CLRBITS),
(LED_HEAPALLOCATE_ON_SETBITS | LED_HEAPALLOCATE_ON_CLRBITS |
LED_HEAPALLOCATE_OFF_SETBITS | LED_HEAPALLOCATE_OFF_CLRBITS),
(LED_IRQSENABLED_ON_SETBITS | LED_IRQSENABLED_ON_CLRBITS |
LED_IRQSENABLED_OFF_SETBITS | LED_IRQSENABLED_OFF_CLRBITS),
(LED_STACKCREATED_ON_SETBITS | LED_STACKCREATED_ON_CLRBITS |
LED_STACKCREATED_OFF_SETBITS | LED_STACKCREATED_OFF_CLRBITS),
(LED_INIRQ_ON_SETBITS | LED_INIRQ_ON_CLRBITS |
LED_INIRQ_OFF_SETBITS | LED_INIRQ_OFF_CLRBITS),
(LED_SIGNAL_ON_SETBITS | LED_SIGNAL_ON_CLRBITS |
LED_SIGNAL_OFF_SETBITS | LED_SIGNAL_OFF_CLRBITS),
(LED_ASSERTION_ON_SETBITS | LED_ASSERTION_ON_CLRBITS |
LED_ASSERTION_OFF_SETBITS | LED_ASSERTION_OFF_CLRBITS),
(LED_PANIC_ON_SETBITS | LED_PANIC_ON_CLRBITS |
LED_PANIC_OFF_SETBITS | LED_PANIC_OFF_CLRBITS)
};
#ifdef CONFIG_PM
static struct pm_callback_s g_ledscb =
{
.notify = led_pm_notify,
.prepare = led_pm_prepare,
};
#endif
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: led_clrbits
*
* Description:
* Clear all LEDs to the bit encoded state
*
****************************************************************************/
static inline void led_clrbits(unsigned int clrbits)
{
/* All LEDs are pulled up and, hence, active low */
if ((clrbits & CLOUDCTRL_LED1) != 0)
{
stm32_gpiowrite(GPIO_LED1, true);
}
if ((clrbits & CLOUDCTRL_LED2) != 0)
{
stm32_gpiowrite(GPIO_LED2, true);
}
if ((clrbits & CLOUDCTRL_LED3) != 0)
{
stm32_gpiowrite(GPIO_LED3, true);
}
if ((clrbits & CLOUDCTRL_LED4) != 0)
{
stm32_gpiowrite(GPIO_LED4, true);
}
}
/****************************************************************************
* Name: led_setbits
*
* Description:
* Set all LEDs to the bit encoded state
*
****************************************************************************/
static inline void led_setbits(unsigned int setbits)
{
/* All LEDs are pulled up and, hence, active low */
if ((setbits & CLOUDCTRL_LED1) != 0)
{
stm32_gpiowrite(GPIO_LED1, false);
}
if ((setbits & CLOUDCTRL_LED2) != 0)
{
stm32_gpiowrite(GPIO_LED2, false);
}
if ((setbits & CLOUDCTRL_LED3) != 0)
{
stm32_gpiowrite(GPIO_LED3, false);
}
if ((setbits & CLOUDCTRL_LED4) != 0)
{
stm32_gpiowrite(GPIO_LED4, false);
}
}
/****************************************************************************
* Name: led_setonoff
*
* Description:
* Set/clear all LEDs to the bit encoded state
*
****************************************************************************/
static void led_setonoff(unsigned int bits)
{
led_clrbits(CLRBITS(bits));
led_setbits(SETBITS(bits));
}
/****************************************************************************
* Name: led_pm_notify
*
* Description:
* Notify the driver of new power state. This callback is called after
* all drivers have had the opportunity to prepare for the new power state.
*
****************************************************************************/
#ifdef CONFIG_PM
static void led_pm_notify(struct pm_callback_s *cb , enum pm_state_e pmstate)
{
switch (pmstate)
{
case(PM_NORMAL):
{
/* Restore normal LEDs operation */
}
break;
case(PM_IDLE):
{
/* Entering IDLE mode - Turn leds off */
}
break;
case(PM_STANDBY):
{
/* Entering STANDBY mode - Logic for PM_STANDBY goes here */
}
break;
case(PM_SLEEP):
{
/* Entering SLEEP mode - Logic for PM_SLEEP goes here */
}
break;
default:
{
/* Should not get here */
}
break;
}
}
#endif
/****************************************************************************
* Name: led_pm_prepare
*
* Description:
* Request the driver to prepare for a new power state. This is a warning
* that the system is about to enter into a new power state. The driver
* should begin whatever operations that may be required to enter power
* state. The driver may abort the state change mode by returning a
* non-zero value from the callback function.
*
****************************************************************************/
#ifdef CONFIG_PM
static int led_pm_prepare(struct pm_callback_s *cb , enum pm_state_e pmstate)
{
/* No preparation to change power modes is required by the LEDs driver.
* We always accept the state change by returning OK.
*/
return OK;
}
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: up_ledinit
****************************************************************************/
#ifdef CONFIG_ARCH_LEDS
void up_ledinit(void)
{
/* Configure LED1-4 GPIOs for output */
stm32_configgpio(GPIO_LED1);
stm32_configgpio(GPIO_LED2);
stm32_configgpio(GPIO_LED3);
stm32_configgpio(GPIO_LED4);
}
/****************************************************************************
* Name: up_ledon
****************************************************************************/
void up_ledon(int led)
{
led_setonoff(ON_BITS(g_ledbits[led]));
}
/****************************************************************************
* Name: up_ledoff
****************************************************************************/
void up_ledoff(int led)
{
led_setonoff(OFF_BITS(g_ledbits[led]));
}
/****************************************************************************
* Name: up_ledpminitialize
****************************************************************************/
#ifdef CONFIG_PM
void up_ledpminitialize(void)
{
/* Register to receive power management callbacks */
int ret = pm_register(&g_ledscb);
if (ret != OK)
{
up_ledon(LED_ASSERTION);
}
}
#endif /* CONFIG_PM */
#endif /* CONFIG_ARCH_LEDS */

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/************************************************************************************
* configs/cloudctrl/src/up_boot.c
* arch/arm/src/board/up_boot.c
*
* Copyright (C) 2012 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
* Darcy Gong <darcy.gong@gmail.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#include <debug.h>
#include <arch/board/board.h>
#include "up_arch.h"
#include "cloudctrl-internal.h"
/************************************************************************************
* Definitions
************************************************************************************/
/************************************************************************************
* Private Functions
************************************************************************************/
#ifdef CONFIG_PHY_DM9161
static inline void stm232_configdm9161(void)
{
stm32_configgpio(GPIO_DM9161_RET);
stm32_gpiowrite(GPIO_DM9161_RET, true);
}
# else
# define stm232_configdm9161()
#endif
/************************************************************************************
* Public Functions
************************************************************************************/
/************************************************************************************
* Name: stm32_boardinitialize
*
* Description:
* All STM32 architectures must provide the following entry point. This entry point
* is called early in the intitialization -- after all memory has been configured
* and mapped but before any devices have been initialized.
*
************************************************************************************/
void stm32_boardinitialize(void)
{
/* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak function
* stm32_spiinitialize() has been brought into the link.
*/
#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI3)
if (stm32_spiinitialize)
{
stm32_spiinitialize();
}
#endif
/* Configure the DM9161 PHY reset pin and take it out of reset */
stm232_configdm9161();
/* Initialize USB is 1) USBDEV is selected, 2) the USB controller is not
* disabled, and 3) the weak function stm32_usbinitialize() has been brought
* into the build.
*/
#if defined(CONFIG_USBDEV) && defined(CONFIG_STM32_USB)
if (stm32_usbinitialize)
{
stm32_usbinitialize();
}
#endif
/* Configure on-board LEDs if LED support has been selected. */
#ifdef CONFIG_ARCH_LEDS
up_ledinit();
#endif
}

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/****************************************************************************
* configs/cloudctrl/src/up_buttons.c
*
* Copyright (C) 2012 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
* Darcy Gong <darcy.gong@gmail.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <arch/board/board.h>
#include "cloudctrl-internal.h"
#ifdef CONFIG_ARCH_BUTTONS
/****************************************************************************
* Definitions
****************************************************************************/
/****************************************************************************
* Private Data
****************************************************************************/
/* Pin configuration for each cloudctrl button. This array is indexed by
* the BUTTON_* definitions in board.h
*/
static const uint16_t g_buttons[NUM_BUTTONS] =
{
GPIO_BTN_USERKEY, GPIO_BTN_TAMPER, GPIO_BTN_WAKEUP
};
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: up_buttoninit
*
* Description:
* up_buttoninit() must be called to initialize button resources. After
* that, up_buttons() may be called to collect the current state of all
* buttons or up_irqbutton() may be called to register button interrupt
* handlers.
*
****************************************************************************/
void up_buttoninit(void)
{
int i;
/* Configure the GPIO pins as inputs. NOTE that EXTI interrupts are
* configured for some pins but NOT used in this file
*/
for (i = 0; i < NUM_BUTTONS; i++)
{
stm32_configgpio(g_buttons[i]);
}
}
/****************************************************************************
* Name: up_buttons
****************************************************************************/
uint8_t up_buttons(void)
{
uint8_t ret = 0;
int i;
/* Check that state of each key */
for (i = 0; i < NUM_BUTTONS; i++)
{
/* A LOW value means that the key is pressed for most keys. The exception
* is the WAKEUP button.
*/
bool released = stm32_gpioread(g_buttons[i]);
if (i == BUTTON_WAKEUP)
{
released = !released;
}
/* Accumulate the set of depressed (not released) keys */
if (!released)
{
ret |= (1 << i);
}
}
return ret;
}
/************************************************************************************
* Button support.
*
* Description:
* up_buttoninit() must be called to initialize button resources. After
* that, up_buttons() may be called to collect the current state of all
* buttons or up_irqbutton() may be called to register button interrupt
* handlers.
*
* After up_buttoninit() has been called, up_buttons() may be called to
* collect the state of all buttons. up_buttons() returns an 8-bit bit set
* with each bit associated with a button. See the BUTTON_*_BIT and JOYSTICK_*_BIT
* definitions in board.h for the meaning of each bit.
*
* up_irqbutton() may be called to register an interrupt handler that will
* be called when a button is depressed or released. The ID value is a
* button enumeration value that uniquely identifies a button resource. See the
* BUTTON_* and JOYSTICK_* definitions in board.h for the meaning of enumeration
* value. The previous interrupt handler address is returned (so that it may
* restored, if so desired).
*
************************************************************************************/
#ifdef CONFIG_ARCH_IRQBUTTONS
xcpt_t up_irqbutton(int id, xcpt_t irqhandler)
{
xcpt_t oldhandler = NULL;
/* The following should be atomic */
if (id >= MIN_IRQBUTTON && id <= MAX_IRQBUTTON)
{
oldhandler = stm32_gpiosetevent(g_buttons[id], true, true, true, irqhandler);
}
return oldhandler;
}
#endif
#endif /* CONFIG_ARCH_BUTTONS */

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/************************************************************************************
* configs/cloudctrl/src/up_cxxinitialize.c
* arch/arm/src/board/up_cxxinitialize.c
*
* Copyright (C) 2012 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
* Darcy Gong <darcy.gong@gmail.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#include <debug.h>
#include <nuttx/arch.h>
#include <arch/stm32/chip.h>
#include "chip.h"
#if defined(CONFIG_HAVE_CXX) && defined(CONFIG_HAVE_CXXINITIALIZE)
/************************************************************************************
* Definitions
************************************************************************************/
/* Debug ****************************************************************************/
/* Non-standard debug that may be enabled just for testing the static constructors */
#ifndef CONFIG_DEBUG
# undef CONFIG_DEBUG_CXX
#endif
#ifdef CONFIG_DEBUG_CXX
# define cxxdbg dbg
# define cxxlldbg lldbg
# ifdef CONFIG_DEBUG_VERBOSE
# define cxxvdbg vdbg
# define cxxllvdbg llvdbg
# else
# define cxxvdbg(x...)
# define cxxllvdbg(x...)
# endif
#else
# define cxxdbg(x...)
# define cxxlldbg(x...)
# define cxxvdbg(x...)
# define cxxllvdbg(x...)
#endif
/************************************************************************************
* Private Types
************************************************************************************/
/* This type defines one entry in initialization array */
typedef void (*initializer_t)(void);
/************************************************************************************
* External references
************************************************************************************/
/* _sinit and _einit are symbols exported by the linker script that mark the
* beginning and the end of the C++ initialization section.
*/
extern initializer_t _sinit;
extern initializer_t _einit;
/* _stext and _etext are symbols exported by the linker script that mark the
* beginning and the end of text.
*/
extern uint32_t _stext;
extern uint32_t _etext;
/************************************************************************************
* Private Functions
************************************************************************************/
/************************************************************************************
* Public Functions
************************************************************************************/
/****************************************************************************
* Name: up_cxxinitialize
*
* Description:
* If C++ and C++ static constructors are supported, then this function
* must be provided by board-specific logic in order to perform
* initialization of the static C++ class instances.
*
* This function should then be called in the application-specific
* user_start logic in order to perform the C++ initialization. NOTE
* that no component of the core NuttX RTOS logic is involved; This
* function defintion only provides the 'contract' between application
* specific C++ code and platform-specific toolchain support
*
***************************************************************************/
void up_cxxinitialize(void)
{
initializer_t *initp;
cxxdbg("_sinit: %p _einit: %p _stext: %p _etext: %p\n",
&_sinit, &_einit, &_stext, &_etext);
/* Visit each entry in the initialzation table */
for (initp = &_sinit; initp != &_einit; initp++)
{
initializer_t initializer = *initp;
cxxdbg("initp: %p initializer: %p\n", initp, initializer);
/* Make sure that the address is non-NULL and lies in the text region
* defined by the linker script. Some toolchains may put NULL values
* or counts in the initialization table
*/
if ((void*)initializer > (void*)&_stext && (void*)initializer < (void*)&_etext)
{
cxxdbg("Calling %p\n", initializer);
initializer();
}
}
}
#endif /* CONFIG_HAVE_CXX && CONFIG_HAVE_CXXINITIALIZE */

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/****************************************************************************
* config/cloudctrl/src/up_nsh.c
* arch/arm/src/board/up_nsh.c
*
* Copyright (C) 2012 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
* Darcy Gong <darcy.gong@gmail.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdbool.h>
#include <stdio.h>
#include <debug.h>
#include <errno.h>
#include "stm32_internal.h"
#include "cloudctrl-internal.h"
/****************************************************************************
* Pre-Processor Definitions
****************************************************************************/
/* Configuration ************************************************************/
/* Assume that we support everything until convinced otherwise */
#define HAVE_USBDEV 1
#define HAVE_USBHOST 1
#define HAVE_W25 1
/* Can't support the W25 device if it SPI1 or W25 support is not enabled */
#if !defined(CONFIG_STM32_SPI1) || !defined(CONFIG_MTD_W25)
# undef HAVE_W25
#endif
/* Can't support W25 features if mountpoints are disabled */
#ifdef CONFIG_DISABLE_MOUNTPOINT
# undef HAVE_W25
#endif
/* Default W25 minor number */
#if defined(HAVE_W25) && !defined(CONFIG_NSH_W25MINOR)
# define CONFIG_NSH_W25MINOR 0
#endif
/* Can't support USB host or device features if USB OTG FS is not enabled */
#ifndef CONFIG_STM32_OTGFS
# undef HAVE_USBDEV
# undef HAVE_USBHOST
#endif
/* Can't support USB device is USB device is not enabled */
#ifndef CONFIG_USBDEV
# undef HAVE_USBDEV
#endif
/* Can't support USB host is USB host is not enabled */
#ifndef CONFIG_USBHOST
# undef HAVE_USBHOST
#endif
/* Debug ********************************************************************/
#ifdef CONFIG_CPP_HAVE_VARARGS
# ifdef CONFIG_DEBUG
# define message(...) lib_lowprintf(__VA_ARGS__)
# else
# define message(...) printf(__VA_ARGS__)
# endif
#else
# ifdef CONFIG_DEBUG
# define message lib_lowprintf
# else
# define message printf
# endif
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: nsh_archinitialize
*
* Description:
* Perform architecture specific initialization
*
****************************************************************************/
int nsh_archinitialize(void)
{
#if defined(HAVE_USBHOST) || defined(HAVE_W25)
int ret;
#endif
/* Initialize and register the W25 FLASH file system. */
#ifdef HAVE_W25
ret = stm32_w25initialize(CONFIG_NSH_W25MINOR);
if (ret < 0)
{
message("nsh_archinitialize: Failed to initialize W25 minor %d: %d\n",
CONFIG_NSH_W25MINOR, ret);
return ret;
}
#endif
/* Initialize USB host operation. stm32_usbhost_initialize() starts a thread
* will monitor for USB connection and disconnection events.
*/
#ifdef HAVE_USBHOST
ret = stm32_usbhost_initialize();
if (ret != OK)
{
message("nsh_archinitialize: Failed to initialize USB host: %d\n", ret);
return ret;
}
#endif
return OK;
}

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/****************************************************************************
* configs/cloudctrl/src/up_relays.c
*
* Copyright (C) 2012 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
* Darcy Gong <darcy.gong@gmail.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <unistd.h>
#include <debug.h>
#include <nuttx/arch.h>
#include <arch/board/board.h>
#include "cloudctrl-internal.h"
#ifdef CONFIG_ARCH_RELAYS
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#define RELAYS_MIN_RESET_TIME 5
#define RELAYS_RESET_MTIME 5
#define RELAYS_POWER_MTIME 50
/****************************************************************************
* Private Data
****************************************************************************/
static uint32_t g_relays_stat = 0;
static bool g_relays_init = false;
static const uint16_t g_relays[NUM_RELAYS] =
{
GPIO_RELAYS_R00
#ifdef GPIO_RELAYS_R01
, GPIO_RELAYS_R01
#endif
#ifdef GPIO_RELAYS_R02
, GPIO_RELAYS_R02
#endif
#ifdef GPIO_RELAYS_R03
, GPIO_RELAYS_R03
#endif
#ifdef GPIO_RELAYS_R04
, GPIO_RELAYS_R04
#endif
#ifdef GPIO_RELAYS_R05
, GPIO_RELAYS_R05
#endif
#ifdef GPIO_RELAYS_R06
, GPIO_RELAYS_R06
#endif
#ifdef GPIO_RELAYS_R07
, GPIO_RELAYS_R07
#endif
#ifdef GPIO_RELAYS_R08
, GPIO_RELAYS_R08
#endif
#ifdef GPIO_RELAYS_R09
, GPIO_RELAYS_R09
#endif
#ifdef GPIO_RELAYS_R10
, GPIO_RELAYS_R10
#endif
#ifdef GPIO_RELAYS_R11
, GPIO_RELAYS_R11
#endif
#ifdef GPIO_RELAYS_R12
, GPIO_RELAYS_R12
#endif
#ifdef GPIO_RELAYS_R13
, GPIO_RELAYS_R13
#endif
#ifdef GPIO_RELAYS_R14
, GPIO_RELAYS_R14
#endif
#ifdef GPIO_RELAYS_R15
, GPIO_RELAYS_R15
#endif
#ifdef GPIO_RELAYS_R16
, GPIO_RELAYS_R16
#endif
#ifdef GPIO_RELAYS_R17
, GPIO_RELAYS_R17
#endif
#ifdef GPIO_RELAYS_R18
, GPIO_RELAYS_R18
#endif
#ifdef GPIO_RELAYS_R19
, GPIO_RELAYS_R19
#endif
#ifdef GPIO_RELAYS_R20
, GPIO_RELAYS_R20
#endif
#ifdef GPIO_RELAYS_R21
, GPIO_RELAYS_R21
#endif
#ifdef GPIO_RELAYS_R22
, GPIO_RELAYS_R22
#endif
#ifdef GPIO_RELAYS_R23
, GPIO_RELAYS_R23
#endif
#ifdef GPIO_RELAYS_R24
, GPIO_RELAYS_R24
#endif
#ifdef GPIO_RELAYS_R25
, GPIO_RELAYS_R25
#endif
#ifdef GPIO_RELAYS_R26
, GPIO_RELAYS_R26
#endif
#ifdef GPIO_RELAYS_R27
, GPIO_RELAYS_R27
#endif
#ifdef GPIO_RELAYS_R28
, GPIO_RELAYS_R28
#endif
#ifdef GPIO_RELAYS_R29
, GPIO_RELAYS_R29
#endif
#ifdef GPIO_RELAYS_R30
, GPIO_RELAYS_R30
#endif
#ifdef GPIO_RELAYS_R31
, GPIO_RELAYS_R31
#endif
};
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
void up_relaysinit(void)
{
int i;
if (g_relays_init)
{
return;
}
/* Configure the GPIO pins as inputs. NOTE that EXTI interrupts are
* configured for some pins but NOT used in this file
*/
for (i = 0; i < NUM_RELAYS; i++)
{
stm32_configgpio(g_relays[i]);
stm32_gpiowrite(g_relays[i], false);
}
g_relays_init = true;
}
void relays_setstat(int relays,bool stat)
{
if ((unsigned)relays < NUM_RELAYS)
{
stm32_gpiowrite(g_relays[relays], stat);
if (!stat)
{
g_relays_stat &= ~(1 << relays);
}
else
{
g_relays_stat |= (1 << relays);
}
}
}
bool relays_getstat(int relays)
{
if ((unsigned)relays < NUM_RELAYS)
{
return (g_relays_stat & (1 << relays)) != 0;
}
return false;
}
void relays_setstats(uint32_t relays_stat)
{
int i;
for (i = 0; i < NUM_RELAYS; i++)
{
relays_setstat(i, (relays_stat & (1<<i))!=0);
}
}
uint32_t relays_getstats(void)
{
return (uint32_t)g_relays_stat;
}
void relays_onoff(int relays, uint32_t mdelay)
{
if ((unsigned)relays < NUM_RELAYS)
{
if (mdelay>0)
{
if (relays_getstat(relays))
{
relays_setstat(relays, false);
usleep(RELAYS_MIN_RESET_TIME*1000*1000);
}
relays_setstat(relays,true);
usleep(mdelay*100*1000);
relays_setstat(relays, false);
}
}
}
void relays_onoffs(uint32_t relays_stat, uint32_t mdelay)
{
int i;
for (i = 0; i < NUM_RELAYS; i++)
{
relays_onoff(i, mdelay);
}
}
void relays_resetmode(int relays)
{
relays_onoff(relays, RELAYS_RESET_MTIME);
}
void relays_powermode(int relays)
{
relays_onoff(relays, RELAYS_POWER_MTIME);
}
void relays_resetmodes(uint32_t relays_stat)
{
relays_onoffs(relays_stat, RELAYS_RESET_MTIME);
}
void relays_powermodes(uint32_t relays_stat)
{
relays_onoffs(relays_stat, RELAYS_POWER_MTIME);
}
#endif /* CONFIG_ARCH_BUTTONS */

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/************************************************************************************
* configs/cloudctrl/src/up_spi.c
* arch/arm/src/board/up_spi.c
*
* Copyright (C) 2009 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
* Darcy Gong <darcy.gong@gmail.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <stdbool.h>
#include <debug.h>
#include <nuttx/spi.h>
#include <arch/board/board.h>
#include "up_arch.h"
#include "chip.h"
#include "stm32_internal.h"
#include "cloudctrl-internal.h"
#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI3)
/************************************************************************************
* Definitions
************************************************************************************/
/* Enables debug output from this file (needs CONFIG_DEBUG too) */
#ifndef CONFIG_DEBUG
# undef CONFIG_DEBUG_SPI
#endif
#ifdef CONFIG_DEBUG_SPI
# define spidbg lldbg
# ifdef CONFIG_DEBUG_VERBOSE
# define spivdbg lldbg
# else
# define spivdbg(x...)
# endif
#else
# define spidbg(x...)
# define spivdbg(x...)
#endif
/************************************************************************************
* Private Functions
************************************************************************************/
/************************************************************************************
* Public Functions
************************************************************************************/
/************************************************************************************
* Name: stm32_spiinitialize
*
* Description:
* Called to configure SPI chip select GPIO pins for the cloudctrl board.
*
************************************************************************************/
void weak_function stm32_spiinitialize(void)
{
/* NOTE: Clocking for SPI1 and/or SPI3 was already provided in stm32_rcc.c.
* Configurations of SPI pins is performed in stm32_spi.c.
* Here, we only initialize chip select pins unique to the board
* architecture.
*/
/* SPI1 connects to the SD CARD and to the SPI FLASH */
#ifdef CONFIG_STM32_SPI1
stm32_configgpio(GPIO_FLASH_CS); /* FLASH chip select */
#endif
/* SPI3 connects to TFT LCD module and the RF24L01 2.4G wireless module */
#ifdef CONFIG_STM32_SPI3
#endif
}
/****************************************************************************
* Name: stm32_spi1/2/3select and stm32_spi1/2/3status
*
* Description:
* The external functions, stm32_spi1/2/3select and stm32_spi1/2/3status must be
* provided by board-specific logic. They are implementations of the select
* and status methods of the SPI interface defined by struct spi_ops_s (see
* include/nuttx/spi.h). All other methods (including up_spiinitialize())
* are provided by common STM32 logic. To use this common SPI logic on your
* board:
*
* 1. Provide logic in stm32_boardinitialize() to configure SPI chip select
* pins.
* 2. Provide stm32_spi1/2/3select() and stm32_spi1/2/3status() functions in your
* board-specific logic. These functions will perform chip selection and
* status operations using GPIOs in the way your board is configured.
* 3. Add a calls to up_spiinitialize() in your low level application
* initialization logic
* 4. The handle returned by up_spiinitialize() may then be used to bind the
* SPI driver to higher level logic (e.g., calling
* mmcsd_spislotinitialize(), for example, will bind the SPI driver to
* the SPI MMC/SD driver).
*
****************************************************************************/
#ifdef CONFIG_STM32_SPI1
void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
{
spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
/* SPI1 connects to the SD CARD and to the SPI FLASH */
if (devid == SPIDEV_FLASH)
{
/* Set the GPIO low to select and high to de-select */
stm32_gpiowrite(GPIO_FLASH_CS, !selected);
}
}
uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
{
return SPI_STATUS_PRESENT;
}
#endif
#ifdef CONFIG_STM32_SPI3
void stm32_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
{
spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
}
uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
{
return 0;
}
#endif
#endif /* CONFIG_STM32_SPI1 || CONFIG_STM32_SPI3 */

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/************************************************************************************
* configs/cloudctrl/src/up_usbdev.c
* arch/arm/src/board/up_boot.c
*
* Copyright (C) 2012 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
* Darcy Gong <darcy.gong@gmail.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <stdint.h>
#include <stdbool.h>
#include <sched.h>
#include <errno.h>
#include <debug.h>
#include <nuttx/usb/usbdev.h>
#include <nuttx/usb/usbhost.h>
#include <nuttx/usb/usbdev_trace.h>
#include "up_arch.h"
#include "stm32_internal.h"
#include "cloudctrl-internal.h"
#ifdef CONFIG_STM32_OTGFS
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
#if defined(CONFIG_USBDEV) || defined(CONFIG_USBHOST)
# define HAVE_USB 1
#else
# warning "CONFIG_STM32_OTGFS is enabled but neither CONFIG_USBDEV nor CONFIG_USBHOST"
# undef HAVE_USB
#endif
#ifndef CONFIG_USBHOST_DEFPRIO
# define CONFIG_USBHOST_DEFPRIO 50
#endif
#ifndef CONFIG_USBHOST_STACKSIZE
# define CONFIG_USBHOST_STACKSIZE 1024
#endif
/************************************************************************************
* Private Data
************************************************************************************/
#ifdef CONFIG_USBHOST
static struct usbhost_driver_s *g_drvr;
#endif
/************************************************************************************
* Private Functions
************************************************************************************/
/************************************************************************************
* Name: usbhost_waiter
*
* Description:
* Wait for USB devices to be connected.
*
************************************************************************************/
#ifdef CONFIG_USBHOST
static int usbhost_waiter(int argc, char *argv[])
{
bool connected = false;
int ret;
uvdbg("Running\n");
for (;;)
{
/* Wait for the device to change state */
ret = DRVR_WAIT(g_drvr, connected);
DEBUGASSERT(ret == OK);
connected = !connected;
uvdbg("%s\n", connected ? "connected" : "disconnected");
/* Did we just become connected? */
if (connected)
{
/* Yes.. enumerate the newly connected device */
(void)DRVR_ENUMERATE(g_drvr);
}
}
/* Keep the compiler from complaining */
return 0;
}
#endif
/************************************************************************************
* Public Functions
************************************************************************************/
/************************************************************************************
* Name: stm32_usbinitialize
*
* Description:
* Called from stm32_usbinitialize very early in inialization to setup USB-related
* GPIO pins for the STM3240G-EVAL board.
*
************************************************************************************/
void stm32_usbinitialize(void)
{
/* The OTG FS has an internal soft pull-up. No GPIO configuration is required */
/* Configure the OTG FS VBUS sensing GPIO, Power On, and Overcurrent GPIOs */
#ifdef CONFIG_STM32_OTGFS
stm32_configgpio(GPIO_OTGFS_VBUS);
stm32_configgpio(GPIO_OTGFS_PWRON);
stm32_configgpio(GPIO_OTGFS_OVER);
#endif
}
/***********************************************************************************
* Name: stm32_usbhost_initialize
*
* Description:
* Called at application startup time to initialize the USB host functionality.
* This function will start a thread that will monitor for device
* connection/disconnection events.
*
***********************************************************************************/
#ifdef CONFIG_USBHOST
int stm32_usbhost_initialize(void)
{
int pid;
int ret;
/* First, register all of the class drivers needed to support the drivers
* that we care about:
*/
uvdbg("Register class drivers\n");
ret = usbhost_storageinit();
if (ret != OK)
{
udbg("Failed to register the mass storage class\n");
}
/* Then get an instance of the USB host interface */
uvdbg("Initialize USB host\n");
g_drvr = usbhost_initialize(0);
if (g_drvr)
{
/* Start a thread to handle device connection. */
uvdbg("Start usbhost_waiter\n");
pid = TASK_CREATE("usbhost", CONFIG_USBHOST_DEFPRIO,
CONFIG_USBHOST_STACKSIZE,
(main_t)usbhost_waiter, (const char **)NULL);
return pid < 0 ? -ENOEXEC : OK;
}
return -ENODEV;
}
#endif
/***********************************************************************************
* Name: stm32_usbhost_vbusdrive
*
* Description:
* Enable/disable driving of VBUS 5V output. This function must be provided be
* each platform that implements the STM32 OTG FS host interface
*
* "On-chip 5 V VBUS generation is not supported. For this reason, a charge pump
* or, if 5 V are available on the application board, a basic power switch, must
* be added externally to drive the 5 V VBUS line. The external charge pump can
* be driven by any GPIO output. When the application decides to power on VBUS
* using the chosen GPIO, it must also set the port power bit in the host port
* control and status register (PPWR bit in OTG_FS_HPRT).
*
* "The application uses this field to control power to this port, and the core
* clears this bit on an overcurrent condition."
*
* Input Parameters:
* iface - For future growth to handle multiple USB host interface. Should be zero.
* enable - true: enable VBUS power; false: disable VBUS power
*
* Returned Value:
* None
*
***********************************************************************************/
#ifdef CONFIG_USBHOST
void stm32_usbhost_vbusdrive(int iface, bool enable)
{
DEBUGASSERT(iface == 0);
if (enable)
{
/* Enable the Power Switch by driving the enable pin low */
stm32_gpiowrite(GPIO_OTGFS_PWRON, false);
}
else
{
/* Disable the Power Switch by driving the enable pin high */
stm32_gpiowrite(GPIO_OTGFS_PWRON, true);
}
}
#endif
/************************************************************************************
* Name: stm32_setup_overcurrent
*
* Description:
* Setup to receive an interrupt-level callback if an overcurrent condition is
* detected.
*
* Input paramter:
* handler - New overcurrent interrupt handler
*
* Returned value:
* Old overcurrent interrupt handler
*
************************************************************************************/
#ifdef CONFIG_USBHOST
xcpt_t stm32_setup_overcurrent(xcpt_t handler)
{
return NULL;
}
#endif
/************************************************************************************
* Name: stm32_usbsuspend
*
* Description:
* Board logic must provide the stm32_usbsuspend logic if the USBDEV driver is
* used. This function is called whenever the USB enters or leaves suspend mode.
* This is an opportunity for the board logic to shutdown clocks, power, etc.
* while the USB is suspended.
*
************************************************************************************/
#ifdef CONFIG_USBDEV
void stm32_usbsuspend(FAR struct usbdev_s *dev, bool resume)
{
ulldbg("resume: %d\n", resume);
}
#endif
#endif /* CONFIG_STM32_OTGFS */

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/****************************************************************************
* configs/cloudctrl/src/up_usbmsc.c
*
* Copyright (C) 2012 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
* Darcy Gong <darcy.gong@gmail.com>
*
* Configure and register the STM32 SPI-based MMC/SD block driver.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdio.h>
#include <debug.h>
#include <errno.h>
#include "stm32_internal.h"
/****************************************************************************
* Pre-Processor Definitions
****************************************************************************/
/* Configuration ************************************************************/
#ifndef CONFIG_EXAMPLES_USBMSC_DEVMINOR1
# define CONFIG_EXAMPLES_USBMSC_DEVMINOR1 0
#endif
/* Debug ********************************************************************/
#ifdef CONFIG_CPP_HAVE_VARARGS
# ifdef CONFIG_DEBUG
# define message(...) lib_lowprintf(__VA_ARGS__)
# define msgflush()
# else
# define message(...) printf(__VA_ARGS__)
# define msgflush() fflush(stdout)
# endif
#else
# ifdef CONFIG_DEBUG
# define message lib_lowprintf
# define msgflush()
# else
# define message printf
# define msgflush() fflush(stdout)
# endif
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: usbmsc_archinitialize
*
* Description:
* Perform architecture specific initialization
*
****************************************************************************/
int usbmsc_archinitialize(void)
{
/* If examples/usbmsc is built as an NSH command, then SD slot should
* already have been initized in nsh_archinitialize() (see up_nsh.c). In
* this case, there is nothing further to be done here.
*/
#ifndef CONFIG_EXAMPLES_USBMSC_BUILTIN
return stm32_sdinitialize(CONFIG_EXAMPLES_USBMSC_DEVMINOR1);
#else
return OK;
#endif
}

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/****************************************************************************
* configs/cloudctrl/src/up_userleds.c
* arch/arm/src/board/up_userleds.c
*
* Copyright (C) 2012 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
* Darcy Gong <darcy.gong@gmail.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <stdbool.h>
#include <debug.h>
#include <arch/board/board.h>
#include "chip.h"
#include "up_arch.h"
#include "up_internal.h"
#include "stm32_internal.h"
#include "cloudctrl-internal.h"
#ifndef CONFIG_ARCH_LEDS
/****************************************************************************
* Definitions
****************************************************************************/
/* Enables debug output from this file (needs CONFIG_DEBUG with
* CONFIG_DEBUG_VERBOSE too)
*/
#undef LED_DEBUG /* Define to enable debug */
#ifdef LED_DEBUG
# define leddbg lldbg
# define ledvdbg llvdbg
#else
# define leddbg(x...)
# define ledvdbg(x...)
#endif
/****************************************************************************
* Private Data
****************************************************************************/
/* This array maps an LED number to GPIO pin configuration */
static uint32_t g_ledcfg[BOARD_NLEDS] =
{
GPIO_LED1, GPIO_LED2, GPIO_LED3, GPIO_LED4
};
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: stm32_ledinit
****************************************************************************/
void stm32_ledinit(void)
{
/* Configure LED1-3 GPIOs for output */
stm32_configgpio(GPIO_LED1);
stm32_configgpio(GPIO_LED2);
stm32_configgpio(GPIO_LED3);
stm32_configgpio(GPIO_LED4);
}
/****************************************************************************
* Name: stm32_setled
****************************************************************************/
void stm32_setled(int led, bool ledon)
{
if ((unsigned)led < BOARD_NLEDS)
{
stm32_gpiowrite(g_ledcfg[led], ledon);
}
}
/****************************************************************************
* Name: stm32_setleds
****************************************************************************/
void stm32_setleds(uint8_t ledset)
{
stm32_gpiowrite(BOARD_LED1, (ledset & BOARD_LED1_BIT) == 0);
stm32_gpiowrite(BOARD_LED2, (ledset & BOARD_LED2_BIT) == 0);
stm32_gpiowrite(BOARD_LED3, (ledset & BOARD_LED3_BIT) == 0);
stm32_gpiowrite(BOARD_LED4, (ledset & BOARD_LED4_BIT) == 0);
}
#endif /* !CONFIG_ARCH_LEDS */

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nuttx/configs/cloudctrl/src/up_w25.c Normal file
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/****************************************************************************
* config/cloudctrl/src/up_w25.c
* arch/arm/src/board/up_w25.c
*
* Copyright (C) 2012 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
* Darcy Gong <darcy.gong@gmail.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <sys/mount.h>
#include <stdbool.h>
#include <stdio.h>
#include <errno.h>
#include <debug.h>
#ifdef CONFIG_STM32_SPI1
# include <nuttx/spi.h>
# include <nuttx/mtd.h>
# include <nuttx/fs/nxffs.h>
#endif
#include "cloudctrl-internal.h"
/****************************************************************************
* Pre-Processor Definitions
****************************************************************************/
/* Configuration ************************************************************/
/* Can't support the W25 device if it SPI1 or W25 support is not enabled */
#define HAVE_W25 1
#if !defined(CONFIG_STM32_SPI1) || !defined(CONFIG_MTD_W25)
# undef HAVE_W25
#endif
/* Can't support W25 features if mountpoints are disabled */
#if defined(CONFIG_DISABLE_MOUNTPOINT)
# undef HAVE_W25
#endif
/* Can't support both FAT and NXFFS */
#if defined(CONFIG_FS_FAT) && defined(CONFIG_FS_NXFFS)
# warning "Can't support both FAT and NXFFS -- using FAT"
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: stm32_w25initialize
*
* Description:
* Initialize and register the W25 FLASH file system.
*
****************************************************************************/
int stm32_w25initialize(int minor)
{
#ifdef HAVE_W25
FAR struct spi_dev_s *spi;
FAR struct mtd_dev_s *mtd;
#ifdef CONFIG_FS_NXFFS
char devname[12];
#endif
int ret;
/* Get the SPI port */
spi = up_spiinitialize(1);
if (!spi)
{
fdbg("ERROR: Failed to initialize SPI port 2\n");
return -ENODEV;
}
/* Now bind the SPI interface to the W25 SPI FLASH driver */
mtd = w25_initialize(spi);
if (!mtd)
{
fdbg("ERROR: Failed to bind SPI port 2 to the SST 25 FLASH driver\n");
return -ENODEV;
}
#ifndef CONFIG_FS_NXFFS
/* And finally, use the FTL layer to wrap the MTD driver as a block driver */
ret = ftl_initialize(minor, mtd);
if (ret < 0)
{
fdbg("ERROR: Initialize the FTL layer\n");
return ret;
}
#else
/* Initialize to provide NXFFS on the MTD interface */
ret = nxffs_initialize(mtd);
if (ret < 0)
{
fdbg("ERROR: NXFFS initialization failed: %d\n", -ret);
return ret;
}
/* Mount the file system at /mnt/w25 */
snprintf(devname, 12, "/mnt/w25%c", 'a' + minor);
ret = mount(NULL, devname, "nxffs", 0, NULL);
if (ret < 0)
{
fdbg("ERROR: Failed to mount the NXFFS volume: %d\n", errno);
return ret;
}
#endif
#endif
return OK;
}

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nuttx/configs/cloudctrl/src/up_watchdog.c Normal file
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/************************************************************************************
* configs/cloudctrl/src/up_watchdog.c
* arch/arm/src/board/up_watchdog.c
*
* Copyright (C) 2012 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
* Darcy Gong <darcy.gong@gmail.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#include <errno.h>
#include <debug.h>
#include <nuttx/watchdog.h>
#include <arch/board/board.h>
#include "stm32_wdg.h"
#ifdef CONFIG_WATCHDOG
/************************************************************************************
* Definitions
************************************************************************************/
/* Configuration *******************************************************************/
/* Wathdog hardware should be enabled */
#if !defined(CONFIG_STM32_WWDG) && !defined(CONFIG_STM32_IWDG)
# warning "One of CONFIG_STM32_WWDG or CONFIG_STM32_IWDG must be defined"
#endif
/* Select the path to the registered watchdog timer device */
#ifndef CONFIG_STM32_WDG_DEVPATH
# ifdef CONFIG_EXAMPLES_WATCHDOG_DEVPATH
# define CONFIG_STM32_WDG_DEVPATH CONFIG_EXAMPLES_WATCHDOG_DEVPATH
# else
# define CONFIG_STM32_WDG_DEVPATH "/dev/watchdog0"
# endif
#endif
/* Use the un-calibrated LSI frequency if we have nothing better */
#if defined(CONFIG_STM32_IWDG) && !defined(CONFIG_STM32_LSIFREQ)
# define CONFIG_STM32_LSIFREQ STM32_LSI_FREQUENCY
#endif
/* Debug ***************************************************************************/
/* Non-standard debug that may be enabled just for testing the watchdog timer */
#ifndef CONFIG_DEBUG
# undef CONFIG_DEBUG_WATCHDOG
#endif
#ifdef CONFIG_DEBUG_WATCHDOG
# define wdgdbg dbg
# define wdglldbg lldbg
# ifdef CONFIG_DEBUG_VERBOSE
# define wdgvdbg vdbg
# define wdgllvdbg llvdbg
# else
# define wdgvdbg(x...)
# define wdgllvdbg(x...)
# endif
#else
# define wdgdbg(x...)
# define wdglldbg(x...)
# define wdgvdbg(x...)
# define wdgllvdbg(x...)
#endif
/************************************************************************************
* Private Functions
************************************************************************************/
/************************************************************************************
* Public Functions
************************************************************************************/
/****************************************************************************
* Name: up_wdginitialize()
*
* Description:
* Perform architecuture-specific initialization of the Watchdog hardware.
* This interface must be provided by all configurations using
* apps/examples/watchdog
*
****************************************************************************/
int up_wdginitialize(void)
{
/* Initialize tha register the watchdog timer device */
#if defined(CONFIG_STM32_WWDG)
stm32_wwdginitialize(CONFIG_STM32_WDG_DEVPATH);
return OK;
#elif defined(CONFIG_STM32_IWDG)
stm32_iwdginitialize(CONFIG_STM32_WDG_DEVPATH, CONFIG_STM32_LSIFREQ);
return OK;
#else
return -ENODEV;
#endif
}
#endif /* CONFIG_WATCHDOG */

11
nuttx/configs/cloudctrl/tools/olimex-arm-usb-ocd.cfg Normal file
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#
# Olimex ARM-USB-OCD
#
# http://www.olimex.com/dev/arm-usb-ocd.html
#
interface ft2232
ft2232_device_desc "Olimex OpenOCD JTAG"
ft2232_layout "olimex-jtag"
ft2232_vid_pid 0x15BA 0x0003

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nuttx/configs/cloudctrl/tools/oocd.sh Normal file
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#!/bin/sh
# Get command line parameters
USAGE="USAGE: $0 [-dh] <TOPDIR>"
ADVICE="Try '$0 -h' for more information"
unset DEBUG
while [ ! -z "$1" ]; do
case $1 in
-d )
set -x
DEBUG=-d3
;;
-h )
echo "$0 is a tool for generation of proper version files for the NuttX build"
echo ""
echo $USAGE
echo ""
echo "Where:"
echo " -d"
echo " Enable script debug"
echo " -h"
echo " show this help message and exit"
echo " Use the OpenOCD 0.4.0"
echo " <TOPDIR>"
echo " The full path to the top-level NuttX directory"
exit 0
;;
* )
break;
;;
esac
shift
done
TOPDIR=$1
if [ -z "${TOPDIR}" ]; then
echo "Missing argument"
echo $USAGE
echo $ADVICE
exit 1
fi
# This script *probably* only works with the following versions of OpenOCD:
# Local search directory and configurations
OPENOCD_SEARCHDIR="${TOPDIR}/configs/shenzhou/tools"
OPENOCD_WSEARCHDIR="`cygpath -w ${OPENOCD_SEARCHDIR}`"
OPENOCD_PATH="/cygdrive/c/Program Files (x86)/OpenOCD/0.4.0/bin"
OPENOCD_EXE=openocd.exe
OPENOCD_INTERFACE="olimex-arm-usb-ocd.cfg"
OPENOCD_TARGET="stm32.cfg"
OPENOCD_ARGS="${DEBUG} -s ${OPENOCD_WSEARCHDIR} -f ${OPENOCD_INTERFACE} -f ${OPENOCD_TARGET}"
echo "Trying OpenOCD 0.4.0 path: ${OPENOCD_PATH}/${OPENOCD_EXE}"
# Verify that everything is what it claims it is and is located where it claims it is.
if [ ! -x "${OPENOCD_PATH}/${OPENOCD_EXE}" ]; then
echo "OpenOCD executable does not exist: ${OPENOCD_PATH}/${OPENOCD_EXE}"
exit 1
fi
if [ ! -f "${OPENOCD_SEARCHDIR}/${OPENOCD_TARGET}" ]; then
echo "OpenOCD target config file does not exist: ${OPENOCD_SEARCHDIR}/${OPENOCD_TARGET}"
exit 1
fi
if [ ! -f "${OPENOCD_SEARCHDIR}/${OPENOCD_INTERFACE}" ]; then
echo "OpenOCD interface config file does not exist: ${OPENOCD_SEARCHDIR}/${OPENOCD_INTERFACE}"
exit 1
fi
# Enable debug if so requested
if [ "X$2" = "X-d" ]; then
OPENOCD_ARGS=$OPENOCD_ARGS" -d3"
set -x
fi
# Okay... do it!
echo "Starting OpenOCD"
"${OPENOCD_PATH}/${OPENOCD_EXE}" ${OPENOCD_ARGS} &
echo "OpenOCD daemon started"
ps -ef | grep openocd
echo "In GDB: target remote localhost:3333"

69
nuttx/configs/cloudctrl/tools/stm32.cfg Normal file
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@ -0,0 +1,69 @@
# script for stm32
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
set _CHIPNAME stm32
}
if { [info exists ENDIAN] } {
set _ENDIAN $ENDIAN
} else {
set _ENDIAN little
}
# Work-area is a space in RAM used for flash programming
# By default use 16kB
if { [info exists WORKAREASIZE] } {
set _WORKAREASIZE $WORKAREASIZE
} else {
set _WORKAREASIZE 0x4000
}
# JTAG speed should be <= F_CPU/6. F_CPU after reset is 8MHz, so use F_JTAG = 1MHz
jtag_khz 1000
jtag_nsrst_delay 100
jtag_ntrst_delay 100
#jtag scan chain
if { [info exists CPUTAPID ] } {
set _CPUTAPID $CPUTAPID
} else {
# See STM Document RM0008
# Section 26.6.3
set _CPUTAPID 0x3ba00477
}
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
if { [info exists BSTAPID ] } {
# FIXME this never gets used to override defaults...
set _BSTAPID $BSTAPID
} else {
# See STM Document RM0008
# Section 29.6.2
# Low density devices, Rev A
set _BSTAPID1 0x06412041
# Medium density devices, Rev A
set _BSTAPID2 0x06410041
# Medium density devices, Rev B and Rev Z
set _BSTAPID3 0x16410041
# High density devices, Rev A
set _BSTAPID4 0x06414041
# Connectivity line devices, Rev A and Rev Z
set _BSTAPID5 0x06418041
}
jtag newtap $_CHIPNAME bs -irlen 5 -expected-id $_BSTAPID1 \
-expected-id $_BSTAPID2 -expected-id $_BSTAPID3 \
-expected-id $_BSTAPID4 -expected-id $_BSTAPID5
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME cortex_m3 -endian $_ENDIAN -chain-position $_TARGETNAME
$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME stm32x 0 0 0 0 $_TARGETNAME
# For more information about the configuration files, take a look at:
# openocd.texi

25
nuttx/configs/cloudctrl/tools/usb-driver.txt Normal file
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@ -0,0 +1,25 @@
https://www.olimex.com/dev/pdf/ARM/JTAG/Repair%20Procedure%20for%20OpenOcd-Rev.%20G%20drivers.pdf
Repair procedure for ARM-USB-OCD drivers
1. Uninstalling ARM-USB-OCD drivers
-------------------------------------
1.1. Connect your programmer/debugger to your computer, open Device Manager
and uninstall the drivers for ARM-USB-OCD.
1.2. After you have uninstalled ARM-USB-TINY driver from Device Manager,
disconnect the programmer from your computer.
1.3. Now you should download FTClean.exe from here:
http://www.ftdichip.com/Support/Utilities/FTClean.zip.
1.4. After download is complete extract the "*.zip" file, open folder FTClean,
and run FTClean.exe
1.5. Ror VID (Hex) select "Other". And after that fill the first box with 15ba
and "PID (Hex)" with 0004.
1.6. Press "Clean System" button. Make sure that all FTDI devices are
disconnected. (My require administrator privileges).
2. Re-installing the ARM-USB-OCD driver
---------------------------------------
2.1 Connect the programmer/debugger to the computer.
2.2 When prompted, browse to the C:\gccfd\DRIVERS\ARM-USB-OCD-DRIVER
directory and install. (A different driver is required for OpenOCD
0.4.0. That driver is available from the olimex.com web site).

24
nuttx/tools/README.txt
View File

@ -403,6 +403,30 @@ unlink.sh
script so that it uses the NTFS mklink command. But I have never
tried that
prebuild.py
-----------
This is a Python script contributed by Darcy Gong that automates many
build actions:
Nuttx configure utils v 0.3
usage: tools/prebuild.py [-abcdfhmr] [-b boardname] [-l number]\n'%(program_name)
-c, --clean : Will execute "make clean" command.
-d, --distclean : Will execute "make distclean" command.
-l, --cleanlevel : Will execute "make clean"(value of 1) or "make distclean"(value of 2) command.
-f, --fixcfg : The configuration correction nuttx.cfg defconfig configuration items.
-a, --auto : Equivalent parameters -d and -f.
-b, --boardname : The boardname configuration.
-r, --mkromfs : Make Romfs.
-m, --make : Make now.
-h, --help : Help Message.
example:'
usage 1 : tools/prebuild.py -b fire-stm32v2/nsh
usage 2 : tools/prebuild.py -f -b fire-stm32v2/nsh
usage 3 : tools/prebuild.py -a -b fire-stm32v2/nsh
usage 4 : tools/prebuild.py -l 1 -f -b fire-stm32v2/nsh
mkimage.sh
----------

256
nuttx/tools/prebuild.py Normal file
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@ -0,0 +1,256 @@
#!/usr/bin/python
import os
import sys,getopt
import commands
import ConfigParser
import socket
import fcntl
import struct
import re
class Enum(object):
def __init__(self, *keys):
self.__dict__.update(zip(keys, range(len(keys))))
enum_parse_tag = Enum('tag','item')
enum_config = Enum('std','ext')
def put_file_contents(filename,data=''):
if not os.path.isfile(filename):
return ''
try:
f = open(filename,'w')
contents = f.write(data)
f.close()
except IOError:
print 'file open or write err!'
def fix_nuttx_cfg_value(key,val):
#if key == "CONFIG_NSH_IPADDR":
if re.search(r"_IPADDR$", key):
return '%s=%s\n'%(key,get_local_ip(50,2))
#elif key == "CONFIG_NSH_DRIPADDR":
elif re.search(r"_DRIPADDR$", key):
return '%s=%s\n'%(key,get_local_ip(1,2))
else:
return '%s=%s\n'%(key,val)
def fix_nuttx_config(cfg,fix_cfgs):
result = ''
for line in cfg.readlines():
line = line.strip()
if line.startswith('#'):
result += line+'\n'
continue
elif len(line) == 0:
result += '\n'
continue
elif line.count('=') > 0 :
#print line
it = line.find('=')
key = line[0:it].strip()
val = line[it + 1:].strip()
if fix_cfgs.has_key(key):
result += fix_nuttx_cfg_value(key, fix_cfgs.pop(key))
else:
result += line+'\n'
else:
result += line+'\n'
#fix_cfgs = {}
#print fix_cfgs.viewitems()
if (len(fix_cfgs.keys())>0):
result += '\n\n####################################################\n\n'
for key in fix_cfgs.keys():
result += fix_nuttx_cfg_value(key, fix_cfgs.pop(key))
return result
def usage():
program_name = sys.argv[0]
print 'Nuttx configure utils v 0.3\n'
print ' usage: %s [-abcdfhmr] [-b boardname] [-l number]\n'%(program_name)
print ' -c, --clean : Will execute "make clean" command.'
print ' -d, --distclean : Will execute "make distclean" command.'
print ' -l, --cleanlevel : Will execute "make clean"(value of 1) or "make distclean"(value of 2) command.'
print ' -f, --fixcfg : The configuration correction nuttx.cfg defconfig configuration items.'
print ' -a, --auto : Equivalent parameters -d and -f.'
print ' -b, --boardname : The boardname configuration.'
print ' -r, --mkromfs : Make Romfs.'
print ' -m, --make : Make now.'
print ' -h, --help : Help Message.'
print '\n example:'
print ' usage 1 : %s -b fire-stm32v2/nsh'%(program_name)
print ' usage 2 : %s -f -b fire-stm32v2/nsh'%(program_name)
print ' usage 3 : %s -a -b fire-stm32v2/nsh'%(program_name)
print ' usage 4 : %s -l 1 -f -b fire-stm32v2/nsh'%(program_name)
def fix_config(boardname,fix_cfgs):
cfg_path = './configs/%s/defconfig'%boardname
if (os.path.isfile(cfg_path)):
try:
cfg = open(cfg_path, "r")
contents = fix_nuttx_config(cfg,fix_cfgs)
cfg.close()
#print contents
put_file_contents(cfg_path,contents)
except IOError:
print 'nuttx config open err!'
return ''
def fix_root_config(fix_cfgs):
cfg_path = '.config'
if (os.path.isfile(cfg_path)):
try:
cfg = open(cfg_path, "r")
contents = fix_nuttx_config(cfg,fix_cfgs)
cfg.close()
#print contents
put_file_contents(cfg_path,contents)
except IOError:
print 'nuttx config open err!'
return ''
def get_local_ipn(ifname):
s = socket.socket(socket.AF_INET, socket.SOCK_DGRAM)
ip = fcntl.ioctl(s.fileno(),
0x8915, # SIOCGIFADDR
struct.pack('256s', ifname[:15]))[20:24]
return ip
def get_local_ip(id=-1,mode=1):
ip = get_local_ipn('eth0')
if (id < 0):
id = ord(ip[3])
ipr = ord(ip[0])<<24|ord(ip[1])<<16|ord(ip[2])<<8|(id & 0xFF)
if mode == 1 :
return socket.inet_ntoa(struct.pack('>L', ipr))
if mode == 2 :
return "0x%x"%ipr
else:
return ipr
def get_ip_address(ifname):
s = socket.socket(socket.AF_INET, socket.SOCK_DGRAM)
return socket.inet_ntoa(fcntl.ioctl(
s.fileno(),
0x8915, # SIOCGIFADDR
struct.pack('256s', ifname[:15])
)[20:24])
def config(cfg={}):
output = ''
fix_cfgs = {}
if cfg.clearlevel == 2:
print "make distclean apps_distclean"
output = commands.getoutput("make distclean apps_distclean")
elif cfg.clearlevel == 1:
print "make clean apps_clean"
output = commands.getoutput("make clean apps_clean")
ini = ConfigParser.ConfigParser()
ini.optionxform = str
cfgf = 'nuttx_cfg.py'
#if not(os.path.isfile(cfgf)):
#fp = open(cfgf,'w')
#fp.write('# is nuttx config\n[info]\nlast=')
#fp.close()
#cfgf = open(cfgf,'rw')
ini.readfp(open(cfgf))
lastfile = ini.get('info','last')
if (cmp(lastfile,cfg.boardname) != 0):
if ((cfg.boardname.strip() !='')):
lastfile = cfg.boardname
ini.set('info','last',lastfile)
ini.write(open(cfgf, "w"))
if cfg.usefix:
#print lastfile
if ini.has_section('defconfig'):
opts = ini.items('defconfig')
for item in opts:
fix_cfgs[item[0]] = item[1]
if ini.has_section(lastfile):
opts = ini.items(lastfile)
for item in opts:
fix_cfgs[item[0]] = item[1]
#print fix_cfgs
#fix_config(boardname,fix_cfgs)
output = commands.getoutput("cd tools;./configure.sh %s;cd .."%lastfile)
print "tools/configure.sh %s"%lastfile
if cfg.usefix:
fix_root_config(fix_cfgs)
print "fix .config file"
if cfg.mkromfs:
if (os.path.isfile("./rcS.template")):
print "tools/mkromfsimg.sh ."
#output = commands.getoutput("tools/mkromfs.sh .")
os.system("tools/mkromfsimg.sh .")
bpath = "configs/%s/include"%(lastfile.split('/')[0])
if (not os.path.exists(bpath)):
print "mkdir -p %s"%(bpath)
#commands.getoutput("mkdir -pv %s"%(bpath))
os.system("mkdir -pv %s"%(bpath))
if (not os.path.exists(bpath)):
print "[ERROR] no %s"%(bpath)
if (os.path.isfile("nsh_romfsimg.h")):
print "cp nsh_romfsimg.h %s/nsh_romfsimg.h"%(bpath)
#output = commands.getoutput("cp nsh_romfsimg.h include/arch/board/nsh_romfsimg.h")
os.system("cp nsh_romfsimg.h %s/nsh_romfsimg.h"%(bpath))
if cfg.make:
os.system("sleep 3")
print "make"
os.system("make")
if '' != output.strip():
print output
class cfgobj():
usefix = False
mkromfs = False
make = False
clearlevel = 0
boardname = ''
def main():
try:
opts, args = getopt.getopt(sys.argv[1:], "dcb:hal:frm",
["dictclean","clean","board=", "auto", "cleanlevel=",
"help","fixcfg","mkromfs","make"])
except getopt.GetoptError:
# print help information and exit:
usage()
sys.exit(2)
#cfg = {"usefix":False,"mkromfs":False,"make":False,"clearlevel":0,"boardname":'' }
cfg = cfgobj()
for o, v in opts:
if o in ("-a","--auto"):
cfg.clearlevel = 2
cfg.usefix = True
cfg.mkromfs = True
cfg.make = True
if o in ("-c","--clean"):
cfg.clearlevel = 1
if o in ("-d","--distclean"):
cfg.clearlevel = 2
if o in ("-l","--cleanlevel"):
if v == '1':
cfg.clearlevel = 1
elif v == '2':
cfg.clearlevel = 2
else:
cfg.clearlevel = 0
if o in ("-b","--board"):
cfg.boardname = v
if o in ("-f","--fixcfg"):
cfg.usefix = True
if o in ("-r","--mkromfs"):
cfg.mkromfs = True
if o in ("-m","--make"):
cfg.make = True
if o in ("-h", "--help"):
usage()
sys.exit()
config(cfg)
if __name__ == "__main__":
main()