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Add source files for z180 

git-svn-id: http://svn.code.sf.net/p/nuttx/code/trunk@5426 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo 2012-12-10 18:40:01 +00:00
parent 2b1f75ced6
commit 5f72f975b3
32 changed files with 2698 additions and 174 deletions
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2
nuttx/ChangeLog
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@ -3775,4 +3775,6 @@
Kconfig file. Moved to drivers/serial/Kconfig replacing CONFIG_LOWLEVEL_CONSOLE.
* arch/z80/include/z180: Add header files for z180 chips. Initial versions
are just clones of z80 header files.
* arch/z80/src/z180: Add source files for z180 chips. Initial versions
are just clones of z80 source files.

6
nuttx/Documentation/README.html
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@ -46,8 +46,10 @@
| | | `- src/
| | | `-<a href="http://svn.code.sf.net/p/nuttx/code/trunk/nuttx/arch/x86/src/README.txt">README.txt</a>
| | |- z80/
| | | `- src/
| | | `- <a href="http://svn.code.sf.net/p/nuttx/code/trunk/nuttx/arch/z80/src/z80/README.txt">z80/README.txt</a>
| | | |- src/z80
| | | | `- <a href="http://svn.code.sf.net/p/nuttx/code/trunk/nuttx/arch/z80/src/z80/README.txt">README.txt</a>
| | | `- src/z180
| | | `- <a href="http://svn.code.sf.net/p/nuttx/code/trunk/nuttx/arch/z80/src/z180/README.txt">README.txt</a>
| | `- <a href="http://svn.code.sf.net/p/nuttx/code/trunk/nuttx/arch/README.txt"><b><i>README.txt</i></b></a>
| |- configs/
| | |- amber/

3
nuttx/README.txt
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@ -749,7 +749,8 @@ nuttx
| | `-README.txt
| `- z80/
| | `- src/
| | `- z80/README.txt
| | |- z80/README.txt
| | `- z180/README.txt
| `- README.txt
|- configs/
| |- amber/

318
nuttx/arch/z80/Kconfig
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@ -13,6 +13,324 @@ config ARCH_CHIP_Z80
---help---
Classic ZiLOG z80 chip
config ARCH_CHIP_Z8018006VSG
bool "Z8018006VSG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z80180
---help---
Z180: 68-pin PLCC Z80180
config ARCH_CHIP_Z8018010VSG
bool "Z8018010VSG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z80180
---help---
Z180: 68-pin PLCC Z80180
config ARCH_CHIP_Z8018008VSG
bool "Z8018008VSG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z80180
---help---
Z180: 68-pin PLCC Z80180
config ARCH_CHIP_Z8018010FSG
bool "Z8018010FSG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z80180
---help---
Z180: 80-pin QFP (11 pins N/C) Z80180
config ARCH_CHIP_Z8018008VEG
bool "Z8018008VEG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z80180
---help---
Z180: 68-pin PLCC Z80180
config ARCH_CHIP_Z8018006VEG
bool "Z8018006VEG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z80180
---help---
Z180: 68-pin PLCC Z80180
config ARCH_CHIP_Z8018006PSG
bool "Z8018006PSG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z80180
---help---
Z180: 64-pin DIP 6 MHz 5V Z80180
config ARCH_CHIP_Z8018008FSG
bool "Z8018008FSG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z80180
---help---
Z180: 80-pin QFP (11 pins N/C) 8MHz 5V Z80180
config ARCH_CHIP_Z8018010PSG
bool "Z8018010PSG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z80180
---help---
Z180: 64-pin DIP 10MHz 5V Z80180
config ARCH_CHIP_Z8018006PEG
bool "Z8018006PEG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z80180
---help---
Z180: 64-pin DIP 6MHz 5V Z80180
config ARCH_CHIP_Z8018010VEG
bool "Z8018010VEG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z80180
---help---
68-pin PLCC 10MHz 5V Z80180
config ARCH_CHIP_Z8018010PEG
bool "Z8018010PEG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z80180
---help---
Z180: 64-pin DIP 10MHz 5V Z80180
config ARCH_CHIP_Z8018008PSG
bool "Z8018008PSG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z80180
---help---
Z180: 64-pin DIP 8MHz 5V Z80180
config ARCH_CHIP_Z8018006FSG
bool "Z8018006FSG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z80180
---help---
80-pin QFP (11 pins N/C) 6MHz 5V Z80180
config ARCH_CHIP_Z8018000XSO
bool "Z8018000XSO"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z80180
config ARCH_CHIP_Z8018010FEG
bool "Z8018010FEG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z80180
config ARCH_CHIP_Z8018000WSO
bool "Z8018000WSO"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z80180
config ARCH_CHIP_Z8018008PEG
bool "Z8018008PEG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z80180
config ARCH_CHIP_Z8018110FEG
bool "Z8018110FEG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z80181
---help---
Z180: 100-pin QFP Z80181
config ARCH_CHIP_Z8018233FSG
bool "Z8018233FSG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z80182
---help---
100-pin QFP Z80182
config ARCH_CHIP_Z8018220AEG
bool "Z8018220AEG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z80182
---help---
Z180: 100-pin LQFP 20MHz 5V Z80182
config ARCH_CHIP_Z8018216FSG
bool "Z8018216FSG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z80182
---help---
Z180: 100-pin QFP 16MHz 5V Z80182
config ARCH_CHIP_Z8018216ASG
bool "Z8018216ASG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z80182
---help---
Z180: 100-pin LQFP Z80182
config ARCH_CHIP_Z8018233ASG
bool "Z8018233ASG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z80182
---help---
Z180: 100-pin LQFP 33MHz 5V Z80182
config ARCH_CHIP_Z8019520FSG
bool "Z8019520FSG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z80195
---help---
Z180: 100-pin QFP 20MHz 5V Z80195
config ARCH_CHIP_Z8019533FSG
bool "Z8019533FSG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z80195
---help---
Z180: 100-pin QFP 33MHz 5V Z80195
config ARCH_CHIP_Z8L18020VSG
bool "Z8L18020VSG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z8L180
---help---
Z180: 68-pinn PLCC Z8L180
config ARCH_CHIP_Z8L18020FSG
bool "Z8L18020FSG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z8L180
---help---
Z180: 80-pin GFP 20MHz 3.3V Z8L180
config ARCH_CHIP_Z8L18020PSG
bool "Z8L18020PSG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z8L180
config ARCH_CHIP_Z8L18220ASG
bool "Z8L18220ASG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z8L182
---help---
Z180: 100-pin LQFP Z8L182
config ARCH_CHIP_Z8L18220FSG
bool "Z8L18220FSG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z8L182
---help---
100-pin QFP 20MHz 3.3V Z8L182
config ARCH_CHIP_Z8L18220AEG
bool "Z8L18220AEG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z8L182
config ARCH_CHIP_Z8S18020VSG
bool "Z8S18020VSG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z8S180
---help---
Z180: 68-pin PLCC Z8S180
config ARCH_CHIP_Z8S18020VSG1960
bool "Z8S18020VSG1960"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z8S180
---help---
Z180: 68-pin PLCC Z8S180
config ARCH_CHIP_Z8S18033VSG
bool "Z8S18033VSG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z8S180
---help---
Z180: 68-pin PLCC Z8S180
config ARCH_CHIP_Z8S18010FSG
bool "Z8S18010FSG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z8S180
---help---
80-pin QFP Z8S180
config ARCH_CHIP_Z8S18010VEG
bool "Z8S18010VEG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z8S180
---help---
Z180: 68-pin PLCC Z8S180
config ARCH_CHIP_Z8S18020VEG
bool "Z8S18020VEG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z8S180
---help---
Z180: 68-pin PLCC Z8S180
config ARCH_CHIP_Z8S18010VSG
bool "Z8S18010VSG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z8S180
---help---
Z180: 68-pin PLCC Z8S180
config ARCH_CHIP_Z8S18020PSG
bool "Z8S18020PSG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z8S180
---help---
64-pin DIP 10Mhz 5V Z8S180
config ARCH_CHIP_Z8S18033FSG
bool "Z8S18033FSG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z8S180
---help---
Z180: 80-pin QFP 33MHz 5V Z8S180
config ARCH_CHIP_Z8S18033FEG
bool "Z8S18033FEG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z8S180
---help---
Z180: 80-pin QFP 33MHz 5V Z8S180
config ARCH_CHIP_Z8S18020FSG
bool "Z8S18020FSG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z8S180
---help---
80-pin QFP 20MHz 5V Z8S180
config ARCH_CHIP_Z8S18033VEG
bool "Z8S18033VEG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z8S180
---help---
Z180: 68-pin PLCC 33MHz 5V Z8S180
config ARCH_CHIP_Z8S18010PSG
bool "Z8S18010PSG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z8S180
---help---
64-pin DIP 10MHz 5V Z8S180
config ARCH_CHIP_Z8S18020FEG
bool "Z8S18020FEG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z8S180
config ARCH_CHIP_Z8S18010PEG
bool "Z8S18010PEG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z8S180
config ARCH_CHIP_Z8S18010FEG
bool "Z8S18010FEG"
select ARCH_CHIP_Z180
select ARCH_CHIP_Z8S180
config ARCH_CHIP_Z8F6403
bool "Z8F6403"
select ARCH_CHIP_Z8

24
nuttx/arch/z80/include/arch.h
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@ -33,12 +33,12 @@
*
****************************************************************************/
/* This file should never be included directed but, rather,
* only indirectly through nuttx/arch.h
/* This file should never be included directed but, rather, only indirectly
* through nuttx/arch.h
*/
#ifndef __ARCH_ARCH_H
#define __ARCH_ARCH_H
#ifndef __ARCH_Z80_INCLUDE_ARCH_H
#define __ARCH_Z80_INCLUDE_ARCH_H
/****************************************************************************
* Included Files
@ -47,7 +47,7 @@
#include <arch/chip/arch.h>
/****************************************************************************
* Definitions
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
@ -66,17 +66,5 @@
* Public Function Prototypes
****************************************************************************/
#ifdef __cplusplus
#define EXTERN extern "C"
extern "C" {
#else
#define EXTERN extern
#endif
#undef EXTERN
#ifdef __cplusplus
}
#endif
#endif /* __ARCH_ARCH_H */
#endif /* __ARCH_Z80_INCLUDE_ARCH_H */

22
nuttx/arch/z80/include/io.h
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@ -34,8 +34,8 @@
*
****************************************************************************/
#ifndef __ARCH_IO_H
#define __ARCH_IO_H
#ifndef __ARCH_Z80_INCLUDE_IO_H
#define __ARCH_Z80_INCLUDE_IO_H
/****************************************************************************
* Included Files
@ -44,7 +44,7 @@
#include <arch/chip/io.h>
/****************************************************************************
* Definitions
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
@ -59,18 +59,4 @@
* Public Function Prototypes
****************************************************************************/
#ifndef __ASSEMBLY__
#ifdef __cplusplus
#define EXTERN extern "C"
extern "C" {
#else
#define EXTERN extern
#endif
#undef EXTERN
#ifdef __cplusplus
}
#endif
#endif
#endif /* __ARCH_IO_H */
#endif /* __ARCH_Z80_INCLUDE_IO_H */

16
nuttx/arch/z80/include/irq.h
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@ -48,7 +48,7 @@
#include <arch/chip/irq.h>
/****************************************************************************
* Definitions
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
@ -63,19 +63,5 @@
* Public Function Prototypes
****************************************************************************/
#ifndef __ASSEMBLY__
#ifdef __cplusplus
#define EXTERN extern "C"
extern "C" {
#else
#define EXTERN extern
#endif
#undef EXTERN
#ifdef __cplusplus
}
#endif
#endif
#endif /* __ARCH_Z80_INCLUDE_IRQ_H */

10
nuttx/arch/z80/include/limits.h
View File

@ -33,17 +33,17 @@
*
****************************************************************************/
#ifndef __ARCH_LIMITS_H
#define __ARCH_LIMITS_H
#ifndef __ARCH_Z80_INCLUDE_LIMITS_H
#define __ARCH_Z80_INCLUDE_LIMITS_H
/****************************************************************************
* Included Files
* Pre-processor Definitions
****************************************************************************/
#include <arch/chip/limits.h>
/****************************************************************************
* Definitions
* Pre-processor Definitions
****************************************************************************/
#endif /* __ARCH_LIMITS_H */
#endif /* __ARCH_Z80_INCLUDE_LIMITS_H */

8
nuttx/arch/z80/include/serial.h
View File

@ -33,8 +33,8 @@
*
****************************************************************************/
#ifndef __ARCH_Z80_INCLUDE_SERIAL_TYPES_H
#define __ARCH_Z80_INCLUDE_SERIAL_TYPES_H
#ifndef __ARCH_Z80_INCLUDE_SERIAL_H
#define __ARCH_Z80_INCLUDE_SERIAL_H
/****************************************************************************
* Included Files
@ -43,7 +43,7 @@
#include <nuttx/fs/ioctl.h>
/****************************************************************************
* Definitions
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
@ -54,4 +54,4 @@
* Public Functions
****************************************************************************/
#endif /* __ARCH_Z80_INCLUDE_SERIAL_TYPES_H */
#endif /* __ARCH_Z80_INCLUDE_SERIAL_H */

16
nuttx/arch/z80/include/syscall.h
View File

@ -45,7 +45,7 @@
****************************************************************************/
/****************************************************************************
* Definitions
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
@ -64,19 +64,5 @@
* Public Function Prototypes
****************************************************************************/
#ifndef __ASSEMBLY__
#ifdef __cplusplus
#define EXTERN extern "C"
extern "C" {
#else
#define EXTERN extern
#endif
#undef EXTERN
#ifdef __cplusplus
}
#endif
#endif
#endif /* __ARCH_Z80_INCLUDE_SYSCALL_H */

6
nuttx/arch/z80/include/types.h
View File

@ -37,8 +37,8 @@
* through sys/types.h
*/
#ifndef __ARCH_TYPES_H
#define __ARCH_TYPES_H
#ifndef __ARCH_Z80_INCLUDE_TYPES_H
#define __ARCH_Z80_INCLUDE_TYPES_H
/****************************************************************************
* Included Files
@ -58,4 +58,4 @@
* Global Function Prototypes
****************************************************************************/
#endif /* __ARCH_TYPES_H */
#endif /* __ARCH_Z80_INCLUDE_TYPES_H */

122
nuttx/arch/z80/include/z180/chip.h
View File

@ -41,10 +41,36 @@
* Included Files
****************************************************************************/
#ifndef __ASSEMBLY__
# include <stdint.h>
#endif
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Bits in the Z80 FLAGS register ***************************************************/
#define Z180_C_FLAG 0x01 /* Bit 0: Carry flag */
#define Z180_N_FLAG 0x02 /* Bit 1: Add/Subtract flag */
#define Z180_PV_FLAG 0x04 /* Bit 2: Parity/Overflow flag */
#define Z180_H_FLAG 0x10 /* Bit 4: Half carry flag */
#define Z180_Z_FLAG 0x40 /* Bit 5: Zero flag */
#define Z180_S_FLAG 0x80 /* Bit 7: Sign flag */
/* Register access macros ***********************************************************/
#ifndef __ASSEMBLY__
# define getreg8(a) (*(volatile uint8_t *)(a))
# define putreg8(v,a) (*(volatile uint8_t *)(a) = (v))
# define getreg16(a) (*(volatile uint16_t *)(a))
# define putreg16(v,a) (*(volatile uint16_t *)(a) = (v))
# define getreg32(a) (*(volatile uint32_t *)(a))
# define putreg32(v,a) (*(volatile uint32_t *)(a) = (v))
#endif
/* Z800180
*
* The 8-bit Z80180 MPU provides the benefits of reduced system costs and
@ -71,12 +97,12 @@
* * Enhanced on the Z8S180 and Z8L180 MPUs
*/
#if defined(CONFIG_Z180_CHIP_Z8018006VSG) || /* 68-pin PLCC */ \
defined(CONFIG_Z180_CHIP_Z8018010VSG) || /* 68-pin PLCC */ \
defined(CONFIG_Z180_CHIP_Z8018008VSG) || /* 68-pin PLCC */ \
defined(CONFIG_Z180_CHIP_Z8018010FSG) || /* 80-pin QFP (11 pins N/C) */ \
defined(CONFIG_Z180_CHIP_Z8018008VEG) || /* 68-pin PLCC */ \
defined(CONFIG_Z180_CHIP_Z8018006VEG) /* 68-pin PLCC */
#if defined(CONFIG_ARCH_CHIP_Z8018006VSG) || /* 68-pin PLCC */ \
defined(CONFIG_ARCH_CHIP_Z8018010VSG) || /* 68-pin PLCC */ \
defined(CONFIG_ARCH_CHIP_Z8018008VSG) || /* 68-pin PLCC */ \
defined(CONFIG_ARCH_CHIP_Z8018010FSG) || /* 80-pin QFP (11 pins N/C) */ \
defined(CONFIG_ARCH_CHIP_Z8018008VEG) || /* 68-pin PLCC */ \
defined(CONFIG_ARCH_CHIP_Z8018006VEG) /* 68-pin PLCC */
# undef HAVE_Z8S180 /* Not Z8S180 (5V) or Z8L180 (3.3V) core */
# define HAVE ROM 0 /* No on-chip ROM */
@ -93,14 +119,14 @@
# define HAVE_NPAR8 0 /* No 8-bit parallel ports */
# undef HAVE_IEEE1284 /* No bidirectional centronics interface (IEEE 1284) */
#elif defined(CONFIG_Z180_CHIP_Z8018006PSG) || /* 64-pin DIP 6 MHz 5V */ \
defined(CONFIG_Z180_CHIP_Z8018008FSG) || /* 80-pin QFP (11 pins N/C) 8MHz 5V */ \
defined(CONFIG_Z180_CHIP_Z8018010PSG) || /* 64-pin DIP 10MHz 5V */ \
defined(CONFIG_Z180_CHIP_Z8018006PEG) || /* 64-pin DIP 6MHz 5V */ \
defined(CONFIG_Z180_CHIP_Z8018010VEG) || /* 68-pin PLCC 10MHz 5V*/ \
defined(CONFIG_Z180_CHIP_Z8018010PEG) || /* 64-pin DIP 10MHz 5V*/ \
defined(CONFIG_Z180_CHIP_Z8018008PSG) || /* 64-pin DIP 8MHz 5V */ \
defined(CONFIG_Z180_CHIP_Z8018006FSG) /* 80-pin QFP (11 pins N/C) 6MHz 5V */
#elif defined(CONFIG_ARCH_CHIP_Z8018006PSG) || /* 64-pin DIP 6 MHz 5V */ \
defined(CONFIG_ARCH_CHIP_Z8018008FSG) || /* 80-pin QFP (11 pins N/C) 8MHz 5V */ \
defined(CONFIG_ARCH_CHIP_Z8018010PSG) || /* 64-pin DIP 10MHz 5V */ \
defined(CONFIG_ARCH_CHIP_Z8018006PEG) || /* 64-pin DIP 6MHz 5V */ \
defined(CONFIG_ARCH_CHIP_Z8018010VEG) || /* 68-pin PLCC 10MHz 5V */ \
defined(CONFIG_ARCH_CHIP_Z8018010PEG) || /* 64-pin DIP 10MHz 5V */ \
defined(CONFIG_ARCH_CHIP_Z8018008PSG) || /* 64-pin DIP 8MHz 5V */ \
defined(CONFIG_ARCH_CHIP_Z8018006FSG) /* 80-pin QFP (11 pins N/C) 6MHz 5V */
# undef HAVE_Z8S180 /* Not Z8S180 (5V) or Z8L180 (3.3V) core */
# define HAVE ROM 0 /* No on-chip ROM */
@ -117,10 +143,10 @@
# define HAVE_NPAR8 0 /* No 8-bit parallel ports */
# undef HAVE_IEEE1284 /* No bidirectional centronics interface (IEEE 1284) */
#elif defined(CONFIG_Z180_CHIP_Z8018000XSO)
defined(CONFIG_Z180_CHIP_Z8018010FEG)
defined(CONFIG_Z180_CHIP_Z8018000WSO)
defined(CONFIG_Z180_CHIP_Z8018008PEG)
#elif defined(CONFIG_ARCH_CHIP_Z8018000XSO)
defined(CONFIG_ARCH_CHIP_Z8018010FEG)
defined(CONFIG_ARCH_CHIP_Z8018000WSO)
defined(CONFIG_ARCH_CHIP_Z8018008PEG)
# undef HAVE_Z8S180 /* Not Z8S180 (5V) or Z8L180 (3.3V) core */
# define HAVE ROM 0 /* No on-chip ROM */
@ -158,7 +184,7 @@
* Emulation Mode
*/
#elif defined(CONFIG_Z180_CHIP_Z8018110FEG) /* 100 QFP */
#elif defined(CONFIG_ARCH_CHIP_Z8018110FEG) /* 100-pin QFP */
# undef HAVE_Z8S180 /* Not Z8S180 (5V) or Z8L180 (3.3V) core */
# define HAVE ROM 0 /* No on-chip ROM */
@ -199,11 +225,11 @@
* 3.3 V and 5 V Version
*/
#elif defined(CONFIG_Z180_CHIP_Z8018233FSG) || /* 100-pin QFP */ \
defined(CONFIG_Z180_CHIP_Z8018220AEG) || /* 100-pin LQFP 20MHz 5V */ \
defined(CONFIG_Z180_CHIP_Z8018216FSG) || /* 100-pin QFP 16MHz 5V */ \
defined(CONFIG_Z180_CHIP_Z8018216ASG) || /* 100-pin LQFP */ \
defined(CONFIG_Z180_CHIP_Z8018233ASG) /* 100-pin LQFP 33MHz 5V */
#elif defined(CONFIG_ARCH_CHIP_Z8018233FSG) || /* 100-pin QFP */ \
defined(CONFIG_ARCH_CHIP_Z8018220AEG) || /* 100-pin LQFP 20MHz 5V */ \
defined(CONFIG_ARCH_CHIP_Z8018216FSG) || /* 100-pin QFP 16MHz 5V */ \
defined(CONFIG_ARCH_CHIP_Z8018216ASG) || /* 100-pin LQFP */ \
defined(CONFIG_ARCH_CHIP_Z8018233ASG) /* 100-pin LQFP 33MHz 5V */
# undef HAVE_Z8S180 /* Not Z8S180 (5V) or Z8L180 (3.3V) core */
# define HAVE ROM 0 /* No on-chip ROM */
@ -244,8 +270,8 @@
* 7 or 24 Bits of I/O
*/
#elif defined(CONFIG_Z180_CHIP_Z8019520FSG) || /* 100-pin QFP 20MHz 5V */ \
defined(CONFIG_Z180_CHIP_Z8019533FSG) /* 100-pin QFP 33MHz 5V */
#elif defined(CONFIG_ARCH_CHIP_Z8019520FSG) || /* 100-pin QFP 20MHz 5V */ \
defined(CONFIG_ARCH_CHIP_Z8019533FSG) /* 100-pin QFP 33MHz 5V */
# undef HAVE_Z8S180 /* No Z8S180 (5V) or Z8L180 (3.3V) core */
# undef HAVE ROM 0 /* No 32KB on-chip ROM (z80185 only) */
@ -285,9 +311,9 @@
* * Enhanced on the Z8S180 and Z8L180 MPUs.
*/
#elif defined(CONFIG_Z180_CHIP_Z8L18020VSG) || /* 69-pin PLCC */ \
defined(CONFIG_Z180_CHIP_Z8L18020FSG) || /* 80-pin GFP 20MHz 3.3V */ \
defined(CONFIG_Z180_CHIP_Z8L18020PSG)
#elif defined(CONFIG_ARCH_CHIP_Z8L18020VSG) || /* 68-pinn PLCC */ \
defined(CONFIG_ARCH_CHIP_Z8L18020FSG) || /* 80-pin GFP 20MHz 3.3V */ \
defined(CONFIG_ARCH_CHIP_Z8L18020PSG)
# define HAVE_Z8S180 1 /* Uses Z8S180 (5V) or Z8L180 (3.3V) core */
# define HAVE ROM 0 /* No on-chip ROM */
@ -329,9 +355,9 @@
* 3.3 V and 5 V Version
*/
#elif defined(CONFIG_Z180_CHIP_Z8L18220ASG) || /* 100-pin LQFP */ \
defined(CONFIG_Z180_CHIP_Z8L18220FSG) || /* 100-pin QFP 20MHz 3.3V */ \
defined(CONFIG_Z180_CHIP_Z8L18220AEG)
#elif defined(CONFIG_ARCH_CHIP_Z8L18220ASG) || /* 100-pin LQFP */ \
defined(CONFIG_ARCH_CHIP_Z8L18220FSG) || /* 100-pin QFP 20MHz 3.3V */ \
defined(CONFIG_ARCH_CHIP_Z8L18220AEG)
# define HAVE_Z8S180 1 /* Uses Z8S180 (5V) or Z8L180 (3.3V) core */
# define HAVE ROM 0 /* No on-chip ROM */
@ -373,22 +399,22 @@
* Package - DIP, PLCC, QFP
*/
#elif defined(CONFIG_Z180_CHIP_Z8S18020VSG) || /* 68-pin PLCC */ \
defined(CONFIG_Z180_CHIP_Z8S18020VSG1960) || /* 68-pin PLCC */ \
defined(CONFIG_Z180_CHIP_Z8S18033VSG) || /* 68-pin PLCC */ \
defined(CONFIG_Z180_CHIP_Z8S18010FSG) || /* 80-pin QFP */ \
defined(CONFIG_Z180_CHIP_Z8S18010VEG) || /* 68-pin PLCC */ \
defined(CONFIG_Z180_CHIP_Z8S18020VEG) || /* 68-pin PLCC */ \
defined(CONFIG_Z180_CHIP_Z8S18010VSG) || /* 68-pin PLCC */ \
defined(CONFIG_Z180_CHIP_Z8S18020PSG) || /* 64-pin DIP 10Mhz 5V */ \
defined(CONFIG_Z180_CHIP_Z8S18033FSG) || /* 80-pin QFP 33MHz 5V */ \
defined(CONFIG_Z180_CHIP_Z8S18033FEG) || /* 80-pin QFP 33MHz 5V */ \
defined(CONFIG_Z180_CHIP_Z8S18020FSG) || /* 80-pin QFP 20MHz 5V */ \
defined(CONFIG_Z180_CHIP_Z8S18033VEG) || /* 68-pin PLCC 33MHz 5V */ \
defined(CONFIG_Z180_CHIP_Z8S18010PSG) || /* 64-pin DIP 10MHz 5V */ \
defined(CONFIG_Z180_CHIP_Z8S18020FEG) || \
defined(CONFIG_Z180_CHIP_Z8S18010PEG) || \
defined(CONFIG_Z180_CHIP_Z8S18010FEG
#elif defined(CONFIG_ARCH_CHIP_Z8S18020VSG) || /* 68-pin PLCC */ \
defined(CONFIG_ARCH_CHIP_Z8S18020VSG1960) || /* 68-pin PLCC */ \
defined(CONFIG_ARCH_CHIP_Z8S18033VSG) || /* 68-pin PLCC */ \
defined(CONFIG_ARCH_CHIP_Z8S18010FSG) || /* 80-pin QFP */ \
defined(CONFIG_ARCH_CHIP_Z8S18010VEG) || /* 68-pin PLCC */ \
defined(CONFIG_ARCH_CHIP_Z8S18020VEG) || /* 68-pin PLCC */ \
defined(CONFIG_ARCH_CHIP_Z8S18010VSG) || /* 68-pin PLCC */ \
defined(CONFIG_ARCH_CHIP_Z8S18020PSG) || /* 64-pin DIP 10Mhz 5V */ \
defined(CONFIG_ARCH_CHIP_Z8S18033FSG) || /* 80-pin QFP 33MHz 5V */ \
defined(CONFIG_ARCH_CHIP_Z8S18033FEG) || /* 80-pin QFP 33MHz 5V */ \
defined(CONFIG_ARCH_CHIP_Z8S18020FSG) || /* 80-pin QFP 20MHz 5V */ \
defined(CONFIG_ARCH_CHIP_Z8S18033VEG) || /* 68-pin PLCC 33MHz 5V */ \
defined(CONFIG_ARCH_CHIP_Z8S18010PSG) || /* 64-pin DIP 10MHz 5V */ \
defined(CONFIG_ARCH_CHIP_Z8S18020FEG) || \
defined(CONFIG_ARCH_CHIP_Z8S18010PEG) || \
defined(CONFIG_ARCH_CHIP_Z8S18010FEG
# define HAVE_Z8S180 1 /* Uses Z8S180 (5V) or Z8L180 (3.3V) core */
# define HAVE ROM 0 /* No on-chip ROM */

92
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@ -0,0 +1,92 @@
/************************************************************************************
* arch/z80/include/z80/chip.h
* arch/z80/include/chip/chip.h
*
* Copyright (C) 2007-2009 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
#ifndef __ARCH_Z80_SRC_Z80_CHIP_H
#define __ARCH_Z80_SRC_Z80_CHIP_H
/************************************************************************************
* Included Files
************************************************************************************/
#ifndef __ASSEMBLY__
# include <stdint.h>
#endif
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/* Bits in the Z80 FLAGS register ***************************************************/
#define Z80_C_FLAG 0x01 /* Bit 0: Carry flag */
#define Z80_N_FLAG 0x02 /* Bit 1: Add/Subtract flag */
#define Z80_PV_FLAG 0x04 /* Bit 2: Parity/Overflow flag */
#define Z80_H_FLAG 0x10 /* Bit 4: Half carry flag */
#define Z80_Z_FLAG 0x40 /* Bit 5: Zero flag */
#define Z80_S_FLAG 0x80 /* Bit 7: Sign flag */
/* Register access macros ***********************************************************/
#ifndef __ASSEMBLY__
# define getreg8(a) (*(volatile uint8_t *)(a))
# define putreg8(v,a) (*(volatile uint8_t *)(a) = (v))
# define getreg16(a) (*(volatile uint16_t *)(a))
# define putreg16(v,a) (*(volatile uint16_t *)(a) = (v))
# define getreg32(a) (*(volatile uint32_t *)(a))
# define putreg32(v,a) (*(volatile uint32_t *)(a) = (v))
#endif
/************************************************************************************
* Public Function Prototypes
************************************************************************************/
#ifndef __ASSEMBLY__
#ifdef __cplusplus
#define EXTERN extern "C"
extern "C" {
#else
#define EXTERN extern
#endif
#undef EXTERN
#ifdef __cplusplus
}
#endif
#endif
#endif /* __ARCH_Z80_SRC_Z80_CHIP_H */

55
nuttx/arch/z80/src/z180/Kconfig Normal file
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@ -0,0 +1,55 @@
#
# For a description of the syntax of this configuration file,
# see misc/tools/kconfig-language.txt.
#
if ARCH_CHIP_Z180
choice
prompt "Toolchain Selection"
default Z180_TOOLCHAIN_SDCCW if HOST_WINDOWS
default Z180_TOOLCHAIN_SDCCL if !HOST_WINDOWS
config Z180_TOOLCHAIN_SDCCL
bool "SDCC for Linux, MAC OSX, or Cygwin"
depends on !WINDOWS_NATIVE
config Z180_TOOLCHAIN_SDCCW
bool "SDCC for Windows"
depends on HOST_WINDOWS
endchoice
config LINKER_HOME_AREA
hex "Start of _HOME area"
default 0x0000
---help---
Start of the linker HOME area. Default: 0x0000
config LINKER_CODE_AREA
hex "Start of _CODE area"
default 0x0200
---help---
Start of the linker _CODE area. Default: 0x0200
config LINKER_DATA_AREA
hex "Start of _DATA area"
default 0x8000
---help---
Start of the linker _DATA area. Default: 0x8000
config LINKER_ROM_AT_0000
bool "ROM at 0x0000"
default n
---help---
Some architectures may have ROM located at address zero. In this
case, a special version of the "head" file must be used.
config ARCH_HAVEHEAD
bool "Board-specific Head File"
default n
---help---
Use a board-specific version of the "head" file in the
configs/<board-name>/src directory
endif

55
nuttx/arch/z80/src/z180/Make.defs Normal file
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@ -0,0 +1,55 @@
############################################################################
# arch/z80/src/z180/Make.defs
#
# Copyright (C) 2012 Gregory Nutt. All rights reserved.
# Author: Gregory Nutt <gnutt@nuttx.org>
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# 1. Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in
# the documentation and/or other materials provided with the
# distribution.
# 3. Neither the name NuttX nor the names of its contributors may be
# used to endorse or promote products derived from this software
# without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
############################################################################
ifeq ($(CONFIG_ARCH_HAVEHEAD),)
ifeq ($(CONFIG_LINKER_ROM_AT_0000),y)
HEAD_ASRC = z180_rom.asm
else
HEAD_ASRC = z180_head.asm
endif
endif
CMN_ASRCS =
CMN_CSRCS = up_initialize.c up_allocateheap.c up_createstack.c \
up_releasestack.c up_interruptcontext.c up_blocktask.c \
up_unblocktask.c up_exit.c up_releasepending.c \
up_reprioritizertr.c up_idle.c up_assert.c up_doirq.c \
up_mdelay.c up_udelay.c up_usestack.c
CHIP_ASRCS = z180_saveusercontext.asm z180_restoreusercontext.asm
CHIP_CSRCS = z180_initialstate.c z180_io.c z180_irq.c z180_copystate.c \
z180_schedulesigaction.c z180_sigdeliver.c \
z180_registerdump.c

49
nuttx/arch/z80/src/z180/README.txt Normal file
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@ -0,0 +1,49 @@
arch/z80/src/z180
^^^^^^^^^^^^^^^^^
The arch/z80 directories contain files to support a variety of 8-bit architectures
from ZiLOG (and spin-architectures such as the Rabbit2000). The arch/z80/src/z180
sub-directory contains logic unique to the classic Z180 family of chips.
Files in this directory include:
z180_head.asm
This is the main entry point into the Z180 program. This includes the
handler for the RESET, power-up interrupt vector and address zero and all
RST interrupts.
z180_rom.asm
Some architectures may have ROM located at address zero. In this case, a
special version of the "head" logic must be used. This special "head"
file is probably board-specific and, hence, belongs in the board-specific
configs/<board-name>/src directory. This file may, however, be used as
a model for such a board-specific file.
z180_rom.S is enabled by specifying CONFIG_LINKER_ROM_AT_0000 in the
configuration file.
A board specific version in the configs/<board-name>/src directory can be
used by:
1. Define CONFIG_ARCH_HAVEHEAD
2. Add the board-specific head file, say <filename>.asm, to
configs/<board-name>/src
3. Add a file called Make.defs in the configs/<board-name>/src directory
containing the line: HEAD_ASRC = <file-name>.asm
Make.defs
This is the standard makefile fragment that must be provided in all
chip directories. This fragment identifies the chip-specific file to
be used in building libarch.
chip.h
This is the standard header file that must be provided in all chip
directories.
z180_initialstate.c, z180_copystate.c, z180_restoreusercontext.asm, and
z180_saveusercontext.asm, switch
These files implement the Z180 context switching logic
z180_schedulesigaction.c and z180_sigdeliver.c
These files implement Z180 signal handling.

75
nuttx/arch/z80/src/z180/Toolchain.defs Normal file
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############################################################################
# arch/z80/src/z180/Toolchain.defs
#
# Copyright (C) 2012 Gregory Nutt. All rights reserved.
# Author: Gregory Nutt <gnutt@nuttx.org>
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# 1. Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in
# the documentation and/or other materials provided with the
# distribution.
# 3. Neither the name NuttX nor the names of its contributors may be
# used to endorse or promote products derived from this software
# without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
############################################################################
# Setup for the selected toolchain
#
# SDCC is currently the only z180 toolchain supported. See
# http://sdcc.sourceforge.net/. Source and pre-built SDCC binaries can be
# downloaded from the SDCC SourceForge site:
# http://sourceforge.net/projects/sdcc/files/. Pre-built binaries are
# available for Linux, MAC OSX, and for Win32. In addition, SDCC can be
# built to run on Windows as a POSIX toolchain. The various SDCC options are
# selected in the NuttX configuration with:
#
# CONFIG_Z180_TOOLCHAIN_SDCCL=y : SDCC for Linux, MAC OSX or Cygwin
# CONFIG_Z180_TOOLCHAIN_SDCCW=y : SDCC for Win32
#
ifeq ($(filter y, \
$(CONFIG_Z180_TOOLCHAIN_SDCCL) \
),y)
CONFIG_Z180_TOOLCHAIN ?= SDCCPOSIX
endif
ifeq ($(filter y, \
$(CONFIG_Z180_TOOLCHAIN_SDCCW) \
),y)
CONFIG_Z180_TOOLCHAIN ?= SDCCWIN32
endif
# SDCC toolchain under Linux, MAC OSX or Cygwin
ifeq ($(CONFIG_Z180_TOOLCHAIN),POSIX)
endif
# SDCC toolchain under Windows/Cygwin
ifeq ($(CONFIG_AVR_TOOLCHAIN),SDCCWIN32)
ifneq ($(CONFIG_WINDOWS_NATIVE),y)
WINTOOL = y
endif
endif

54
nuttx/arch/z80/src/z180/chip.h Normal file
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@ -0,0 +1,54 @@
/************************************************************************************
* arch/z80/src/z180/chip.h
* arch/z80/src/chip/chip.h
*
* Copyright (C) 2012 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
#ifndef __ARCH_Z80_SRC_Z180_CHIP_H
#define __ARCH_Z80_SRC_Z180_CHIP_H
/************************************************************************************
* Included Files
************************************************************************************/
#include <arch/z180/chip.h>
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/************************************************************************************
* Public Function Prototypes
************************************************************************************/
#endif /* __ARCH_Z80_SRC_Z180_CHIP_H */

166
nuttx/arch/z80/src/z180/switch.h Normal file
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@ -0,0 +1,166 @@
/************************************************************************************
* arch/z80/src/z180/switch.h
* arch/z80/src/chip/switch.h
*
* Copyright (C) 2012 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
#ifndef __ARCH_Z80_SRC_Z180_SWITCH_H
#define __ARCH_Z80_SRC_Z180_SWITCH_H
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/sched.h>
#include <nuttx/arch.h>
#include "up_internal.h"
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/* Macros for portability ***********************************************************
*
* Common logic in arch/z80/src/common is customized for the z180 context switching
* logic via the following macros.
*/
/* Initialize the IRQ state */
#define INIT_IRQCONTEXT() current_regs = NULL
/* IN_INTERRUPT returns true if the system is currently operating in the interrupt
* context. IN_INTERRUPT is the inline equivalent of up_interrupt_context().
*/
#define IN_INTERRUPT() (current_regs != NULL)
/* The following macro is used when the system enters interrupt handling logic */
#define DECL_SAVESTATE() \
FAR chipreg_t *savestate
#define IRQ_ENTER(irq, regs) \
do { \
savestate = (FAR chipreg_t *)current_regs; \
current_regs = (regs); \
} while (0)
/* The following macro is used when the system exits interrupt handling logic */
#define IRQ_LEAVE(irq) current_regs = savestate
/* The following macro is used to sample the interrupt state (as a opaque handle) */
#define IRQ_STATE() (current_regs)
/* Save the current IRQ context in the specified TCB */
#define SAVE_IRQCONTEXT(tcb) z180_copystate((tcb)->xcp.regs, (FAR chipreg_t*)current_regs)
/* Set the current IRQ context to the state specified in the TCB */
#define SET_IRQCONTEXT(tcb) z180_copystate((FAR chipreg_t*)current_regs, (tcb)->xcp.regs)
/* Save the user context in the specified TCB. User context saves can be simpler
* because only those registers normally saved in a C called need be stored.
*/
#define SAVE_USERCONTEXT(tcb) z180_saveusercontext((tcb)->xcp.regs)
/* Restore the full context -- either a simple user state save or the full,
* IRQ state save.
*/
#define RESTORE_USERCONTEXT(tcb) z180_restoreusercontext((tcb)->xcp.regs)
/* Dump the current machine registers */
#define _REGISTER_DUMP() z180_registerdump()
/************************************************************************************
* Public Types
************************************************************************************/
/************************************************************************************
* Public Variables
************************************************************************************/
#ifndef __ASSEMBLY__
/* This holds a references to the current interrupt level register storage structure.
* If is non-NULL only during interrupt processing.
*/
extern volatile chipreg_t *current_regs;
#endif
/************************************************************************************
* Public Function Prototypes
************************************************************************************/
#ifndef __ASSEMBLY__
#ifdef __cplusplus
#define EXTERN extern "C"
extern "C" {
#else
#define EXTERN extern
#endif
/* Defined in z180_copystate.c */
EXTERN void z180_copystate(FAR chipreg_t *dest, FAR const chipreg_t *src);
/* Defined in z180_saveusercontext.asm */
EXTERN int z180_saveusercontext(FAR chipreg_t *regs);
/* Defined in z180_restoreusercontext.asm */
EXTERN void z180_restoreusercontext(FAR chipreg_t *regs);
/* Defined in z180_sigsetup.c */
EXTERN void z180_sigsetup(FAR _TCB *tcb, sig_deliver_t sigdeliver, FAR chipreg_t *regs);
/* Defined in z180_registerdump.c */
EXTERN void z180_registerdump(void);
#undef EXTERN
#ifdef __cplusplus
}
#endif
#endif
#endif /* __ARCH_Z80_SRC_Z180_SWITCH_H */

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/************************************************************************************
* common/sdcc.h
*
* Copyright (C) 2012 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
#ifndef __ARCH_Z180_SRC_COMMON_UP_MEM_H
#define __ARCH_Z180_SRC_COMMON_UP_MEM_H
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/* Locate the IDLE thread stack at the end of RAM. */
#define CONFIG_STACK_END CONFIG_DRAM_SIZE
#define CONFIG_STACK_BASE (CONFIG_STACK_END - CONFIG_IDLETHREAD_STACKSIZE)
/* The heap then extends from the linker determined beginning of the heap (s__HEAP).
* to the bottom of the IDLE thread stack. NOTE: The symbol s__HEAP is not
* accessible from C because it does not begin with the _ character. g_heapbase
* is defined in z180_head.asm to provide that value to the C code.
*/
#define CONFIG_HEAP1_END CONFIG_STACK_BASE
#define CONFIG_HEAP1_BASE g_heapbase
/************************************************************************************
* Public variables
************************************************************************************/
/* This is the bottom of the heap as provided by the linker symbol s__HEAP. NOTE:
* The symbol s__HEAP is not accessible from C because it does not begin with the _
* character. g_heapbase is defined in z180_head.asm to provide that value to the C
* code.
*/
extern const uint16_t g_heapbase;
#endif /* __ARCH_Z180_SRC_COMMON_UP_MEM_H */

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/****************************************************************************
* arch/z80/src/z180/z180_copystate.c
*
* Copyright (C) 2012 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <arch/irq.h>
#include "chip/switch.h"
#include "os_internal.h"
#include "up_internal.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: z180_copystate
****************************************************************************/
/* Maybe a little faster than most memcpy's */
void z180_copystate(FAR chipreg_t *dest, FAR const chipreg_t *src)
{
int i;
for (i = 0; i < XCPTCONTEXT_REGS; i++)
{
*dest++ = *src++;
}
}

304
nuttx/arch/z80/src/z180/z180_head.asm Normal file
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;**************************************************************************
; arch/z80/src/z180/z180_head.asm
;
; Copyright (C) 2012 Gregory Nutt. All rights reserved.
; Author: Gregory Nutt <gnutt@nuttx.org>
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; 1. Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
; 2. Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in
; the documentation and/or other materials provided with the
; distribution.
; 3. Neither the name NuttX nor the names of its contributors may be
; used to endorse or promote products derived from this software
; without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
; FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
; COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
; INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
; BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
; OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
; AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
; LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
; ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
; POSSIBILITY OF SUCH DAMAGE.
;
;**************************************************************************
.title NuttX for the Z180
.module z180_head
;**************************************************************************
; Constants
;**************************************************************************
; Register save area layout
XCPT_I == 0 ; Offset 0: Saved I w/interrupt state in carry
XCPT_BC == 2 ; Offset 1: Saved BC register
XCPT_DE == 4 ; Offset 2: Saved DE register
XCPT_IX == 6 ; Offset 3: Saved IX register
XCPT_IY == 8 ; Offset 4: Saved IY register
XCPT_SP == 10 ; Offset 5: Offset to SP at time of interrupt
XCPT_HL == 12 ; Offset 6: Saved HL register
XCPT_AF == 14 ; Offset 7: Saved AF register
XCPT_PC == 16 ; Offset 8: Offset to PC at time of interrupt
; Default stack base (needs to be fixed)
.include "asm_mem.h"
;**************************************************************************
; Global symbols used
;**************************************************************************
.globl _os_start ; OS entry point
.globl _up_doirq ; Interrupt decoding logic
;**************************************************************************
; Reset entry point
;**************************************************************************
.area _HEADER (ABS)
.org 0x0000
di ; Disable interrupts
im 1 ; Set interrupt mode 1
jr _up_reset ; And boot the system
;**************************************************************************
; Other reset handlers
;
; Interrupt mode 1 behavior:
;
; 1. M1 cycle: 7 ticks
; Acknowledge interrupt and decrements SP
; 2. M2 cycle: 3 ticks
; Writes the MS byte of the PC onto the stack and decrements SP
; 3. M3 cycle: 3 ticks
; Writes the LS byte of the PC onto the stack and sets the PC to 0x0038.
;
;**************************************************************************
.org 0x0008 ; RST 1
; Save AF on the stack, set the interrupt number and jump to the
; common reset handling logic.
; Offset 8: Return PC is already on the stack
push af ; Offset 7: AF (retaining flags)
ld a, #1 ; 1 = Z180_RST1
jr _up_rstcommon ; Remaining RST handling is common
.org 0x0010 ; RST 2
; Save AF on the stack, set the interrupt number and jump to the
; common reset handling logic.
; Offset 8: Return PC is already on the stack
push af ; Offset 7: AF (retaining flags)
ld a, #2 ; 2 = Z180_RST2
jr _up_rstcommon ; Remaining RST handling is common
.org 0x0018 ; RST 3
; Save AF on the stack, set the interrupt number and jump to the
; common reset handling logic.
; Offset 8: Return PC is already on the stack
push af ; Offset 7: AF (retaining flags)
ld a, #3 ; 1 = Z180_RST3
jr _up_rstcommon ; Remaining RST handling is common
.org 0x0020 ; RST 4
; Save AF on the stack, set the interrupt number and jump to the
; common reset handling logic.
; Offset 8: Return PC is already on the stack
push af ; Offset 7: AF (retaining flags)
ld a, #4 ; 1 = Z180_RST4
jr _up_rstcommon ; Remaining RST handling is common
.org 0x0028 ; RST 5
; Save AF on the stack, set the interrupt number and jump to the
; common reset handling logic.
; Offset 8: Return PC is already on the stack
push af ; Offset 7: AF (retaining flags)
ld a, #5 ; 1 = Z180_RST5
jr _up_rstcommon ; Remaining RST handling is common
.org 0x0030 ; RST 6
; Save AF on the stack, set the interrupt number and jump to the
; common reset handling logic.
; Offset 8: Return PC is already on the stack
push af ; Offset 7: AF (retaining flags)
ld a, #6 ; 1 = Z180_RST6
jr _up_rstcommon ; Remaining RST handling is common
.org 0x0038 ; Int mode 1 / RST 7
; Save AF on the stack, set the interrupt number and jump to the
; common reset handling logic.
; Offset 8: Return PC is already on the stack
push af ; Offset 7: AF (retaining flags)
ld a, #7 ; 7 = Z180_RST7
jr _up_rstcommon ; Remaining RST handling is common
;**************************************************************************
; NMI interrupt handler
;**************************************************************************
.org 0x0066
retn
;**************************************************************************
; System start logic
;**************************************************************************
_up_reset:
; Set up the stack pointer at the location determined the Makefile
; and stored in asm_mem.h
ld SP, #CONFIG_STACK_END ; Set stack pointer
; Performed initialization unique to the SDCC toolchain
call gsinit ; Initialize the data section
; Then start NuttX
call _os_start ; jump to the OS entry point
; NuttX will never return, but just in case...
_up_halt::
halt ; We should never get here
jp _up_halt
;**************************************************************************
; Common Interrupt handler
;**************************************************************************
_up_rstcommon::
; Create a register frame. SP points to top of frame + 4, pushes
; decrement the stack pointer. Already have
;
; Offset 8: Return PC is already on the stack
; Offset 7: AF (retaining flags)
;
; IRQ number is in A
push hl ; Offset 6: HL
ld hl, #(3*2) ; HL is the value of the stack pointer before
add hl, sp ; the interrupt occurred
push hl ; Offset 5: Stack pointer
push iy ; Offset 4: IY
push ix ; Offset 3: IX
push de ; Offset 2: DE
push bc ; Offset 1: BC
ld b, a ; Save the reset number in B
ld a, i ; Parity bit holds interrupt state
push af ; Offset 0: I with interrupt state in parity
di
; Call the interrupt decode logic. SP points to the beginning of the reg structure
ld hl, #0 ; Argument #2 is the beginning of the reg structure
add hl, sp ;
push hl ; Place argument #2 at the top of stack
push bc ; Argument #1 is the Reset number
inc sp ; (make byte sized)
call _up_doirq ; Decode the IRQ
; On return, HL points to the beginning of the reg structure to restore
; Note that (1) the arguments pushed on the stack are not popped, and (2) the
; original stack pointer is lost. In the normal case (no context switch),
; HL will contain the value of the SP before the arguments were pushed.
ld sp, hl ; Use the new stack pointer
; Restore registers. HL points to the beginning of the reg structure to restore
ex af, af' ; Select alternate AF
pop af ; Offset 0: AF' = I with interrupt state in carry
ex af, af' ; Restore original AF
pop bc ; Offset 1: BC
pop de ; Offset 2: DE
pop ix ; Offset 3: IX
pop iy ; Offset 4: IY
exx ; Use alternate BC/DE/HL
ld hl, #-2 ; Offset of SP to account for ret addr on stack
pop de ; Offset 5: HL' = Stack pointer after return
add hl, de ; HL = Stack pointer value before return
exx ; Restore original BC/DE/HL
pop hl ; Offset 6: HL
pop af ; Offset 7: AF
; Restore the stack pointer
exx ; Use alternate BC/DE/HL
ld sp, hl ; Set SP = saved stack pointer value before return
exx ; Restore original BC/DE/HL
; Restore interrupt state
ex af, af' ; Recover interrupt state
jp po, nointenable ; Odd parity, IFF2=0, means disabled
ex af, af' ; Restore AF (before enabling interrupts)
ei ; yes
reti
nointenable::
ex af, af' ; Restore AF
reti
;**************************************************************************
; Ordering of segments for the linker (SDCC only)
;**************************************************************************
.area _HOME
.area _CODE
.area _INITIALIZER
.area _GSINIT
.area _GSFINAL
.area _DATA
.area _INITIALIZED
.area _BSEG
.area _BSS
.area _HEAP
;**************************************************************************
; Global data initialization logic (SDCC only)
;**************************************************************************
.area _GSINIT
gsinit::
ld bc, #l__INITIALIZER
ld a, b
or a, c
jr Z, gsinit_next
ld de, #s__INITIALIZED
ld hl, #s__INITIALIZER
ldir
gsinit_next:
.area _GSFINAL
ret
;**************************************************************************
; The start of the heap (SDCC only). Note that is actually resides in
; the _CODE area (which may be FLASH or ROM)
;**************************************************************************
.area _CODE
_g_heapbase::
.dw #s__HEAP

91
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/****************************************************************************
* arch/z80/src/z180/z180_initialstate.c
*
* Copyright (C) 2012 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <string.h>
#include <nuttx/arch.h>
#include "chip/chip.h"
#include "up_internal.h"
#include "up_arch.h"
/****************************************************************************
* Private Definitions
****************************************************************************/
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: up_initial_state
*
* Description:
* A new thread is being started and a new TCB
* has been created. This function is called to initialize
* the processor specific portions of the new TCB.
*
* This function must setup the initial architecture registers
* and/or stack so that execution will begin at tcb->start
* on the next context switch.
*
****************************************************************************/
void up_initial_state(_TCB *tcb)
{
struct xcptcontext *xcp = &tcb->xcp;
/* Initialize the initial exception register context structure */
memset(xcp, 0, sizeof(struct xcptcontext));
#ifndef CONFIG_SUPPRESS_INTERRUPTS
xcp->regs[XCPT_I] = Z180_PV_FLAG; /* Parity flag will enable interrupts */
#endif
xcp->regs[XCPT_SP] = (chipreg_t)tcb->adj_stack_ptr;
xcp->regs[XCPT_PC] = (chipreg_t)tcb->start;
}

94
nuttx/arch/z80/src/z180/z180_io.c Normal file
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/****************************************************************************
* arch/z80/src/z180/z180_io.c
*
* Copyright (C) 2012 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/arch.h>
/* #include <nuttx/irq.h> */
#include "up_internal.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: outb
*
* Description:
* Output byte c on port p
*
****************************************************************************/
void outp(char p, char c)
{
__asm
ld c, 4(ix) ; port
ld a, 5(ix) ; value
out (c), a
__endasm;
}
/****************************************************************************
* Name: inpb
*
* Description:
* Input byte from port p
*
****************************************************************************/
char inp(char p) __naked
{
__asm
ld c, 4(ix) ;port
in l, (c)
__endasm;
}

113
nuttx/arch/z80/src/z180/z180_irq.c Normal file
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/****************************************************************************
* arch/z80/src/z180/z180_irq.c
*
* Copyright (C) 2012 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/arch.h>
#include <nuttx/irq.h>
#include "chip/switch.h"
#include "up_internal.h"
/****************************************************************************
* Private Definitions
****************************************************************************/
/****************************************************************************
* Public Data
****************************************************************************/
/* This holds a references to the current interrupt level register storage
* structure. If is non-NULL only during interrupt processing.
*/
volatile chipreg_t *current_regs;
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: irqsave
*
* Description:
* Disable all interrupts; return previous interrupt state
*
****************************************************************************/
irqstate_t irqsave(void) __naked
{
__asm
ld a, i ; AF Parity bit holds interrupt state
di ; Interrupts are disabled
push af ; Return AF in HL
pop hl ;
ret ;
__endasm;
}
/****************************************************************************
* Name: irqrestore
*
* Description:
* Restore previous interrupt state
*
****************************************************************************/
void irqrestore(irqstate_t flags) __naked
{
__asm
di ; Assume disabled
pop hl ; HL = return address
pop af ; AF Parity bit holds interrupt state
jp po, statedisable
ei
statedisable:
push af ; Restore stack
push hl ;
ret ; and return
__endasm;
}

91
nuttx/arch/z80/src/z180/z180_registerdump.c Normal file
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/****************************************************************************
* arch/z80/src/z180/z180_registerdump.c
*
* Copyright (C) 2012 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <debug.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include "chip/switch.h"
#include "os_internal.h"
#include "up_internal.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Output debug info if stack dump is selected -- even if
* debug is not selected.
*/
#ifdef CONFIG_ARCH_STACKDUMP
# undef lldbg
# define lldbg lib_lowprintf
#endif
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: z180_registerdump
****************************************************************************/
#ifdef CONFIG_ARCH_STACKDUMP
static void z180_registerdump(void)
{
if (current_regs)
{
lldbg("AF: %04x I: %04x\n",
current_regs[XCPT_AF], current_regs[XCPT_I]);
lldbg("BC: %04x DE: %04x HL: %04x\n",
current_regs[XCPT_BC], current_regs[XCPT_DE], current_regs[XCPT_HL]);
lldbg("IX: %04x IY: %04x\n",
current_regs[XCPT_IX], current_regs[XCPT_IY]);
lldbg("SP: %04x PC: %04x\n"
current_regs[XCPT_SP], current_regs[XCPT_PC]);
}
}
#endif

104
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;**************************************************************************
; arch/z80/src/z180/z180_restoreusercontext.asm
;
; Copyright (C) 2012 Gregory Nutt. All rights reserved.
; Author: Gregory Nutt <gnutt@nuttx.org>
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; 1. Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
; 2. Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in
; the documentation and/or other materials provided with the
; distribution.
; 3. Neither the name NuttX nor the names of its contributors may be
; used to endorse or promote products derived from this software
; without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
; FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
; COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
; INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
; BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
; OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
; AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
; LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
; ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
; POSSIBILITY OF SUCH DAMAGE.
;
;**************************************************************************
; Register save area layout
.globl XCPT_I ; Offset 0: Saved I w/interrupt state in carry
.globl XCPT_BC ; Offset 1: Saved BC register
.globl XCPT_DE ; Offset 2: Saved DE register
.globl XCPT_IX ; Offset 3: Saved IX register
.globl XCPT_IY ; Offset 4: Saved IY register
.globl XCPT_SP ; Offset 5: Offset to SP at time of interrupt
.globl XCPT_HL ; Offset 6: Saved HL register
.globl XCPT_AF ; Offset 7: Saved AF register
.globl XCPT_PC ; Offset 8: Offset to PC at time of interrupt
;**************************************************************************
; z180_restoreusercontext
;**************************************************************************
.area _CODE
_z180_restoreusercontext:
; On entry, stack contains return address (not used), then address
; of the register save structure
; Discard the return address, we won't be returning
pop hl
; Get the address of the beginning of the state save area. Each
; pop will increment to the next element of the structure
pop hl ; BC = Address of save structure
ld sp, hl ; SP points to top of storage area
; Disable interrupts while we muck with the alternative registers. The
; Correct interrupt state will be restore below
di
; Restore registers. HL points to the beginning of the reg structure to restore
ex af, af' ; Select alternate AF
pop af ; Offset 0: AF' = I with interrupt state in parity
ex af, af' ; Restore original AF
pop bc ; Offset 1: BC
pop de ; Offset 2: DE
pop ix ; Offset 3: IX
pop iy ; Offset 4: IY
exx ; Use alternate BC/DE/HL
pop hl ; Offset 5: HL' = Stack pointer after return
exx ; Restore original BC/DE/HL
pop hl ; Offset 6: HL
pop af ; Offset 7: AF
; Restore the stack pointer
exx ; Use alternate BC/DE/HL
pop de ; DE' = return address
ld sp, hl ; Set SP = saved stack pointer value before return
push de ; Save return address for ret instruction
exx ; Restore original BC/DE/HL
; Restore interrupt state
ex af, af' ; Recover interrupt state
jp po, noinrestore ; Odd parity, IFF2=0, means disabled
ex af, af' ; Restore AF (before enabling interrupts)
ei ; yes.. Enable interrupts
ret ; and return
noinrestore:
ex af, af' ; Restore AF
ret ; Return with interrupts disabled

297
nuttx/arch/z80/src/z180/z180_rom.asm Normal file
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;**************************************************************************
; arch/z80/src/z180/z180_rom.asm
;
; Copyright (C) 2012 Gregory Nutt. All rights reserved.
; Author: Gregory Nutt <gnutt@nuttx.org>
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; 1. Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
; 2. Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in
; the documentation and/or other materials provided with the
; distribution.
; 3. Neither the name NuttX nor the names of its contributors may be
; used to endorse or promote products derived from this software
; without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
; FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
; COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
; INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
; BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
; OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
; AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
; LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
; ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
; POSSIBILITY OF SUCH DAMAGE.
;
;**************************************************************************
.title NuttX for the Z180
.module z180_head
;**************************************************************************
; Constants
;**************************************************************************
; Register save area layout
XCPT_I == 0 ; Offset 0: Saved I w/interrupt state in carry
XCPT_BC == 2 ; Offset 1: Saved BC register
XCPT_DE == 4 ; Offset 2: Saved DE register
XCPT_IX == 6 ; Offset 3: Saved IX register
XCPT_IY == 8 ; Offset 4: Saved IY register
XCPT_SP == 10 ; Offset 5: Offset to SP at time of interrupt
XCPT_HL == 12 ; Offset 6: Saved HL register
XCPT_AF == 14 ; Offset 7: Saved AF register
XCPT_PC == 16 ; Offset 8: Offset to PC at time of interrupt
; Default stack base (needs to be fixed)
.include "asm_mem.h"
;**************************************************************************
; Global symbols used
;**************************************************************************
.globl _os_start ; OS entry point
.globl _up_doirq ; Interrupt decoding logic
;**************************************************************************
; System start logic
;**************************************************************************
_up_reset:
; Set up the stack pointer at the location determined the Makefile
; and stored in asm_mem.h
ld SP, #CONFIG_STACK_END ; Set stack pointer
; Performed initialization unique to the SDCC toolchain
call gsinit ; Initialize the data section
; Copy the reset vectors
ld hl, #_up_rstvectors ; code for RAM
ld de, #0x4000 ; move it here
ld bc, #3*7 ; 7 vectors / 3 bytes each
ldir
; Then start NuttX
call _os_start ; jump to the OS entry point
; NuttX will never return, but just in case...
_up_halt::
halt ; We should never get here
jp _up_halt
; Data to copy to address 0x4000
_up_rstvectors:
jp _up_rst1 ; 0x4000 : RST 1
jp _up_rst2 ; 0x4003 : RST 2
jp _up_rst3 ; 0x4006 : RST 3
jp _up_rst4 ; 0x4009 : RST 4
jp _up_rst5 ; 0x400c : RST 5
jp _up_rst6 ; 0x400f : RST 6
jp _up_rst7 ; 0x4012 : RST 7
;**************************************************************************
; Other reset handlers
;
; Interrupt mode 1 behavior:
;
; 1. M1 cycle: 7 ticks
; Acknowledge interrupt and decrements SP
; 2. M2 cycle: 3 ticks
; Writes the MS byte of the PC onto the stack and decrements SP
; 3. M3 cycle: 3 ticks
; Writes the LS byte of the PC onto the stack and sets the PC to 0x0038.
;
;**************************************************************************
_up_rst1: ; RST 1
; Save AF on the stack, set the interrupt number and jump to the
; common reset handling logic.
; Offset 8: Return PC is already on the stack
push af ; Offset 7: AF (retaining flags)
ld a, #1 ; 1 = Z180_RST1
jr _up_rstcommon ; Remaining RST handling is common
_up_rst2: ; RST 2
; Save AF on the stack, set the interrupt number and jump to the
; common reset handling logic.
; Offset 8: Return PC is already on the stack
push af ; Offset 7: AF (retaining flags)
ld a, #2 ; 2 = Z180_RST2
jr _up_rstcommon ; Remaining RST handling is common
_up_rst3: ; RST 3
; Save AF on the stack, set the interrupt number and jump to the
; common reset handling logic.
; Offset 8: Return PC is already on the stack
push af ; Offset 7: AF (retaining flags)
ld a, #3 ; 1 = Z180_RST3
jr _up_rstcommon ; Remaining RST handling is common
_up_rst4: ; RST 4
; Save AF on the stack, set the interrupt number and jump to the
; common reset handling logic.
; Offset 8: Return PC is already on the stack
push af ; Offset 7: AF (retaining flags)
ld a, #4 ; 1 = Z180_RST4
jr _up_rstcommon ; Remaining RST handling is common
_up_rst5: ; RST 5
; Save AF on the stack, set the interrupt number and jump to the
; common reset handling logic.
; Offset 8: Return PC is already on the stack
push af ; Offset 7: AF (retaining flags)
ld a, #5 ; 1 = Z180_RST5
jr _up_rstcommon ; Remaining RST handling is common
_up_rst6: ; RST 6
; Save AF on the stack, set the interrupt number and jump to the
; common reset handling logic.
; Offset 8: Return PC is already on the stack
push af ; Offset 7: AF (retaining flags)
ld a, #6 ; 1 = Z180_RST6
jr _up_rstcommon ; Remaining RST handling is common
_up_rst7: ; RST 7
; Save AF on the stack, set the interrupt number and jump to the
; common reset handling logic.
; Offset 8: Return PC is already on the stack
push af ; Offset 7: AF (retaining flags)
ld a, #7 ; 7 = Z180_RST7
jr _up_rstcommon ; Remaining RST handling is common
;**************************************************************************
; Common Interrupt handler
;**************************************************************************
_up_rstcommon:
; Create a register frame. SP points to top of frame + 4, pushes
; decrement the stack pointer. Already have
;
; Offset 8: Return PC is already on the stack
; Offset 7: AF (retaining flags)
;
; IRQ number is in A
push hl ; Offset 6: HL
ld hl, #(3*2) ; HL is the value of the stack pointer before
add hl, sp ; the interrupt occurred
push hl ; Offset 5: Stack pointer
push iy ; Offset 4: IY
push ix ; Offset 3: IX
push de ; Offset 2: DE
push bc ; Offset 1: BC
ld b, a ; Save the reset number in B
ld a, i ; Parity bit holds interrupt state
push af ; Offset 0: I with interrupt state in parity
di
; Call the interrupt decode logic. SP points to the beginning of the reg structure
ld hl, #0 ; Argument #2 is the beginning of the reg structure
add hl, sp ;
push hl ; Place argument #2 at the top of stack
push bc ; Argument #1 is the Reset number
inc sp ; (make byte sized)
call _up_doirq ; Decode the IRQ
; On return, HL points to the beginning of the reg structure to restore
; Note that (1) the arguments pushed on the stack are not popped, and (2) the
; original stack pointer is lost. In the normal case (no context switch),
; HL will contain the value of the SP before the arguments were pushed.
ld sp, hl ; Use the new stack pointer
; Restore registers. HL points to the beginning of the reg structure to restore
ex af, af' ; Select alternate AF
pop af ; Offset 0: AF' = I with interrupt state in carry
ex af, af' ; Restore original AF
pop bc ; Offset 1: BC
pop de ; Offset 2: DE
pop ix ; Offset 3: IX
pop iy ; Offset 4: IY
exx ; Use alternate BC/DE/HL
ld hl, #-2 ; Offset of SP to account for ret addr on stack
pop de ; Offset 5: HL' = Stack pointer after return
add hl, de ; HL = Stack pointer value before return
exx ; Restore original BC/DE/HL
pop hl ; Offset 6: HL
pop af ; Offset 7: AF
; Restore the stack pointer
exx ; Use alternate BC/DE/HL
ld sp, hl ; Set SP = saved stack pointer value before return
exx ; Restore original BC/DE/HL
; Restore interrupt state
ex af, af' ; Recover interrupt state
jp po, nointenable ; Odd parity, IFF2=0, means disabled
ex af, af' ; Restore AF (before enabling interrupts)
ei ; yes
reti
nointenable::
ex af, af' ; Restore AF
reti
;**************************************************************************
; Ordering of segments for the linker (SDCC only)
;**************************************************************************
.area _HOME
.area _CODE
.area _INITIALIZER
.area _GSINIT
.area _GSFINAL
.area _DATA
.area _INITIALIZED
.area _BSEG
.area _BSS
.area _HEAP
;**************************************************************************
; Global data initialization logic (SDCC only)
;**************************************************************************
.area _GSINIT
gsinit::
ld bc, #l__INITIALIZER
ld a, b
or a, c
jr Z, gsinit_next
ld de, #s__INITIALIZED
ld hl, #s__INITIALIZER
ldir
gsinit_next:
.area _GSFINAL
ret
;**************************************************************************
; The start of the heap (SDCC only). Note that is actually resides in
; the _CODE area (which may be FLASH or ROM)
;**************************************************************************
.area _CODE
_g_heapbase::
.dw #s__HEAP

143
nuttx/arch/z80/src/z180/z180_saveusercontext.asm Normal file
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;*************************************************************************
; arch/z80/src/z180/z180_saveusercontext.asm
;
; Copyright (C) 2012 Gregory Nutt. All rights reserved.
; Author: Gregory Nutt <gnutt@nuttx.org>
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; 1. Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
; 2. Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in
; the documentation and/or other materials provided with the
; distribution.
; 3. Neither the name NuttX nor the names of its contributors may be
; used to endorse or promote products derived from this software
; without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
; FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
; COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
; INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
; BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
; OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
; AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
; LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
; ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
; POSSIBILITY OF SUCH DAMAGE.
;
;*************************************************************************
;*************************************************************************
; Constants
;*************************************************************************
; Register save area layout
.globl XCPT_I ; Offset 0: Saved I w/interrupt state in parity
.globl XCPT_BC ; Offset 1: Saved BC register
.globl XCPT_DE ; Offset 2: Saved DE register
.globl XCPT_IX ; Offset 3: Saved IX register
.globl XCPT_IY ; Offset 4: Saved IY register
.globl XCPT_SP ; Offset 5: Offset to SP at time of interrupt
.globl XCPT_HL ; Offset 6: Saved HL register
.globl XCPT_AF ; Offset 7: Saved AF register
.globl XCPT_PC ; Offset 8: Offset to PC at time of interrupt
; Stack frame
FRAME_IY == 0 ; Location of IY on the stack
FRAME_IX == 2 ; Location of IX on the stack
FRAME_RET == 4 ; Location of return address on the stack
FRAME_REGS == 6 ; Location of reg save area on stack
SP_OFFSET == 6
;*************************************************************************
; Name: z180_saveusercontext
;*************************************************************************
.area _CODE
_z180_saveusercontext:
; Set up a stack frame
push ix ; Save IX and IY
push iy
ld ix, #0
add ix, sp ; IX = stack frame
; Fetch the address of the save area
ld e, FRAME_REGS(ix) ; HL = save area address
ld d, FRAME_REGS+1(ix) ;
ld iy, #0
add iy, de ; IY = save area address
; Then save the registers
; Save the current interrupt state at offset 0
ld a, i ; Get interrupt state
push af
pop hl
ld XCPT_I(iy), l ; Offset 0: I w/interrupt state in parity
ld XCPT_I+1(iy), h
; Save BC at offset 1
ld XCPT_BC(iy), c ; Offset 1: BC
ld XCPT_BC+1(iy), b
; DE is not preserved (offset 2)
; Save IX at offset 3
ld l, FRAME_IX(ix) ; HL = Saved alue of IX
ld h, FRAME_IX+1(ix) ;
ld XCPT_IX(iy), l ; Offset 3: IX
ld XCPT_IX+1(iy), h ;
; Save IY at offset 4
ld l, FRAME_IY(ix) ; HL = Saved value of IY
ld h, FRAME_IY+1(ix) ;
ld XCPT_IY(iy), l ; Offset 4: IY
ld XCPT_IY+1(iy), h
; Save that stack pointer as it would be upon return in offset 5
ld hl, #SP_OFFSET ; Value of stack pointer on return
add hl, sp
ld XCPT_SP(iy), l ; Offset 5 SP
ld XCPT_SP+1(iy), h
; HL is saved as the value 1 at offset 6
xor a ; A = 0
ld XCPT_HL+1(iy), a ; Offset 2: HL on return (=1)
inc a ; A = 1
ld XCPT_HL(iy), a ;
; AF is not preserved (offset 7)
; Save the return address in offset 8
ld l, FRAME_RET(ix) ; HL = Saved return address
ld h, FRAME_RET+1(ix) ;
ld XCPT_PC(iy), l ; Offset 8: PC
ld XCPT_PC+1(iy), h
; Return the value 0
xor a ; HL = return value of zero
ld l, a
ld h, a
pop iy
pop ix
ret

192
nuttx/arch/z80/src/z180/z180_schedulesigaction.c Normal file
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/****************************************************************************
* arch/z80/src/z180/z180_schedulesigaction.c
*
* Copyright (C) 2012 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <sched.h>
#include <debug.h>
#include <nuttx/arch.h>
#include <arch/irq.h>
#include "chip/switch.h"
#include "os_internal.h"
#include "up_internal.h"
#ifndef CONFIG_DISABLE_SIGNALS
/****************************************************************************
* Private Definitions
****************************************************************************/
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: z180_sigsetup
****************************************************************************/
static void z180_sigsetup(FAR _TCB *tcb, sig_deliver_t sigdeliver, FAR chipreg_t *regs)
{
/* Save the return address and interrupt state. These will be restored by
* the signal trampoline after the signals have been delivered.
*/
tcb->xcp.sigdeliver = sigdeliver;
tcb->xcp.saved_pc = regs[XCPT_PC];
tcb->xcp.saved_i = regs[XCPT_I];
/* Then set up to vector to the trampoline with interrupts disabled */
regs[XCPT_PC] = (chipreg_t)up_sigdeliver;
regs[XCPT_I] = 0;
}
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: up_schedule_sigaction
*
* Description:
* This function is called by the OS when one or more
* signal handling actions have been queued for execution.
* The architecture specific code must configure things so
* that the 'igdeliver' callback is executed on the thread
* specified by 'tcb' as soon as possible.
*
* This function may be called from interrupt handling logic.
*
* This operation should not cause the task to be unblocked
* nor should it cause any immediate execution of sigdeliver.
* Typically, a few cases need to be considered:
*
* (1) This function may be called from an interrupt handler
* During interrupt processing, all xcptcontext structures
* should be valid for all tasks. That structure should
* be modified to invoke sigdeliver() either on return
* from (this) interrupt or on some subsequent context
* switch to the recipient task.
* (2) If not in an interrupt handler and the tcb is NOT
* the currently executing task, then again just modify
* the saved xcptcontext structure for the recipient
* task so it will invoke sigdeliver when that task is
* later resumed.
* (3) If not in an interrupt handler and the tcb IS the
* currently executing task -- just call the signal
* handler now.
*
****************************************************************************/
void up_schedule_sigaction(FAR _TCB *tcb, sig_deliver_t sigdeliver)
{
dbg("tcb=0x%p sigdeliver=0x%04x\n", tcb, (uint16_t)sigdeliver);
/* Refuse to handle nested signal actions */
if (tcb->xcp.sigdeliver == NULL)
{
irqstate_t flags;
/* Make sure that interrupts are disabled */
flags = irqsave();
/* First, handle some special cases when the signal is being delivered
* to the currently executing task.
*/
if (tcb == (FAR _TCB*)g_readytorun.head)
{
/* CASE 1: We are not in an interrupt handler and a task is
* signalling itself for some reason.
*/
if (!IN_INTERRUPT())
{
/* In this case just deliver the signal now. */
sigdeliver(tcb);
}
/* CASE 2: We are in an interrupt handler AND the interrupted task
* is the same as the one that must receive the signal, then we
* will have to modify the return state as well as the state in
* the TCB.
*/
else
{
/* Set up to vector to the trampoline with interrupts disabled. */
z180_sigsetup(tcb, sigdeliver, IRQ_STATE());
/* And make sure that the saved context in the TCB
* is the same as the interrupt return context.
*/
SAVE_IRQCONTEXT(tcb);
}
}
/* Otherwise, we are (1) signaling a task is not running from an interrupt
* handler or (2) we are not in an interrupt handler and the running task
* is signalling some non-running task.
*/
else
{
/* Set up to vector to the trampoline with interrupts disabled. */
z180_sigsetup(tcb, sigdeliver, tcb->xcp.regs);
}
irqrestore(flags);
}
}
#endif /* CONFIG_DISABLE_SIGNALS */

139
nuttx/arch/z80/src/z180/z180_sigdeliver.c Normal file
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/****************************************************************************
* arch/z80/src/z180/z180_sigdeliver.c
*
* Copyright (C) 2012 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <sched.h>
#include <debug.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include "chip/switch.h"
#include "os_internal.h"
#include "up_internal.h"
#ifndef CONFIG_DISABLE_SIGNALS
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: up_sigdeliver
*
* Description:
* This is the a signal handling trampoline. When a signal action was
* posted. The task context was mucked with and forced to branch to this
* location with interrupts disabled.
*
****************************************************************************/
void up_sigdeliver(void)
{
#ifndef CONFIG_DISABLE_SIGNALS
FAR _TCB *rtcb = (_TCB*)g_readytorun.head;
chipreg_t regs[XCPTCONTEXT_REGS];
sig_deliver_t sigdeliver;
/* Save the errno. This must be preserved throughout the signal handling
* so that the user code final gets the correct errno value (probably
* EINTR).
*/
int saved_errno = rtcb->pterrno;
up_ledon(LED_SIGNAL);
sdbg("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
rtcb, rtcb->xcp.sigdeliver, rtcb->sigpendactionq.head);
ASSERT(rtcb->xcp.sigdeliver != NULL);
/* Save the real return state on the stack. */
z180_copystate(regs, rtcb->xcp.regs);
regs[XCPT_PC] = rtcb->xcp.saved_pc;
regs[XCPT_I] = rtcb->xcp.saved_i;
/* Get a local copy of the sigdeliver function pointer. We do this so
* that we can nullify the sigdeliver function pointer in the TCB and
* accept more signal deliveries while processing the current pending
* signals.
*/
sigdeliver = rtcb->xcp.sigdeliver;
rtcb->xcp.sigdeliver = NULL;
/* Then restore the task interrupt state. */
irqrestore(regs[XCPT_I]);
/* Deliver the signals */
sigdeliver(rtcb);
/* Output any debug messages BEFORE restoring errno (because they may
* alter errno), then disable interrupts again and restore the original
* errno that is needed by the user logic (it is probably EINTR).
*/
sdbg("Resuming\n");
(void)irqsave();
rtcb->pterrno = saved_errno;
/* Then restore the correct state for this thread of execution. */
up_ledoff(LED_SIGNAL);
z180_restoreusercontext(regs);
#endif
}
#endif /* CONFIG_DISABLE_SIGNALS */

52
nuttx/arch/z80/src/z80/chip.h
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@ -1,6 +1,6 @@
/************************************************************************************
* z80/chip.h
* chip/chip.h
* arch/z80/src/z80/chip.h
* arch/z80/src/chip/chip.h
*
* Copyright (C) 2007-2009 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@ -34,59 +34,21 @@
*
************************************************************************************/
#ifndef __Z80_CHIP_H
#define __Z80_CHIP_H
#ifndef __ARCH_Z80_SRC_Z80_CHIP_H
#define __ARCH_Z80_SRC_Z80_CHIP_H
/************************************************************************************
* Included Files
************************************************************************************/
#ifndef __ASSEMBLY__
# include <stdint.h>
#endif
#include <arch/z80/chip.h>
/************************************************************************************
* Definitions
* Pre-processor Definitions
************************************************************************************/
/* Bits in the Z80 FLAGS register ***************************************************/
#define Z80_C_FLAG 0x01 /* Bit 0: Carry flag */
#define Z80_N_FLAG 0x02 /* Bit 1: Add/Subtract flag */
#define Z80_PV_FLAG 0x04 /* Bit 2: Parity/Overflow flag */
#define Z80_H_FLAG 0x10 /* Bit 4: Half carry flag */
#define Z80_Z_FLAG 0x40 /* Bit 5: Zero flag */
#define Z80_S_FLAG 0x80 /* Bit 7: Sign flag */
/* Register access macros ***********************************************************/
#ifndef __ASSEMBLY__
# define getreg8(a) (*(volatile uint8_t *)(a))
# define putreg8(v,a) (*(volatile uint8_t *)(a) = (v))
# define getreg16(a) (*(volatile uint16_t *)(a))
# define putreg16(v,a) (*(volatile uint16_t *)(a) = (v))
# define getreg32(a) (*(volatile uint32_t *)(a))
# define putreg32(v,a) (*(volatile uint32_t *)(a) = (v))
#endif
/************************************************************************************
* Public Function Prototypes
************************************************************************************/
#ifndef __ASSEMBLY__
#ifdef __cplusplus
#define EXTERN extern "C"
extern "C" {
#else
#define EXTERN extern
#endif
#undef EXTERN
#ifdef __cplusplus
}
#endif
#endif
#endif /* __Z80_CHIP_H */
#endif /* __ARCH_Z80_SRC_Z80_CHIP_H */