fmuv5x:Use ADC3 for HW VER/REV detection

fmu-v5x:hrt needs to be running for ADC time out

       Fixes bug introduced in 320d2e adding platform layer.
This commit is contained in:
David Sidrane 2019-08-06 04:29:46 -07:00 committed by Daniel Agar
parent 890f805b37
commit 5a1c46deeb
3 changed files with 13 additions and 4 deletions

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@ -162,6 +162,7 @@ CONFIG_START_DAY=30
CONFIG_START_MONTH=11 CONFIG_START_MONTH=11
CONFIG_STDIO_BUFFER_SIZE=32 CONFIG_STDIO_BUFFER_SIZE=32
CONFIG_STM32F7_ADC1=y CONFIG_STM32F7_ADC1=y
CONFIG_STM32F7_ADC3=y
CONFIG_STM32F7_BBSRAM=y CONFIG_STM32F7_BBSRAM=y
CONFIG_STM32F7_BBSRAM_FILES=5 CONFIG_STM32F7_BBSRAM_FILES=5
CONFIG_STM32F7_BKPSRAM=y CONFIG_STM32F7_BKPSRAM=y

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@ -318,6 +318,7 @@
#define ADC_ADC1_6V6_CHANNEL /* PC0 */ ADC1_CH(10) #define ADC_ADC1_6V6_CHANNEL /* PC0 */ ADC1_CH(10)
#define ADC_SCALED_VDD_3V3_SENSORS4_CHANNEL /* PC2 */ ADC1_CH(12) #define ADC_SCALED_VDD_3V3_SENSORS4_CHANNEL /* PC2 */ ADC1_CH(12)
#define ADC_ADC1_3V3_CHANNEL /* PC3 */ ADC1_CH(13) #define ADC_ADC1_3V3_CHANNEL /* PC3 */ ADC1_CH(13)
#define ADC_HW_VER_SENSE_CHANNEL /* PF4 */ ADC3_CH(14) #define ADC_HW_VER_SENSE_CHANNEL /* PF4 */ ADC3_CH(14)
#define ADC_HW_REV_SENSE_CHANNEL /* PF5 */ ADC3_CH(15) #define ADC_HW_REV_SENSE_CHANNEL /* PF5 */ ADC3_CH(15)
@ -328,12 +329,16 @@
(1 << ADC_SCALED_V5_CHANNEL) | \ (1 << ADC_SCALED_V5_CHANNEL) | \
(1 << ADC_ADC1_6V6_CHANNEL) | \ (1 << ADC_ADC1_6V6_CHANNEL) | \
(1 << ADC_SCALED_VDD_3V3_SENSORS4_CHANNEL) | \ (1 << ADC_SCALED_VDD_3V3_SENSORS4_CHANNEL) | \
(1 << ADC_ADC1_3V3_CHANNEL) | \ (1 << ADC_ADC1_3V3_CHANNEL))
(1 << ADC_HW_VER_SENSE_CHANNEL) | \
(1 << ADC_HW_REV_SENSE_CHANNEL))
/* HW has to large of R termination on ADC todo:change when HW value is chosen */ /* HW has to large of R termination on ADC todo:change when HW value is chosen */
#define HW_REV_VER_ADC_BASE STM32_ADC3_BASE
#define SYSTEM_ADC_BASE STM32_ADC1_BASE
#define BOARD_ADC_OPEN_CIRCUIT_V (5.6f) #define BOARD_ADC_OPEN_CIRCUIT_V (5.6f)
/* HW Version and Revision drive signals Default to 1 to detect */ /* HW Version and Revision drive signals Default to 1 to detect */

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@ -222,6 +222,10 @@ __EXPORT int board_app_initialize(uintptr_t arg)
VDD_3V3_SENSORS4_EN(true); VDD_3V3_SENSORS4_EN(true);
VDD_3V3_SPEKTRUM_POWER_EN(true); VDD_3V3_SPEKTRUM_POWER_EN(true);
/* Need hrt running before using the ADC */
px4_platform_init();
if (OK == board_determine_hw_info()) { if (OK == board_determine_hw_info()) {
syslog(LOG_INFO, "[boot] Rev 0x%1x : Ver 0x%1x %s\n", board_get_hw_revision(), board_get_hw_version(), syslog(LOG_INFO, "[boot] Rev 0x%1x : Ver 0x%1x %s\n", board_get_hw_revision(), board_get_hw_version(),
@ -231,7 +235,6 @@ __EXPORT int board_app_initialize(uintptr_t arg)
syslog(LOG_ERR, "[boot] Failed to read HW revision and version\n"); syslog(LOG_ERR, "[boot] Failed to read HW revision and version\n");
} }
px4_platform_init();
/* configure the DMA allocator */ /* configure the DMA allocator */