forked from Archive/PX4-Autopilot
fmuv5x:Use ADC3 for HW VER/REV detection
fmu-v5x:hrt needs to be running for ADC time out Fixes bug introduced in 320d2e adding platform layer.
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890f805b37
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@ -162,6 +162,7 @@ CONFIG_START_DAY=30
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CONFIG_START_MONTH=11
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CONFIG_STDIO_BUFFER_SIZE=32
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CONFIG_STM32F7_ADC1=y
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CONFIG_STM32F7_ADC3=y
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CONFIG_STM32F7_BBSRAM=y
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CONFIG_STM32F7_BBSRAM_FILES=5
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CONFIG_STM32F7_BKPSRAM=y
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@ -318,6 +318,7 @@
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#define ADC_ADC1_6V6_CHANNEL /* PC0 */ ADC1_CH(10)
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#define ADC_SCALED_VDD_3V3_SENSORS4_CHANNEL /* PC2 */ ADC1_CH(12)
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#define ADC_ADC1_3V3_CHANNEL /* PC3 */ ADC1_CH(13)
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#define ADC_HW_VER_SENSE_CHANNEL /* PF4 */ ADC3_CH(14)
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#define ADC_HW_REV_SENSE_CHANNEL /* PF5 */ ADC3_CH(15)
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@ -328,12 +329,16 @@
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(1 << ADC_SCALED_V5_CHANNEL) | \
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(1 << ADC_ADC1_6V6_CHANNEL) | \
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(1 << ADC_SCALED_VDD_3V3_SENSORS4_CHANNEL) | \
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(1 << ADC_ADC1_3V3_CHANNEL) | \
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(1 << ADC_HW_VER_SENSE_CHANNEL) | \
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(1 << ADC_HW_REV_SENSE_CHANNEL))
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(1 << ADC_ADC1_3V3_CHANNEL))
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/* HW has to large of R termination on ADC todo:change when HW value is chosen */
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#define HW_REV_VER_ADC_BASE STM32_ADC3_BASE
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#define SYSTEM_ADC_BASE STM32_ADC1_BASE
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#define BOARD_ADC_OPEN_CIRCUIT_V (5.6f)
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/* HW Version and Revision drive signals Default to 1 to detect */
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@ -222,6 +222,10 @@ __EXPORT int board_app_initialize(uintptr_t arg)
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VDD_3V3_SENSORS4_EN(true);
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VDD_3V3_SPEKTRUM_POWER_EN(true);
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/* Need hrt running before using the ADC */
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px4_platform_init();
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if (OK == board_determine_hw_info()) {
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syslog(LOG_INFO, "[boot] Rev 0x%1x : Ver 0x%1x %s\n", board_get_hw_revision(), board_get_hw_version(),
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@ -231,7 +235,6 @@ __EXPORT int board_app_initialize(uintptr_t arg)
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syslog(LOG_ERR, "[boot] Failed to read HW revision and version\n");
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}
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px4_platform_init();
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/* configure the DMA allocator */
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