forked from Archive/PX4-Autopilot
STM32 WWDG watchdog driver works
git-svn-id: https://nuttx.svn.sourceforge.net/svnroot/nuttx/trunk@4618 7fd9a85b-ad96-42d3-883c-3090e2eb8679
This commit is contained in:
patacongo
parent
e1920cbcb3
commit
55d814ce2d
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@ -110,14 +110,14 @@
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#define WWDG_CR_T_SHIFT (0) /* Bits 6:0 T[6:0]: 7-bit counter (MSB to LSB) */
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#define WWDG_CR_T_MASK (0x7f << WWDG_CR_T_SHIFT)
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# define WWDG_CR_T_MAX (0x3f << WWDG_CR_T_SHIFT)
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# define WWDG_CR_T_RESET (0x40 << WWDG_CR_T_SHIFT)
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#define WWDG_CR_WDGA (1 << 7) /* Bit 7: Activation bit */
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/* Configuration register (32-bit) */
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#define WWDG_CFR_W_SHIFT (0) /* Bits 6:0 W[6:0] 7-bit window value */
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#define WWDG_CFR_W_MASK (0x7f << WWDG_CFR_W_SHIFT)
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# define WWDG_CFR_W_MAX (0x3f << WWDG_CFR_W_SHIFT)
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# define WWDG_CFR_W_RESET (0x40 << WWDG_CFR_W_SHIFT)
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#define WWDG_CFR_WDGTB_SHIFT (7) /* Bits 8:7 [1:0]: Timer Base */
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#define WWDG_CFR_WDGTB_MASK (3 << WWDG_CFR_WDGTB_SHIFT)
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# define WWDG_CFR_PCLK1 (0 << WWDG_CFR_WDGTB_SHIFT) /* 00: CK Counter Clock (PCLK1 div 4096) div 1 */
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@ -61,6 +61,20 @@
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# define CONFIG_STM32_IWDG_DEFTIMOUT 3000 /* Three seconds */
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#endif
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/* Debug ********************************************************************/
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/* Non-standard debug that may be enabled just for testing the watchdog
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* driver. NOTE: that only lldbg types are used so that the output is
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* immediately available.
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*/
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#ifdef CONFIG_DEBUG_WATCHDOG
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# define wddbg lldbg
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# define wdvdbg llvdbg
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#else
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# define wddbg(x...)
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# define wdvdbg(x...)
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#endif
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/****************************************************************************
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* Private Types
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****************************************************************************/
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@ -42,6 +42,7 @@
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#include <stdint.h>
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#include <errno.h>
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#include <debug.h>
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#include <nuttx/watchdog.h>
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#include <arch/board/board.h>
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@ -55,12 +56,43 @@
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/****************************************************************************
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* Pre-Processor Definitions
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****************************************************************************/
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/* Clocking *****************************************************************/
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/* The minimum frequency of the WWD clock is:
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*
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* Fmin = PCLK1 / 4096 / 8
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*
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* So the maximum delay (in milliseconds) is then:
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*
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* 1000 * (WWDG_CR_T_MAX+1) / Fmin
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*
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* For example, if PCLK1 = 42MHz, then the maximum delay is:
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*
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* Fmin = 1281.74
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* 1000 * 64 / Fmin = 49.93 msec
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*/
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#define WWDG_FMIN (STM32_PCLK1_FREQUENCY / 4096 / 8)
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#define WWDG_MAXTIMEOUT (1000 * (WWDG_CR_T_MAX+1) / WWDG_FMIN)
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/* Configuration ************************************************************/
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#ifndef CONFIG_STM32_WWDG_DEFTIMOUT
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# define CONFIG_STM32_WWDG_DEFTIMOUT 3000 /* Three seconds */
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# define CONFIG_STM32_WWDG_DEFTIMOUT WWDG_MAXTIMEOUT
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#endif
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/* Debug ********************************************************************/
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/* Non-standard debug that may be enabled just for testing the watchdog
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* driver. NOTE: that only lldbg types are used so that the output is
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* immediately available.
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*/
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#ifdef CONFIG_DEBUG_WATCHDOG
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# define wddbg lldbg
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# define wdvdbg llvdbg
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#else
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# define wddbg(x...)
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# define wdvdbg(x...)
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#endif
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/****************************************************************************
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* Private Types
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@ -147,10 +179,10 @@ static struct stm32_lowerhalf_s g_wdgdev;
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****************************************************************************/
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#if defined(CONFIG_STM32_WWDG_REGDEBUG) && defined(CONFIG_DEBUG)
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static uint16_t stm32_getreg(uint16_t addr)
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static uint16_t stm32_getreg(uint32_t addr)
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{
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static uint16_t prevaddr = 0;
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static uint16_t count = 0;
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static uint32_t prevaddr = 0;
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static uint32_t count = 0;
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static uint16_t preval = 0;
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/* Read the value from the register */
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@ -314,14 +346,15 @@ static int stm32_start(FAR struct watchdog_lowerhalf_s *lower)
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{
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FAR struct stm32_lowerhalf_s *priv = (FAR struct stm32_lowerhalf_s *)lower;
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wdvdbg("Entry\n");
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DEBUGASSERT(priv);
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/* The watchdog is always disabled after a reset. It is enabled by setting
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* the WDGA bit in the WWDG_CR register, then it cannot be disabled again
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* except by a reset.
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*/
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DEBUGASSERT(priv);
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stm32_putreg(WWDG_CR_WDGA | WWDG_CFR_W_RESET | priv->reload, STM32_WWDG_CR);
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stm32_putreg(WWDG_CR_WDGA | WWDG_CR_T_RESET | priv->reload, STM32_WWDG_CR);
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priv->started = true;
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return OK;
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}
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@ -348,6 +381,7 @@ static int stm32_stop(FAR struct watchdog_lowerhalf_s *lower)
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* except by a reset.
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*/
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wdvdbg("Entry\n");
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return -ENOSYS;
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}
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@ -378,13 +412,14 @@ static int stm32_keepalive(FAR struct watchdog_lowerhalf_s *lower)
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{
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FAR struct stm32_lowerhalf_s *priv = (FAR struct stm32_lowerhalf_s *)lower;
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wdvdbg("Entry\n");
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DEBUGASSERT(priv);
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/* Write to T[6:0] bits to configure the counter value, no need to do
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* a read-modify-write; writing a 0 to WDGA bit does nothing.
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*/
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stm32_putreg((WWDG_CFR_W_RESET | priv->reload), STM32_WWDG_CR);
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stm32_putreg((WWDG_CR_T_RESET | priv->reload), STM32_WWDG_CR);
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return OK;
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}
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@ -411,6 +446,7 @@ static int stm32_getstatus(FAR struct watchdog_lowerhalf_s *lower,
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uint32_t elapsed;
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uint16_t reload;
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wdvdbg("Entry\n");
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DEBUGASSERT(priv);
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/* Return the status bit */
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@ -436,6 +472,10 @@ static int stm32_getstatus(FAR struct watchdog_lowerhalf_s *lower,
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elapsed = priv->reload - reload;
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status->timeleft = (priv->timeout * elapsed) / (priv->reload + 1);
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wdvdbg("Status :\n");
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wdvdbg(" flags : %08x\n", status->flags);
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wdvdbg(" timeout : %d\n", status->timeout);
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wdvdbg(" timeleft : %d\n", status->flags);
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return OK;
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}
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@ -459,20 +499,30 @@ static int stm32_settimeout(FAR struct watchdog_lowerhalf_s *lower,
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uint32_t timeout)
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{
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FAR struct stm32_lowerhalf_s *priv = (FAR struct stm32_lowerhalf_s *)lower;
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DEBUGASSERT(priv);
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uint32_t fwwdg;
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uint32_t reload;
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uint16_t regval;
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int wdgtb;
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/* Determine prescaler value.
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DEBUGASSERT(priv);
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wdvdbg("Entry: timeout=%d\n", timeout);
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/* Can this timeout be represented? */
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if (timeout < 1 || timeout > WWDG_MAXTIMEOUT)
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{
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wddbg("Cannot represent timeout=%d > %d\n",
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timeout, WWDG_MAXTIMEOUT);
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return -ERANGE;
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}
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/* Determine prescaler value.
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*
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* Fwwdg = PCLK1/4096/prescaler.
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*
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* Where
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* Fwwwdg is the frequency of the WWDG clock
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* prescaler is one of {1, 2, 4, or 8}
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* wdgtb is one of {1, 2, 4, or 8}
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*/
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/* Select the smallest prescaler that will result in a reload field value that is
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@ -509,7 +559,11 @@ static int stm32_settimeout(FAR struct watchdog_lowerhalf_s *lower,
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* settings.
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*/
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if (reload <= WWDG_CFR_W_MAX || wdgtb == 3)
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#if 0
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wdvdbg("wdgtb=%d fwwdg=%d reload=%d timout=%d\n",
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wdgtb, fwwdg, reload, 1000 * (reload + 1) / fwwdg);
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#endif
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if (reload <= WWDG_CR_T_MAX || wdgtb == 3)
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{
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/* Note that we explicity break out of the loop rather than using
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* the 'for' loop termination logic because we do not want the
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@ -522,9 +576,9 @@ static int stm32_settimeout(FAR struct watchdog_lowerhalf_s *lower,
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/* Make sure that the final reload value is within range */
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if (reload > WWDG_CFR_W_MAX)
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if (reload > WWDG_CR_T_MAX)
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{
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reload = WWDG_CFR_W_MAX;
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reload = WWDG_CR_T_MAX;
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}
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/* Calculate and save the actual timeout value in milliseconds:
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@ -538,11 +592,14 @@ static int stm32_settimeout(FAR struct watchdog_lowerhalf_s *lower,
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priv->fwwdg = fwwdg;
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priv->reload = reload;
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wdvdbg("wdgtb=%d fwwdg=%d reload=%d timout=%d\n",
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wdgtb, fwwdg, reload, priv->timeout);
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/* Set WDGTB[1:0] bits according to calculated value */
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regval = stm32_getreg(STM32_WWDG_CFR);
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regval &= WWDG_CFR_WDGTB_MASK;
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regval &= ~WWDG_CFR_WDGTB_MASK;
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regval |= (uint16_t)wdgtb << WWDG_CFR_WDGTB_SHIFT;
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stm32_putreg(regval, STM32_WWDG_CFR);
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@ -585,6 +642,7 @@ static xcpt_t stm32_capture(FAR struct watchdog_lowerhalf_s *lower,
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uint16_t regval;
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DEBUGASSERT(priv);
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wdvdbg("Entry: handler=%p\n", handler);
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/* Get the old handler return value */
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@ -648,6 +706,7 @@ static int stm32_ioctl(FAR struct watchdog_lowerhalf_s *lower, int cmd,
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int ret = -ENOTTY;
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DEBUGASSERT(priv);
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wdvdbg("Entry: cmd=%d arg=%ld\n", cmd, arg);
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/* WDIOC_MINTIME: Set the minimum ping time. If two keepalive ioctls
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* are received within this time, a reset event will be generated.
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@ -658,14 +717,16 @@ static int stm32_ioctl(FAR struct watchdog_lowerhalf_s *lower, int cmd,
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{
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uint32_t mintime = (uint32_t)arg;
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/* The minimum time should be strictly less than the total delay */
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/* The minimum time should be strictly less than the total delay
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* which, in turn, will be less than or equal to WWDG_CR_T_MAX
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*/
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ret = -EINVAL;
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if (mintime < priv->timeout)
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{
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uint32_t window = (priv->timeout - mintime) * priv->fwwdg / 1000 - 1;
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DEBUGASSERT(window < priv->reload);
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stm32_setwindow(priv, window | WWDG_CFR_W_RESET);
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stm32_setwindow(priv, window | WWDG_CR_T_RESET);
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ret = OK;
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}
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}
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@ -698,6 +759,8 @@ void stm32_wwdginitialize(FAR const char *devpath)
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{
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FAR struct stm32_lowerhalf_s *priv = &g_wdgdev;
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wdvdbg("Entry: devpath=%s\n", devpath);
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/* NOTE we assume that clocking to the IWDG has already been provided by
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* the RCC initialization logic.
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*/
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@ -0,0 +1,136 @@
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/************************************************************************************
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* configs/stm3240g-eval/src/up_watchdog.c
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* arch/arm/src/board/up_watchdog.c
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*
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* Copyright (C) 2012 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include <nuttx/config.h>
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#include <errno.h>
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#include <debug.h>
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#include <nuttx/watchdog.h>
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#include <arch/board/board.h>
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#include "stm32_wdg.h"
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#ifdef CONFIG_WATCHDOG
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/************************************************************************************
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* Definitions
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************************************************************************************/
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/* Configuration *******************************************************************/
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/* Wathdog hardware should be enabled */
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#if !defined(CONFIG_STM32_WWDG) && !defined(CONFIG_STM32_IWDG)
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# warning "One of CONFIG_STM32_WWDG or CONFIG_STM32_IWDG must be defined"
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#endif
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/* Select the path to the registered watchdog timer device */
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#ifndef CONFIG_STM32_WDG_DEVPATH
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# ifdef CONFIG_EXAMPLES_WATCHDOG_DEVPATH
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# define CONFIG_STM32_WDG_DEVPATH CONFIG_EXAMPLES_WATCHDOG_DEVPATH
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# else
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# define CONFIG_STM32_WDG_DEVPATH "/dev/watchdog0"
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# endif
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#endif
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/* Use the un-calibrated LSI frequency if we have nothing better */
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#if defined(CONFIG_STM32_IWDG) && !defined(CONFIG_STM32_LSIFREQ)
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# define CONFIG_STM32_LSIFREQ STM32_LSI_FREQUENCY
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#endif
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/* Debug ***************************************************************************/
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/* Non-standard debug that may be enabled just for testing the watchdog timer */
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#ifndef CONFIG_DEBUG
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# undef CONFIG_DEBUG_WATCHDOG
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#endif
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#ifdef CONFIG_DEBUG_WATCHDOG
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# define wdgdbg dbg
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# define wdglldbg lldbg
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# ifdef CONFIG_DEBUG_VERBOSE
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# define wdgvdbg vdbg
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# define wdgllvdbg llvdbg
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# else
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# define wdgvdbg(x...)
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# define wdgllvdbg(x...)
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# endif
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#else
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# define wdgdbg(x...)
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# define wdglldbg(x...)
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# define wdgvdbg(x...)
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# define wdgllvdbg(x...)
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#endif
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/************************************************************************************
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* Private Functions
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************************************************************************************/
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/************************************************************************************
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* Public Functions
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************************************************************************************/
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/****************************************************************************
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* Name: up_wdginitialize()
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*
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* Description:
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* Perform architecuture-specific initialization of the Watchdog hardware.
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* This interface must be provided by all configurations using
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* apps/examples/watchdog
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*
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****************************************************************************/
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int up_wdginitialize(void)
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{
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/* Initialize tha register the watchdog timer device */
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#if defined(CONFIG_STM32_WWDG)
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stm32_wwdginitialize(CONFIG_STM32_WDG_DEVPATH);
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return OK;
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#elif defined(CONFIG_STM32_IWDG)
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stm32_iwdginitialize(CONFIG_STM32_WDG_DEVPATH, CONFIG_STM32_LSIFREQ);
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return OK;
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#else
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return -ENODEV;
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#endif
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}
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#endif /* CONFIG_WATCHDOG */
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@ -60,7 +60,7 @@
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* Pre-processor Definitions
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****************************************************************************/
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/* Debug ********************************************************************/
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/* Non-standard debug that may be enabled just for testing PWM */
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/* Non-standard debug that may be enabled just for testing the watchdog driver */
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#ifdef CONFIG_DEBUG_WATCHDOG
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# define wddbg dbg
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@ -478,7 +478,7 @@ FAR void *watchdog_register(FAR const char *path,
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int ret;
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DEBUGASSERT(path && lower);
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wdvdbg("Registering: %s\n", path);
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wdvdbg("Entry: path=%s\n", path);
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/* Allocate the upper-half data structure */
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|
|
@ -508,7 +508,6 @@ FAR void *watchdog_register(FAR const char *path,
|
|||
|
||||
/* Register the watchdog timer device */
|
||||
|
||||
wdvdbg("Registering %s\n", path);
|
||||
ret = register_driver(path, &g_wdogops, 0666, upper);
|
||||
if (ret < 0)
|
||||
{
|
||||
|
|
|
|||
Loading…
Reference in New Issue