diff --git a/boards/ark/fmu-v6x/nuttx-config/include/board.h b/boards/ark/fmu-v6x/nuttx-config/include/board.h index c3aa8d3685..fa82671a82 100644 --- a/boards/ark/fmu-v6x/nuttx-config/include/board.h +++ b/boards/ark/fmu-v6x/nuttx-config/include/board.h @@ -248,7 +248,7 @@ /* ADC 1 2 3 clock source */ -#define STM32_RCC_D3CCIPR_ADCSEL RCC_D3CCIPR_ADCSEL_PLL2 +#define STM32_RCC_D3CCIPR_ADCSRC RCC_D3CCIPR_ADCSEL_PLL2 /* FDCAN 1 2 clock source */ diff --git a/boards/cuav/nora/nuttx-config/include/board.h b/boards/cuav/nora/nuttx-config/include/board.h index ad4b16fbd5..9aaf12fcda 100644 --- a/boards/cuav/nora/nuttx-config/include/board.h +++ b/boards/cuav/nora/nuttx-config/include/board.h @@ -192,7 +192,7 @@ #define STM32_RCC_D2CCIP1R_SPI45SRC RCC_D2CCIP1R_SPI45SEL_PLL2 /* SPI45 clock source */ #define STM32_RCC_D3CCIPR_SPI6SRC RCC_D3CCIPR_SPI6SEL_PLL2 /* SPI6 clock source */ #define STM32_RCC_D2CCIP2R_USBSRC RCC_D2CCIP2R_USBSEL_PLL3 /* USB 1 and 2 clock source */ -#define STM32_RCC_D3CCIPR_ADCSEL RCC_D3CCIPR_ADCSEL_PLL2 /* ADC 1 2 3 clock source */ +#define STM32_RCC_D3CCIPR_ADCSRC RCC_D3CCIPR_ADCSEL_PLL2 /* ADC 1 2 3 clock source */ #define STM32_RCC_D2CCIP1R_FDCANSEL RCC_D2CCIP1R_FDCANSEL_HSE /* FDCAN 1 2 clock source */ #define STM32_FDCANCLK STM32_HSE_FREQUENCY diff --git a/boards/cuav/x7pro/nuttx-config/include/board.h b/boards/cuav/x7pro/nuttx-config/include/board.h index ad4b16fbd5..9aaf12fcda 100644 --- a/boards/cuav/x7pro/nuttx-config/include/board.h +++ b/boards/cuav/x7pro/nuttx-config/include/board.h @@ -192,7 +192,7 @@ #define STM32_RCC_D2CCIP1R_SPI45SRC RCC_D2CCIP1R_SPI45SEL_PLL2 /* SPI45 clock source */ #define STM32_RCC_D3CCIPR_SPI6SRC RCC_D3CCIPR_SPI6SEL_PLL2 /* SPI6 clock source */ #define STM32_RCC_D2CCIP2R_USBSRC RCC_D2CCIP2R_USBSEL_PLL3 /* USB 1 and 2 clock source */ -#define STM32_RCC_D3CCIPR_ADCSEL RCC_D3CCIPR_ADCSEL_PLL2 /* ADC 1 2 3 clock source */ +#define STM32_RCC_D3CCIPR_ADCSRC RCC_D3CCIPR_ADCSEL_PLL2 /* ADC 1 2 3 clock source */ #define STM32_RCC_D2CCIP1R_FDCANSEL RCC_D2CCIP1R_FDCANSEL_HSE /* FDCAN 1 2 clock source */ #define STM32_FDCANCLK STM32_HSE_FREQUENCY diff --git a/boards/cubepilot/cubeorange/nuttx-config/include/board.h b/boards/cubepilot/cubeorange/nuttx-config/include/board.h index 3a4abd0235..5827b1bc81 100644 --- a/boards/cubepilot/cubeorange/nuttx-config/include/board.h +++ b/boards/cubepilot/cubeorange/nuttx-config/include/board.h @@ -192,7 +192,7 @@ #define STM32_RCC_D2CCIP2R_USBSRC RCC_D2CCIP2R_USBSEL_PLL3 /* USB 1 and 2 clock source */ #define STM32_RCC_D2CCIP1R_FDCANSEL RCC_D2CCIP1R_FDCANSEL_HSE /* FDCAN 1 2 clock source */ -#define STM32_RCC_D3CCIPR_ADCSEL RCC_D3CCIPR_ADCSEL_PLL2 /* ADC 1 2 3 clock source */ +#define STM32_RCC_D3CCIPR_ADCSRC RCC_D3CCIPR_ADCSEL_PLL2 /* ADC 1 2 3 clock source */ /* FLASH wait states */ #define BOARD_FLASH_WAITSTATES 2 diff --git a/boards/cubepilot/cubeorangeplus/nuttx-config/include/board.h b/boards/cubepilot/cubeorangeplus/nuttx-config/include/board.h index 00a886d086..d650c61691 100644 --- a/boards/cubepilot/cubeorangeplus/nuttx-config/include/board.h +++ b/boards/cubepilot/cubeorangeplus/nuttx-config/include/board.h @@ -193,7 +193,7 @@ #define STM32_RCC_D2CCIP2R_USBSRC RCC_D2CCIP2R_USBSEL_PLL3 /* USB 1 and 2 clock source */ #define STM32_RCC_D2CCIP1R_FDCANSEL RCC_D2CCIP1R_FDCANSEL_HSE /* FDCAN 1 2 clock source */ -#define STM32_RCC_D3CCIPR_ADCSEL RCC_D3CCIPR_ADCSEL_PLL2 /* ADC 1 2 3 clock source */ +#define STM32_RCC_D3CCIPR_ADCSRC RCC_D3CCIPR_ADCSEL_PLL2 /* ADC 1 2 3 clock source */ /* FLASH wait states */ #define BOARD_FLASH_WAITSTATES 2 diff --git a/boards/holybro/durandal-v1/nuttx-config/include/board.h b/boards/holybro/durandal-v1/nuttx-config/include/board.h index 2a475b7b49..e1f43bf7b9 100644 --- a/boards/holybro/durandal-v1/nuttx-config/include/board.h +++ b/boards/holybro/durandal-v1/nuttx-config/include/board.h @@ -248,7 +248,7 @@ /* ADC 1 2 3 clock source */ -#define STM32_RCC_D3CCIPR_ADCSEL RCC_D3CCIPR_ADCSEL_PLL2 +#define STM32_RCC_D3CCIPR_ADCSRC RCC_D3CCIPR_ADCSEL_PLL2 /* FDCAN 1 2 clock source */ diff --git a/boards/holybro/kakuteh7/nuttx-config/include/board.h b/boards/holybro/kakuteh7/nuttx-config/include/board.h index 83245ff925..4d3ed5eb47 100644 --- a/boards/holybro/kakuteh7/nuttx-config/include/board.h +++ b/boards/holybro/kakuteh7/nuttx-config/include/board.h @@ -245,7 +245,7 @@ /* ADC 1 2 3 clock source */ -#define STM32_RCC_D3CCIPR_ADCSEL RCC_D3CCIPR_ADCSEL_PLL2 +#define STM32_RCC_D3CCIPR_ADCSRC RCC_D3CCIPR_ADCSEL_PLL2 /* FDCAN 1 2 clock source */ diff --git a/boards/holybro/kakuteh7mini/nuttx-config/include/board.h b/boards/holybro/kakuteh7mini/nuttx-config/include/board.h index 83245ff925..4d3ed5eb47 100644 --- a/boards/holybro/kakuteh7mini/nuttx-config/include/board.h +++ b/boards/holybro/kakuteh7mini/nuttx-config/include/board.h @@ -245,7 +245,7 @@ /* ADC 1 2 3 clock source */ -#define STM32_RCC_D3CCIPR_ADCSEL RCC_D3CCIPR_ADCSEL_PLL2 +#define STM32_RCC_D3CCIPR_ADCSRC RCC_D3CCIPR_ADCSEL_PLL2 /* FDCAN 1 2 clock source */ diff --git a/boards/holybro/kakuteh7v2/nuttx-config/include/board.h b/boards/holybro/kakuteh7v2/nuttx-config/include/board.h index 83245ff925..4d3ed5eb47 100644 --- a/boards/holybro/kakuteh7v2/nuttx-config/include/board.h +++ b/boards/holybro/kakuteh7v2/nuttx-config/include/board.h @@ -245,7 +245,7 @@ /* ADC 1 2 3 clock source */ -#define STM32_RCC_D3CCIPR_ADCSEL RCC_D3CCIPR_ADCSEL_PLL2 +#define STM32_RCC_D3CCIPR_ADCSRC RCC_D3CCIPR_ADCSEL_PLL2 /* FDCAN 1 2 clock source */ diff --git a/boards/matek/h743-mini/nuttx-config/include/board.h b/boards/matek/h743-mini/nuttx-config/include/board.h index 4bf2b6e45e..f8afe3e6b8 100644 --- a/boards/matek/h743-mini/nuttx-config/include/board.h +++ b/boards/matek/h743-mini/nuttx-config/include/board.h @@ -248,7 +248,7 @@ /* ADC 1 2 3 clock source */ -#define STM32_RCC_D3CCIPR_ADCSEL RCC_D3CCIPR_ADCSEL_PLL2 +#define STM32_RCC_D3CCIPR_ADCSRC RCC_D3CCIPR_ADCSEL_PLL2 /* FDCAN 1 clock source */ diff --git a/boards/matek/h743-slim/nuttx-config/include/board.h b/boards/matek/h743-slim/nuttx-config/include/board.h index 4bf2b6e45e..f8afe3e6b8 100644 --- a/boards/matek/h743-slim/nuttx-config/include/board.h +++ b/boards/matek/h743-slim/nuttx-config/include/board.h @@ -248,7 +248,7 @@ /* ADC 1 2 3 clock source */ -#define STM32_RCC_D3CCIPR_ADCSEL RCC_D3CCIPR_ADCSEL_PLL2 +#define STM32_RCC_D3CCIPR_ADCSRC RCC_D3CCIPR_ADCSEL_PLL2 /* FDCAN 1 clock source */ diff --git a/boards/matek/h743/nuttx-config/include/board.h b/boards/matek/h743/nuttx-config/include/board.h index 4bf2b6e45e..f8afe3e6b8 100644 --- a/boards/matek/h743/nuttx-config/include/board.h +++ b/boards/matek/h743/nuttx-config/include/board.h @@ -248,7 +248,7 @@ /* ADC 1 2 3 clock source */ -#define STM32_RCC_D3CCIPR_ADCSEL RCC_D3CCIPR_ADCSEL_PLL2 +#define STM32_RCC_D3CCIPR_ADCSRC RCC_D3CCIPR_ADCSEL_PLL2 /* FDCAN 1 clock source */ diff --git a/boards/modalai/fc-v2/nuttx-config/include/board.h b/boards/modalai/fc-v2/nuttx-config/include/board.h index 34a8d2c2af..b196e7a68c 100644 --- a/boards/modalai/fc-v2/nuttx-config/include/board.h +++ b/boards/modalai/fc-v2/nuttx-config/include/board.h @@ -248,7 +248,7 @@ /* ADC 1 2 3 clock source */ -#define STM32_RCC_D3CCIPR_ADCSEL RCC_D3CCIPR_ADCSEL_PLL2 +#define STM32_RCC_D3CCIPR_ADCSRC RCC_D3CCIPR_ADCSEL_PLL2 /* FDCAN 1 2 clock source */ diff --git a/boards/mro/ctrl-zero-classic/nuttx-config/include/board.h b/boards/mro/ctrl-zero-classic/nuttx-config/include/board.h index 9b1ae6342d..d5ffa2c584 100644 --- a/boards/mro/ctrl-zero-classic/nuttx-config/include/board.h +++ b/boards/mro/ctrl-zero-classic/nuttx-config/include/board.h @@ -192,7 +192,7 @@ #define STM32_RCC_D2CCIP1R_SPI45SRC RCC_D2CCIP1R_SPI45SEL_PLL2 /* SPI45 clock source */ #define STM32_RCC_D3CCIPR_SPI6SRC RCC_D3CCIPR_SPI6SEL_PLL2 /* SPI6 clock source */ #define STM32_RCC_D2CCIP2R_USBSRC RCC_D2CCIP2R_USBSEL_PLL3 /* USB 1 and 2 clock source */ -#define STM32_RCC_D3CCIPR_ADCSEL RCC_D3CCIPR_ADCSEL_PLL2 /* ADC 1 2 3 clock source */ +#define STM32_RCC_D3CCIPR_ADCSRC RCC_D3CCIPR_ADCSEL_PLL2 /* ADC 1 2 3 clock source */ #define STM32_RCC_D2CCIP1R_FDCANSEL RCC_D2CCIP1R_FDCANSEL_HSE /* FDCAN 1 2 clock source */ #define STM32_FDCANCLK STM32_HSE_FREQUENCY diff --git a/boards/mro/ctrl-zero-h7-oem/nuttx-config/include/board.h b/boards/mro/ctrl-zero-h7-oem/nuttx-config/include/board.h index 9b1ae6342d..d5ffa2c584 100644 --- a/boards/mro/ctrl-zero-h7-oem/nuttx-config/include/board.h +++ b/boards/mro/ctrl-zero-h7-oem/nuttx-config/include/board.h @@ -192,7 +192,7 @@ #define STM32_RCC_D2CCIP1R_SPI45SRC RCC_D2CCIP1R_SPI45SEL_PLL2 /* SPI45 clock source */ #define STM32_RCC_D3CCIPR_SPI6SRC RCC_D3CCIPR_SPI6SEL_PLL2 /* SPI6 clock source */ #define STM32_RCC_D2CCIP2R_USBSRC RCC_D2CCIP2R_USBSEL_PLL3 /* USB 1 and 2 clock source */ -#define STM32_RCC_D3CCIPR_ADCSEL RCC_D3CCIPR_ADCSEL_PLL2 /* ADC 1 2 3 clock source */ +#define STM32_RCC_D3CCIPR_ADCSRC RCC_D3CCIPR_ADCSEL_PLL2 /* ADC 1 2 3 clock source */ #define STM32_RCC_D2CCIP1R_FDCANSEL RCC_D2CCIP1R_FDCANSEL_HSE /* FDCAN 1 2 clock source */ #define STM32_FDCANCLK STM32_HSE_FREQUENCY diff --git a/boards/mro/ctrl-zero-h7/nuttx-config/include/board.h b/boards/mro/ctrl-zero-h7/nuttx-config/include/board.h index 78a0048760..cdbd3dd3e6 100644 --- a/boards/mro/ctrl-zero-h7/nuttx-config/include/board.h +++ b/boards/mro/ctrl-zero-h7/nuttx-config/include/board.h @@ -191,7 +191,7 @@ #define STM32_RCC_D2CCIP1R_SPI45SRC RCC_D2CCIP1R_SPI45SEL_PLL2 /* SPI45 clock source */ #define STM32_RCC_D3CCIPR_SPI6SRC RCC_D3CCIPR_SPI6SEL_PLL2 /* SPI6 clock source */ #define STM32_RCC_D2CCIP2R_USBSRC RCC_D2CCIP2R_USBSEL_PLL3 /* USB 1 and 2 clock source */ -#define STM32_RCC_D3CCIPR_ADCSEL RCC_D3CCIPR_ADCSEL_PLL2 /* ADC 1 2 3 clock source */ +#define STM32_RCC_D3CCIPR_ADCSRC RCC_D3CCIPR_ADCSEL_PLL2 /* ADC 1 2 3 clock source */ #define STM32_RCC_D2CCIP1R_FDCANSEL RCC_D2CCIP1R_FDCANSEL_HSE /* FDCAN 1 2 clock source */ #define STM32_FDCANCLK STM32_HSE_FREQUENCY diff --git a/boards/mro/pixracerpro/nuttx-config/include/board.h b/boards/mro/pixracerpro/nuttx-config/include/board.h index 2377d529f4..5edda931dc 100644 --- a/boards/mro/pixracerpro/nuttx-config/include/board.h +++ b/boards/mro/pixracerpro/nuttx-config/include/board.h @@ -191,7 +191,7 @@ #define STM32_RCC_D2CCIP1R_SPI45SRC RCC_D2CCIP1R_SPI45SEL_PLL2 /* SPI45 clock source */ #define STM32_RCC_D3CCIPR_SPI6SRC RCC_D3CCIPR_SPI6SEL_PLL2 /* SPI6 clock source */ #define STM32_RCC_D2CCIP2R_USBSRC RCC_D2CCIP2R_USBSEL_PLL3 /* USB 1 and 2 clock source */ -#define STM32_RCC_D3CCIPR_ADCSEL RCC_D3CCIPR_ADCSEL_PLL2 /* ADC 1 2 3 clock source */ +#define STM32_RCC_D3CCIPR_ADCSRC RCC_D3CCIPR_ADCSEL_PLL2 /* ADC 1 2 3 clock source */ #define STM32_RCC_D2CCIP1R_FDCANSEL RCC_D2CCIP1R_FDCANSEL_HSE /* FDCAN 1 2 clock source */ #define STM32_FDCANCLK STM32_HSE_FREQUENCY diff --git a/boards/px4/fmu-v6c/nuttx-config/include/board.h b/boards/px4/fmu-v6c/nuttx-config/include/board.h index 8042d466a7..1951031cb8 100644 --- a/boards/px4/fmu-v6c/nuttx-config/include/board.h +++ b/boards/px4/fmu-v6c/nuttx-config/include/board.h @@ -248,7 +248,7 @@ /* ADC 1 2 3 clock source */ -#define STM32_RCC_D3CCIPR_ADCSEL RCC_D3CCIPR_ADCSEL_PLL2 +#define STM32_RCC_D3CCIPR_ADCSRC RCC_D3CCIPR_ADCSEL_PLL2 /* FDCAN 1 2 clock source */ diff --git a/boards/px4/fmu-v6u/nuttx-config/include/board.h b/boards/px4/fmu-v6u/nuttx-config/include/board.h index a82a7bf098..826c5df337 100644 --- a/boards/px4/fmu-v6u/nuttx-config/include/board.h +++ b/boards/px4/fmu-v6u/nuttx-config/include/board.h @@ -248,7 +248,7 @@ /* ADC 1 2 3 clock source */ -#define STM32_RCC_D3CCIPR_ADCSEL RCC_D3CCIPR_ADCSEL_PLL2 +#define STM32_RCC_D3CCIPR_ADCSRC RCC_D3CCIPR_ADCSEL_PLL2 /* CAN FD clock source */ #define STM32_FDCANCLK STM32_HSE_FREQUENCY diff --git a/boards/px4/fmu-v6x/nuttx-config/include/board.h b/boards/px4/fmu-v6x/nuttx-config/include/board.h index eb3004183b..5057ed713e 100644 --- a/boards/px4/fmu-v6x/nuttx-config/include/board.h +++ b/boards/px4/fmu-v6x/nuttx-config/include/board.h @@ -248,7 +248,7 @@ /* ADC 1 2 3 clock source */ -#define STM32_RCC_D3CCIPR_ADCSEL RCC_D3CCIPR_ADCSEL_PLL2 +#define STM32_RCC_D3CCIPR_ADCSRC RCC_D3CCIPR_ADCSEL_PLL2 /* FDCAN 1 2 clock source */ diff --git a/boards/siyi/n7/nuttx-config/include/board.h b/boards/siyi/n7/nuttx-config/include/board.h index d6b690c293..1df145ed26 100644 --- a/boards/siyi/n7/nuttx-config/include/board.h +++ b/boards/siyi/n7/nuttx-config/include/board.h @@ -222,7 +222,7 @@ #define STM32_RCC_D2CCIP2R_USBSRC RCC_D2CCIP2R_USBSEL_PLL3 /* USB 1 and 2 clock source */ -#define STM32_RCC_D3CCIPR_ADCSEL RCC_D3CCIPR_ADCSEL_PLL2 /* ADC 1 2 3 clock source */ +#define STM32_RCC_D3CCIPR_ADCSRC RCC_D3CCIPR_ADCSEL_PLL2 /* ADC 1 2 3 clock source */ #define STM32_RCC_D2CCIP1R_FDCANSEL RCC_D2CCIP1R_FDCANSEL_HSE /* FDCAN 1 2 clock source */ diff --git a/boards/spracing/h7extreme/nuttx-config/include/board.h b/boards/spracing/h7extreme/nuttx-config/include/board.h index 91edb4e650..117edb76a7 100644 --- a/boards/spracing/h7extreme/nuttx-config/include/board.h +++ b/boards/spracing/h7extreme/nuttx-config/include/board.h @@ -241,7 +241,7 @@ /* ADC 1 2 3 clock source */ -#define STM32_RCC_D3CCIPR_ADCSEL RCC_D3CCIPR_ADCSEL_PLL2 +#define STM32_RCC_D3CCIPR_ADCSRC RCC_D3CCIPR_ADCSEL_PLL2 /* QSPI clock source */ #define STM32_RCC_D1CCIPR_QSPISEL RCC_D1CCIPR_QSPISEL_PLL2 diff --git a/boards/spracing/h7extreme/src/rcc.c b/boards/spracing/h7extreme/src/rcc.c index 9fc0584816..cd4299b880 100644 --- a/boards/spracing/h7extreme/src/rcc.c +++ b/boards/spracing/h7extreme/src/rcc.c @@ -503,10 +503,10 @@ __ramfunc__ void stm32_board_clockconfig(void) /* Configure ADC source clock */ -#if defined(STM32_RCC_D3CCIPR_ADCSEL) +#if defined(STM32_RCC_D3CCIPR_ADCSRC) regval = getreg32(STM32_RCC_D3CCIPR); regval &= ~RCC_D3CCIPR_ADCSEL_MASK; - regval |= STM32_RCC_D3CCIPR_ADCSEL; + regval |= STM32_RCC_D3CCIPR_ADCSRC; putreg32(regval, STM32_RCC_D3CCIPR); #endif