forked from Archive/PX4-Autopilot
This appears to fix the NAK-issues for IN data transfers. Still an issue with OUT
git-svn-id: https://nuttx.svn.sourceforge.net/svnroot/nuttx/trunk@5063 7fd9a85b-ad96-42d3-883c-3090e2eb8679
This commit is contained in:
patacongo
parent
8e68b6f0af
commit
4794a491c1
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@ -43,15 +43,12 @@
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#include <stdint.h>
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#include <stdbool.h>
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#include <stdlib.h>
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#include <unistd.h>
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#include <semaphore.h>
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#include <string.h>
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#include <errno.h>
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#include <debug.h>
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#if !defined(CONFIG_DEBUG_VERBOSE) && !defined(CONFIG_DEBUG_USB)
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# include <debug.h>
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#endif
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#include <nuttx/arch.h>
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#include <nuttx/kmalloc.h>
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#include <nuttx/usb/usb.h>
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@ -315,6 +312,10 @@ static int stm32_ctrl_senddata(FAR struct stm32_usbhost_s *priv,
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FAR uint8_t *buffer, unsigned int buflen);
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static int stm32_ctrl_recvdata(FAR struct stm32_usbhost_s *priv,
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FAR uint8_t *buffer, unsigned int buflen);
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static int stm32_in_transfer(FAR struct stm32_usbhost_s *priv, int chidx,
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FAR uint8_t *buffer, size_t buflen);
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static int stm32_out_transfer(FAR struct stm32_usbhost_s *priv, int chidx,
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FAR uint8_t *buffer, size_t buflen);
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/* Interrupt handling **********************************************************/
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/* Lower level interrupt handlers */
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@ -1354,6 +1355,222 @@ static int stm32_ctrl_recvdata(FAR struct stm32_usbhost_s *priv,
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return stm32_chan_wait(priv, chan);
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}
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/*******************************************************************************
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* Name: stm32_in_transfer
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*
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* Description:
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* Transfer 'buflen' bytes into 'buffer' from an IN channel.
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*
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*******************************************************************************/
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static int stm32_in_transfer(FAR struct stm32_usbhost_s *priv, int chidx,
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FAR uint8_t *buffer, size_t buflen)
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{
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FAR struct stm32_chan_s *chan;
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uint16_t start;
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uint16_t elapsed;
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int ret = OK;
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/* Loop until the transfer completes (i.e., buflen is decremented to zero)
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* or a fatal error occurs (any error other than a simple NAK)
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*/
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chan = &priv->chan[chidx];
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chan->buffer = buffer;
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chan->buflen = buflen;
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start = stm32_getframe();
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while (chan->buflen > 0)
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{
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/* Set up for the wait BEFORE starting the transfer */
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ret = stm32_chan_waitsetup(priv, chan);
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if (ret != OK)
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{
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udbg("ERROR: Device disconnected\n");
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return ret;
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}
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/* Set up for the transfer based on the direction and the endpoint type */
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switch (chan->eptype)
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{
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default:
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case OTGFS_EPTYPE_CTRL: /* Control */
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{
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/* This kind of transfer on control endpoints other than EP0 are not
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* currently supported
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*/
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return -ENOSYS;
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}
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case OTGFS_EPTYPE_ISOC: /* Isochronous */
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{
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/* Set up the IN data PID */
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chan->pid = OTGFS_PID_DATA0;
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}
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break;
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case OTGFS_EPTYPE_BULK: /* Bulk */
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case OTGFS_EPTYPE_INTR: /* Interrupt */
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{
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/* Setup the IN data PID */
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chan->pid = chan->indata1 ? OTGFS_PID_DATA1 : OTGFS_PID_DATA0;
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}
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break;
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}
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/* Start the transfer */
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stm32_transfer_start(priv, chidx);
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/* Wait for the transfer to complete and get the result */
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ret = stm32_chan_wait(priv, chan);
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/* EAGAIN indicates that the device NAKed the transfer and we need
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* do try again. Anything else (success or other errors) will
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* cause use to return
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*/
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if (ret != OK)
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{
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udbg("Transfer failed: %d\n", ret);
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/* Check for a special case: If (1) the transfer was NAKed and (2)
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* no Tx FIFO empty or Rx FIFO not-empty event occurred, then we
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* should be able to just flush the Rx and Tx FIFOs and try again.
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* We can detect this latter case becasue the then the transfer
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* buffer pointer and buffer size will be unaltered.
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*/
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elapsed = stm32_getframe() - start;
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if (ret != -EAGAIN || /* Not a NAK condition OR */
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elapsed >= STM32_DATANAK_DELAY || /* Timeout has elapsed OR */
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chan->buflen != buflen) /* Data has been partially transferred */
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{
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/* Break out and return the error */
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break;
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}
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}
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}
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return ret;
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}
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/*******************************************************************************
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* Name: stm32_out_transfer
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*
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* Description:
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* Transfer the 'buflen' bytes in 'buffer' through an OUT channel.
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*
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*******************************************************************************/
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static int stm32_out_transfer(FAR struct stm32_usbhost_s *priv, int chidx,
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FAR uint8_t *buffer, size_t buflen)
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{
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FAR struct stm32_chan_s *chan;
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int ret;
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/* Loop until the transfer completes (i.e., buflen is decremented to zero)
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* or a fatal error occurs (any error other than a simple NAK)
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*/
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chan = &priv->chan[chidx];
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chan->buffer = buffer;
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chan->buflen = buflen;
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while (chan->buflen > 0)
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{
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/* Set up for the wait BEFORE starting the transfer */
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ret = stm32_chan_waitsetup(priv, chan);
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if (ret != OK)
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{
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udbg("ERROR: Device disconnected\n");
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return ret;
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}
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/* Set up for the transfer based on the direction and the endpoint type */
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switch (chan->eptype)
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{
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default:
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case OTGFS_EPTYPE_CTRL: /* Control */
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{
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/* This kind of transfer on control endpoints other than EP0 are not
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* currently supported
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*/
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return -ENOSYS;
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}
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case OTGFS_EPTYPE_ISOC: /* Isochronous */
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{
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/* Set up the OUT data PID */
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chan->pid = OTGFS_PID_DATA0;
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}
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break;
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case OTGFS_EPTYPE_BULK: /* Bulk */
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{
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/* Setup the OUT data PID */
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chan->pid = chan->outdata1 ? OTGFS_PID_DATA1 : OTGFS_PID_DATA0;
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}
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break;
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case OTGFS_EPTYPE_INTR: /* Interrupt */
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{
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/* Setup the OUT data PID */
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chan->pid = chan->outdata1 ? OTGFS_PID_DATA1 : OTGFS_PID_DATA0;
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/* Toggle the OUT data PID for the next transfer */
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chan->outdata1 ^= true;
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}
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}
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/* There is a bug in the code at present. With debug OFF, this driver
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* overruns the typical FLASH device and there are many problems with
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* NAKS sticking a big delay here allows the driver to work but with
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* very poor performance when debug is off.
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*/
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#if !defined(CONFIG_DEBUG_VERBOSE) && !defined(CONFIG_DEBUG_USB)
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#warning "REVISIT this delay"
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usleep(100*1000);
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#endif
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/* Start the transfer */
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stm32_transfer_start(priv, chidx);
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/* Wait for the transfer to complete and get the result */
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ret = stm32_chan_wait(priv, chan);
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/* EAGAIN indicates that the device NAKed the transfer and we need
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* do try again. Anything else (success or other errors) will
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* cause use to return
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*/
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if (ret != OK)
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{
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udbg("Transfer failed: %d\n", ret);
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return ret;
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}
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}
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return OK;
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}
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/*******************************************************************************
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* Name: stm32_gint_wrpacket
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*
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@ -3496,141 +3713,29 @@ static int stm32_ctrlout(FAR struct usbhost_driver_s *drvr,
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static int stm32_transfer(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep,
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FAR uint8_t *buffer, size_t buflen)
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{
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struct stm32_usbhost_s *priv = (struct stm32_usbhost_s *)drvr;
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FAR struct stm32_chan_s *chan;
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FAR struct stm32_usbhost_s *priv = (FAR struct stm32_usbhost_s *)drvr;
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unsigned int chidx = (unsigned int)ep;
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int ret = OK;
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int ret;
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uvdbg("chidx: %d buflen: %d\n", (unsigned int)ep, buflen);
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DEBUGASSERT(priv && buffer && chidx < STM32_MAX_TX_FIFOS && buflen > 0);
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chan = &priv->chan[chidx];
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/* We must have exclusive access to the USB host hardware and state structures */
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stm32_takesem(&priv->exclsem);
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/* Loop until the transfer completes (i.e., buflen is decremented to zero)
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* or a fatal error occurs (any error other than a simple NAK)
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*/
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/* Handle IN and OUT transfer slightly differently */
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chan->buffer = buffer;
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chan->buflen = buflen;
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while (chan->buflen > 0)
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if (priv->chan[chidx].in)
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{
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/* Set up for the wait BEFORE starting the transfer */
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ret = stm32_chan_waitsetup(priv, chan);
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if (ret != OK)
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{
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udbg("ERROR: Device disconnected\n");
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goto errout;
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}
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/* Set up for the transfer based on the direction and the endpoint type */
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switch (chan->eptype)
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{
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default:
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case OTGFS_EPTYPE_CTRL: /* Control */
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{
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/* This kind of transfer on control endpoints other than EP0 are not
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* currently supported
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*/
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ret = -ENOSYS;
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goto errout;
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}
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case OTGFS_EPTYPE_ISOC: /* Isochronous */
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{
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/* Set up the IN/OUT data PID */
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chan->pid = OTGFS_PID_DATA0;
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}
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break;
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case OTGFS_EPTYPE_BULK: /* Bulk */
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{
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/* Handle the bulk transfer based on the direction of the transfer. */
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if (chan->in)
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{
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/* Setup the IN data PID */
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chan->pid = chan->indata1 ? OTGFS_PID_DATA1 : OTGFS_PID_DATA0;
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ret = stm32_in_transfer(priv, chidx, buffer, buflen);
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}
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else
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{
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/* Setup the OUT data PID */
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chan->pid = chan->outdata1 ? OTGFS_PID_DATA1 : OTGFS_PID_DATA0;
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}
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}
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break;
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case OTGFS_EPTYPE_INTR: /* Interrupt */
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{
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/* Handle the interrupt transfer based on the direction of the
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* transfer.
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*/
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if (chan->in)
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{
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/* Setup the IN data PID */
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chan->pid = chan->indata1 ? OTGFS_PID_DATA1 : OTGFS_PID_DATA0;
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/* The indata1 data toggle will be updated in the Rx FIFO
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* interrupt handling logic as each packet is received.
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*/
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}
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else
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{
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/* Setup the OUT data PID */
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chan->pid = chan->outdata1 ? OTGFS_PID_DATA1 : OTGFS_PID_DATA0;
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/* Toggle the OUT data PID for the next transfer */
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chan->outdata1 ^= true;
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}
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}
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ret = stm32_out_transfer(priv, chidx, buffer, buflen);
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}
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/* There is a bug in the code at present. With debug OFF, this driver
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* overruns the typical FLASH device and there are many problems with
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* NAKS sticking a big delay here allows the driver to work but with
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* very poor performance when debug is off.
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*/
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#if !defined(CONFIG_DEBUG_VERBOSE) && !defined(CONFIG_DEBUG_USB)
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#warning "REVISIT this delay"
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usleep(100*1000);
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#endif
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/* Start the transfer */
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stm32_transfer_start(priv, chidx);
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/* Wait for the transfer to complete and get the result */
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ret = stm32_chan_wait(priv, chan);
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/* EAGAIN indicates that the device NAKed the transfer and we need
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* do try again. Anything else (success or other errors) will
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* cause use to return
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*/
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if (ret != OK)
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{
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udbg("Transfer failed: %d\n", ret);
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break;
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}
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}
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errout:
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stm32_givesem(&priv->exclsem);
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return ret;
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}
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